-
1.发明授权System and method for transitioning from one PLL feedback source to another 有权从一个PLL反馈源转换到另一个PLL反馈源的系统和方法公开(公告)号：US07412215B1
公开(公告)日：2008-08-12
申请号：US11144119
申请日：2005-06-03
IPC分类号： H04B1/04
CPC分类号： H04B1/0475 , H03L7/081 , H03L7/087 , H03L7/16 , H03L2207/12
摘要： A system and method are provided for switching from one phase-locked loop feedback source to another in a radio frequency (RF) transmitter. The RF transmitter includes a phase-locked loop (PLL) that provides a phase-modulated RF input signal and power amplifier circuitry that amplifies the RF input signal to provide an RF output signal. The PLL includes switching circuitry that couples a feedback path of the PLL to an output of the PLL for open loop operation and couples the feedback path of the PLL to an output of the power amplifier circuitry for closed loop operation. Prior to switching the feedback path from the output of the PLL to the output of the power amplifier circuitry, time alignment circuitry operates to time-align feedback signals from the outputs of the PLL and the power amplifier circuitry such that switching from open loop operation to closed loop operation causes minimal phase disturbance.
摘要翻译： 提供了一种用于在射频（RF）发射机中从一个锁相环反馈源切换到另一个的系统和方法。 RF发射器包括提供相位调制RF输入信号的锁相环（PLL）和放大RF输入信号以提供RF输出信号的功率放大器电路。 PLL包括将PLL的反馈路径耦合到PLL的输出以用于开环操作的开关电路，并将PLL的反馈路径耦合到用于闭环操作的功率放大器电路的输出。 在将反馈路径从PLL的输出切换到功率放大器电路的输出之前，时间对准电路用于对来自PLL和功率放大器电路的输出的反馈信号进行时间对准，使得从开环操作切换到 闭环运行导致最小的相位扰动。
-
2.发明授权Saturation correction without using saturation detection and saturation prevention for a power amplifier 有权饱和度校正，无需对功率放大器进行饱和检测和饱和度预防公开(公告)号：US08874050B1
公开(公告)日：2014-10-28
申请号：US12774155
申请日：2010-05-05
IPC分类号： H01Q11/12
CPC分类号： H01P5/184 , H03F1/0211 , H03F3/195 , H03F3/24 , H03F3/68 , H03F2200/541 , H03H7/38
摘要： A circuit and method for a saturation correction of a power amplifier (PA) is provided in order to maintain a desirable switching spectrum. The circuit includes a closed loop system that is responsive to a dynamic PA control signal known as VRAMP. The method samples a detector voltage that represents the output of the PA at the maximum voltage level of VRAMP. The sampled detector voltage is then reduced by a predetermined amount and applied as a fixed voltage PA control signal in the place of VRAMP. As a result, the closed loop system responds to the fixed voltage PA control signal to bring the PA out of saturation before VRAMP can begin a voltage decrease. Once the VRAMP voltage decreases, VRAMP is reapplied as a dynamic PA control signal in place of the fixed voltage control signal.
摘要翻译： 提供了用于功率放大器（PA）的饱和校正的电路和方法，以便保持期望的开关频谱。 电路包括响应于称为VRAMP的动态PA控制信号的闭环系统。 该方法对在VRAMP的最大电压电平下表示PA输出的检测器电压进行采样。 然后将取样的检测器电压减小预定量并作为固定电压PA控制信号施加在VRAMP的位置。 结果，闭环系统响应于固定电压PA控制信号，使得在VRAMP可以开始降压之前使PA失去饱和。 一旦VRAMP电压降低，VRAMP将重新应用为动态PA控制信号，代替固定电压控制信号。
-
公开(公告)号：US08193859B1
公开(公告)日：2012-06-05
申请号：US12882313
申请日：2010-09-15
IPC分类号： H03G3/20
CPC分类号： H03G3/3042
摘要： A dual FET detector having a common RF input and a common detector output for two detector circuits is provided. The first detector circuit is optimized for detecting lower RF signal levels while the second detector circuit is optimized for detecting higher RF signal levels. A detector output voltage output from the common detector output is a composite signal made up of the individual contributions of the two detector circuits. A control circuit receives a feedback signal derived from the detector output voltage, and uses the feedback signal to control a transition between urging a predominance of the contribution to the detector output voltage from one of the detector circuits to the other. The control of the transition between the detector circuits ensures that whichever of the two detector circuits is best optimized for a particular RF signal level will contribute the most to the detector output voltage.
摘要翻译： 提供具有公共RF输入和用于两个检测器电路的公共检测器输出的双FET检测器。 第一检测器电路被优化用于检测较低的RF信号电平，而第二检测器电路被优化用于检测更高的RF信号电平。 从公共检测器输出输出的检测器输出电压是由两个检测器电路的各自贡献组成的复合信号。 控制电路接收从检测器输出电压导出的反馈信号，并且使用反馈信号来控制在从检测器电路之一到检测器电路之间的对检测器输出电压的贡献的主导之间的转变。 对检测器电路之间的转换的控制确保两个检测器电路中的任一个针对特定的RF信号电平进行最佳优化，将对检测器的输出电压贡献最大。
-
公开(公告)号：US08463209B1
公开(公告)日：2013-06-11
申请号：US12843672
申请日：2010-07-26
IPC分类号： H04B1/04
CPC分类号： H03G3/3047 , H03F3/189 , H03F3/24 , H03F2200/207 , H03F2200/465
摘要： The described devices, systems and methods include an integrator circuit having two separate operational modes to control a power output level delivered by the power amplifier to an antenna during start of a transmission burst. The first operational mode utilizes a wide bandwidth control loop to pre-charge a capacitor of the integrator circuit, which generates a pedestal voltage delivered to the power amplifier control input. The second operational mode utilizes a lower bandwidth control loop to ensure stable operation of the control loop during normal operation of the power amplifier.
摘要翻译： 所描述的器件，系统和方法包括具有两个单独操作模式的积分器电路，以在发射突发开始期间控制由功率放大器传送到天线的功率输出电平。 第一种操作模式利用宽带宽控制环来对积分器电路的电容器进行预充电，该电容器产生传递到功率放大器控制输入端的基座电压。 第二种操作模式利用较低带宽控制回路来确保在功率放大器正常工作期间控制回路的稳定运行。
-
公开(公告)号：US09019011B2
公开(公告)日：2015-04-28
申请号：US13486012
申请日：2012-06-01
CPC分类号： H03F1/32 , H03F1/0222
摘要： A method for power amplifier (PA) calibration for an envelope tracking system of a wireless device is disclosed. The method involves measuring an output power of a PA that is a part under test (PUT) at a predetermined input power. Another step includes calculating a gain equal to the output power of the PA divided by the predetermined input power. A next step involves calculating a gain correction by subtracting the calculated gain from a desired gain. Other steps include determining an expected supply voltage for the PA at the desired gain using the gain correction applied to a nominal curve of gain versus PA supply voltage, and then storing the expected supply voltage for the PA versus input power in memory.
摘要翻译： 公开了一种用于无线设备的包络跟踪系统的功率放大器（PA）校准方法。 该方法包括以预定输入功率测量作为被测部件（PUT）的PA的输出功率。 另一步骤包括计算等于PA的输出功率除以预定输入功率的增益。 下一步涉及通过从期望的增益中减去所计算的增益来计算增益校正。 其他步骤包括使用增益校正应用于增益对PA电源电压的增益校正来确定期望增益的PA的预期电源电压，然后将PA的预期电源电压与输入功率存储在存储器中。
-
公开(公告)号：US08774065B2
公开(公告)日：2014-07-08
申请号：US13460861
申请日：2012-05-01
IPC分类号： H04B7/00
CPC分类号： H04B1/0067 , H03F1/02 , H03F1/0227 , H03F3/24 , H03F3/68 , H03F3/72 , H03F2203/7209 , H03F2203/7221 , H04B2001/045 , H04L5/001
摘要： A front end radio architecture (FERA) with power management is disclosed. The FERA includes a first power amplifier (PA) block having a first-first PA and a first-second PA, and a second PA block having a second-first PA and a second-second PA. First and second modulated switchers are adapted to selectively supply power to the first-first PA and the second-first PA, and to supply power to the first-second PA and the second-second PA, respectively. The first and second modulated switchers have a modulation bandwidth of at least 20 MHz and are both suitable for envelope tracking modulation. A control system is adapted to selectively enable and disable the first-first PA, first-second PA, the second-first PA, and the second-second PA. First and second switches are responsive to control signals to route carriers and received signals between first and second antennas depending upon a selectable mode of operation such as intra-band or inter-band operation.
摘要翻译： 公开了具有电源管理的前端无线电架构（FERA）。 FERA包括具有第一第一PA和第一秒PA的第一功率放大器（PA）块和具有第二第一PA和第二秒PA的第二PA块。 第一和第二调制切换器适于选择性地向第一优先PA和第二第一PA供电，并分别向第一秒PA和第二秒PA供电。 第一和第二调制切换器具有至少20MHz的调制带宽，并且都适用于包络跟踪调制。 控制系统适于选择性地启用和禁用第一优先PA，第一秒PA，第二优先PA和第二秒PA。 第一和第二开关响应于控制信号以根据诸如带内或频带间操作的可选择的操作模式在第一和第二天线之间路由载波和接收信号。
-
公开(公告)号：US07991071B2
公开(公告)日：2011-08-02
申请号：US10147569
申请日：2002-05-16
CPC分类号： H04L27/361
摘要： A transmitter includes a polar modulator that creates phase and amplitude signals which in turn drive a power amplifier. To compensate for AM to PM conversion of the amplitude signal into the amplified signal, a compensation signal is generated from the amplitude signal and combined with the phase signal such that when amplified, the compensation signal cancels the AM to PM conversion. The compensation signal may have an offset term, a linear term, a quadratic term, and a cubic term. A second embodiment comprises a technique by which AM to AM conversion may concurrently be addressed using a second compensation signal.
摘要翻译： 发射机包括极化调制器，其产生相位和幅度信号，其又驱动功率放大器。 为了补偿振幅信号的AM到PM转换为放大信号，从幅度信号产生补偿信号并与相位信号组合，使得当放大时，补偿信号取消AM到PM转换。 补偿信号可以具有偏移项，线性项，二次项和三次项。 第二实施例包括一种可以使用第二补偿信号并行地寻址AM到AM转换的技术。
-
8.发明授权公开(公告)号：US07962109B1
公开(公告)日：2011-06-14
申请号：US11679201
申请日：2007-02-27
IPC分类号： H04B17/00
CPC分类号： H03G3/3047
摘要： A system and method for detecting and correcting over-current and/or over-voltage conditions in power amplifier circuitry in a transmit chain of a mobile terminal are provided. In general, over-current detection and correction circuitry combines a current detection signal indicative of a current provided to or drained by the power amplifier circuitry during ramp-up for a transmit burst and a substantially inverse current ramping profile to provide a first constant value. The first constant value is compared to a current threshold or limit value to determine whether an over-current condition exists. If an over-current condition exists, the over-current detection and correction circuitry operates to reduce the output power of the power amplifier circuitry during ramp-up for the transmit burst to correct for the over-current condition. In a similar manner, over-voltage detection circuitry operates to detect and correct over-voltage conditions during ramp-up for the transmit burst.
摘要翻译： 提供了一种用于在移动终端的发射链中的功率放大器电路中检测和校正过电流和/或过电压条件的系统和方法。 通常，过电流检测和校正电路组合指示在斜波上升期间功率放大器电路提供给发射脉冲串的电流的电流检测信号和用于发射脉冲串的基本上反向电流斜坡分布以提供第一恒定值。 将第一常数值与当前阈值或限制值进行比较，以确定是否存在过电流条件。 如果存在过电流状况，则过流检测和校正电路用于在发射突发的斜坡上降低功率放大器电路的输出功率，以校正过电流状况。 以类似的方式，过电压检测电路用于在发射突发的斜坡上升期间检测和校正过电压状况。
-
公开(公告)号：US07313376B1
公开(公告)日：2007-12-25
申请号：US10987883
申请日：2004-11-12
IPC分类号： H04B1/06
CPC分类号： H04B1/30
摘要： A system and method for performing DC offset correction in a wireless communication receiver during “dead time” are provided. The receiver includes amplifier circuitry that amplifies a received radio frequency (RF) signal, downconversion circuitry that downconverts the received RF signal to provide a downconverted signal, digitization circuitry that digitizes the downconverted signal to provide a digital signal, and digital DC offset correction circuitry enabled during the dead time when there should be no DC content in the downconverted signal. In operation, the digital DC offset correction circuitry detects a DC offset of the digital signal and subtracts the DC offset from the digital signal.
摘要翻译： 提供了在“死区时间”期间在无线通信接收机中进行DC偏移校正的系统和方法。 接收器包括放大接收的射频（RF）信号的放大器电路，降频所接收的RF信号以提供下变频信号的下变频电路，使下变频信号数字化以提供数字信号的数字化电路和启用的数字DC偏移校正电路 在死区时间内，在下变频信号中不应有直流含量。 在操作中，数字DC偏移校正电路检测数字信号的DC偏移，并从数字信号中减去DC偏移。
-
10.发明授权Pre-distortion system for a synthesizer having modulation applied in the reference path 有权具有在参考路径中应用的调制的合成器的预失真系统公开(公告)号：US07288999B1
公开(公告)日：2007-10-30
申请号：US11347956
申请日：2006-02-06
CPC分类号： H03L7/1976 , H03C3/0966 , H03L7/23 , H03L2207/12
摘要： A system providing a phase or frequency modulated signal is provided. In general, the system includes a phase locked loop (PLL) having a fractional-N divider in a reference path of the PLL operating to divide a reference frequency based on a pre-distorted modulation signal. Pre-distortion circuitry operates to provide the pre-distorted modulation signal by pre-distorting a modulation signal such that a convolution, or cascade, of the pre-distortion and a transfer function of the PLL results in a substantially flat frequency response for a range of modulation rates greater than a bandwidth of the PLL.
摘要翻译： 提供了提供相位或频率调制信号的系统。 通常，该系统包括在PLL的参考路径中具有分数N分频器的锁相环（PLL），其操作以基于预失真调制信号来划分参考频率。 预失真电路通过对调制信号进行预失真来提供预失真调制信号，使得预失真和PLL的传递函数的卷积或级联导致范围内的基本平坦的频率响应 的调制率大于PLL的带宽。
-
-
-
-
-
-
-
-
-
搜索结果
52 条记录 (耗时 0.04 秒)
