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公开(公告)号：US11183436B2
公开(公告)日：2021-11-23
申请号：US16746275
申请日：2020-01-17
Applicant: Allegro MicroSystems, LLC
Inventor： Shixi Louis Liu , Natasha Healey , Rishikesh Nikam
IPC: H01L23/495 , H01L23/31 , H01L27/07
Abstract: A power integrated circuit (IC) includes a lead frame comprising a signal lead, a power lead, and a paddle attached to one or more of the signal lead and the power lead, an electrical component supported by the paddle, and a mold material configured to enclose a portion of the lead frame and expose a surface of the paddle, wherein the power lead has a first portion extending from an edge of the mold material outside of the mold material in a first direction and a second portion enclosed by the mold material and extending from the edge of the mold material inside the mold material in a second direction to the paddle, wherein the second direction is substantially opposite to the first direction. In embodiments, the paddle is only attached to the second portion of the power lead. The first and second portions of the power lead meet at a junction between a first portion of the mold material and a second portion of the mold material, the junction positioned on a side surface of the mold material that extends from a first surface to a substantially parallel second surface of the mold material.
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公开(公告)号：US20250140673A1
公开(公告)日：2025-05-01
申请号：US18495060
申请日：2023-10-26
Applicant: Allegro MicroSystems, LLC
Inventor： Vijay Mangtani , Paul A. David , William P. Taylor , Harianto Wong , Natasha Healey , Harry Chandra
IPC: H01L23/498 , H01L23/00 , H01L23/29
Abstract: According to one aspect of the present disclosure, a voltage isolated integrated circuit (IC) package configuration includes a first package comprising a transformer and a mold material enclosing the transformer to form a first package body, wherein the first package comprises a first lead set to permit electrical connection to the transformer. In some embodiments, a second package comprising a lead frame, two or more semiconductor die supported by the lead frame, and a mold material enclosing the two or more semiconductor die to form a second package body, wherein the lead frame comprises a second lead set to permit electrical connection to the two or more semiconductor die. In some embodiments, the one or more leads of the first lead set is directly electrically connected to one or more leads of the second lead set, wherein the first package and the second package are mechanically coupled together.
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公开(公告)号：US12163983B2
公开(公告)日：2024-12-10
申请号：US18053480
申请日：2022-11-08
Applicant: Allegro MicroSystems, LLC
Inventor： Shixi Louis Liu , Robert A. Briano , Natasha Healey
IPC: G01R15/20 , G01R19/00 , H01L21/66 , H01L23/495
Abstract: A packaged current sensor integrated circuit includes a primary conductor having an input portion and an output portion configured to carry a current to be measured by one or more magnetic sensing elements supported by a semiconductor die adjacent to the primary conductor. A method of fabricating the packaged current sensor integrated circuit includes partially encasing the lead frame in a first mold material, applying an insulator to one or more die attach pads, attaching a die to the insulator, electrically connecting the die to secondary leads, and providing a second mold to the subassembly. The package is configured to provide increased voltage isolation.
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公开(公告)号：US11800813B2
公开(公告)日：2023-10-24
申请号：US16887045
申请日：2020-05-29
Applicant: Allegro MicroSystems, LLC
Inventor： Alexander Latham , Natasha Healey
CPC classification number: H10N50/80 , G01R15/207 , G01R19/0092 , G01R33/06 , H01L25/16
Abstract: Methods and apparatus for providing a high isolation current sensor. In embodiments, a current sensor includes a leadframe having a current conductor first portion and a second portion, a magnetic field sensing element positioned in relation to the current conductor for detecting a magnetic generated by current flow through the current conductor, and a die supported by at least a portion of the first and/or second portions of the leadframe, wherein the first portion of the lead frame includes an isolation region aligned with a first edge of the die. In embodiments, a current sensor includes SOI processing and features to enhance active layer isolation.
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公开(公告)号：US20210376227A1
公开(公告)日：2021-12-02
申请号：US16887045
申请日：2020-05-29
Applicant: Allegro MicroSystems, LLC
Inventor： Alexander Latham , Natasha Healey
Abstract: Methods and apparatus for providing a high isolation current sensor. In embodiments, a current sensor includes a leadframe having a current conductor first portion and a second portion, a magnetic field sensing element positioned in relation to the current conductor for detecting a magnetic generated by current flow through the current conductor, and a die supported by at least a portion of the first and/or second portions of the leadframe, wherein the first portion of the lead frame includes an isolation region aligned with a first edge of the die. In embodiments, a current sensor includes SOI processing and features to enhance active layer isolation.
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Patent Agency Ranking
公开(公告)号：US20230110671A1
公开(公告)日：2023-04-13
申请号：US17495879
申请日：2021-10-07
Applicant: Allegro MicroSystems, LLC
Inventor： Shixi Louis Liu , Paul A. David , Natasha Healey
IPC: G01R19/00 , H01L23/495 , G01R15/20
Abstract: A current sensor integrated circuit configured to sense a current through a current conductor includes a lead frame at least one signal lead, a fan out wafer level package (FOWLP), and a mold material enclosing the FOWLP and a portion of the lead frame. The FOWLP includes a semiconductor die configured to support at least one magnetic field sensing element to sense a magnetic field associated with the current, wherein the semiconductor die has a first surface on which at least one connection pad is accessible, a redistribution layer in contact with the at least one connection pad, and an insulating layer in contact with the redistribution layer, wherein the insulating layer is configured to extend beyond a periphery of the semiconductor die by a minimum distance. The die connection pad is configured to be electrically coupled to the at least one signal lead.
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公开(公告)号：US20230060219A1
公开(公告)日：2023-03-02
申请号：US18053480
申请日：2022-11-08
Applicant: Allegro MicroSystems, LLC
Inventor： Shixi Louis Liu , Robert A. Briano , Natasha Healey
Abstract: A packaged current sensor integrated circuit includes a primary conductor having an input portion and an output portion configured to carry a current to be measured by one or more magnetic sensing elements supported by a semiconductor die adjacent to the primary conductor. A method of fabricating the packaged current sensor integrated circuit includes partially encasing the lead frame in a first mold material, applying an insulator to one or more die attach pads, attaching a die to the insulator, electrically connecting the die to secondary leads, and providing a second mold to the subassembly. The package is configured to provide increased voltage isolation.
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公开(公告)号：US20210223292A1
公开(公告)日：2021-07-22
申请号：US16884311
申请日：2020-05-27
Applicant: Allegro MicroSystems, LLC
Inventor： Shixi Louis Liu , Paul A. David , Shaun D. Milano , Rishikesh Nikam , Alexander Latham , Wade Bussing , Natasha Healey , Georges El Bacha
Abstract: A current sensor integrated circuit (IC) includes a unitary lead frame having at least one first lead having a terminal end, at least one second lead having a terminal end, and a paddle having a first surface and a second opposing surface. A semiconductor die is supported by the first surface of the paddle, wherein the at least one first lead is electrically coupled to the semiconductor die and the at least one second lead is electrically isolated from the semiconductor die. The current sensor IC further includes a first mold material configured to enclose the semiconductor die and the paddle and a second mold material configured to enclose at least a portion of the first mold material, wherein the terminal end of the at least one first lead and the terminal end of the at least one second lead are external to the second mold material.
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公开(公告)号：US11644485B2
公开(公告)日：2023-05-09
申请号：US17495879
申请日：2021-10-07
Applicant: Allegro MicroSystems, LLC
Inventor： Shixi Louis Liu , Paul A. David , Natasha Healey
IPC: G01R15/20 , H01L23/49 , G01R19/00 , H01L23/495
CPC classification number: G01R19/0092 , G01R15/207 , H01L23/49541 , H01L23/49575 , H01L2224/49171
Abstract: A current sensor integrated circuit configured to sense a current through a current conductor includes a lead frame at least one signal lead, a fan out wafer level package (FOWLP), and a mold material enclosing the FOWLP and a portion of the lead frame. The FOWLP includes a semiconductor die configured to support at least one magnetic field sensing element to sense a magnetic field associated with the current, wherein the semiconductor die has a first surface on which at least one connection pad is accessible, a redistribution layer in contact with the at least one connection pad, and an insulating layer in contact with the redistribution layer, wherein the insulating layer is configured to extend beyond a periphery of the semiconductor die by a minimum distance. The die connection pad is configured to be electrically coupled to the at least one signal lead.
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公开(公告)号：US11519939B2
公开(公告)日：2022-12-06
申请号：US17472769
申请日：2021-09-13
Applicant: Allegro MicroSystems, LLC
Inventor： Shixi Louis Liu , Paul A. David , Shaun D. Milano , Rishikesh Nikam , Alexander Latham , Wade Bussing , Natasha Healey , Georges El Bacha
Abstract: A current sensor integrated circuit (IC) includes a unitary lead frame having at least one first lead having a terminal end, at least one second lead having a terminal end, and a paddle having a first surface and a second opposing surface. A semiconductor die is supported by the first surface of the paddle, wherein the at least one first lead is electrically coupled to the semiconductor die and the at least one second lead is electrically isolated from the semiconductor die. The current sensor IC further includes a first mold material configured to enclose the semiconductor die and the paddle and a second mold material configured to enclose at least a portion of the first mold material, wherein the terminal end of the at least one first lead and the terminal end of the at least one second lead are external to the second mold material.
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