公开(公告)号：US20220294672A1

公开(公告)日：2022-09-15

申请号：US17334445

申请日：2021-05-28

Applicant: Analog Devices, Inc.

Inventor： Eric C. Gaalaas ,  Dongwan Ha ,  Jason J. Ziomek ,  Bikiran Goswami ,  Brian Jadus

IPC: H04L25/02

Abstract: Methods and apparatus are disclosed for communicating multiple logic states across a digital isolator. The digital isolator is a universal serial bus (USB) isolator in some embodiments. The digital isolator includes one or more single-bit data channels. Three or more logic states of information are transmitted across the single-bit data channel(s). The logic states are distinguished by a pulse sequence, and in particular a number of edges of the pulse sequence and a final value or final edge of the pulse sequence.

公开(公告)号：US20170117877A1

公开(公告)日：2017-04-27

申请号：US14924310

申请日：2015-10-27

Applicant: ANALOG DEVICES, INC.

Inventor： Dongwan Ha

IPC: H03H11/28 ,  H03H11/04

CPC classification number: H03H11/28 ,  H03H11/04 ,  H03K3/012 ,  H03K19/018521 ,  H04L25/0278 ,  H04L25/12

Abstract: Embodiments of the present disclosure may provide a method of calibrating an isolator system. The method may comprise the steps of driving a common signal to a pair of input terminals of the isolator system; measuring differences in signals at output terminals of the isolator system; and varying impedance of impedance elements connected between the output terminals and a center-tap terminal of the isolator system until a mismatch at the output terminals is minimized.

公开(公告)号：US20230411065A1

公开(公告)日：2023-12-21

申请号：US17841146

申请日：2022-06-15

Applicant: Analog Devices, Inc.

Inventor： Ruida Yun ,  Dongwan Ha ,  Baoxing Chen

IPC: H01F27/28 ,  H01F27/29 ,  H01F27/40 ,  H01L49/02

CPC classification number: H01F27/2804 ,  H01F27/29 ,  H01F27/2885 ,  H01F27/40 ,  H01L28/10 ,  H01F2027/2809

Abstract: A fully symmetrical and balanced monolithic or multi-die integrated circuit transformer device is described. The device can comprise a first and second transformer. The first and second transformer can each comprise a symmetrical bottom coil including electrically conductive crossovers between individual windings of pairs of adjacent windings. Each of the bottom coils can further comprise a first, a second differential terminal, and a center tap third terminal electrically connected to the inner-most winding of the bottom coil. Each transformer can further comprise a spiral top coil electrically connected to an encompassed inner pad and a laterally offset outer pad, the top coil, inner pad, and outer pad including a shared electrically conductive integrated circuit layer. The respective top coils of each transformer can be overlaid and separated from the respective bottom coils by an electrically insulating dielectric layer.

公开(公告)号：US11637724B2

公开(公告)日：2023-04-25

申请号：US17334445

申请日：2021-05-28

Applicant: Analog Devices, Inc.

Inventor： Eric C. Gaalaas ,  Dongwan Ha ,  Jason J. Ziomek ,  Bikiran Goswami ,  Brian Jadus

IPC: H04L25/02 ,  H02M3/335

Abstract: Methods and apparatus are disclosed for communicating multiple logic states across a digital isolator. The digital isolator is a universal serial bus (USB) isolator in some embodiments. The digital isolator includes one or more single-bit data channels. Three or more logic states of information are transmitted across the single-bit data channel(s). The logic states are distinguished by a pulse sequence, and in particular a number of edges of the pulse sequence and a final value or final edge of the pulse sequence.

公开(公告)号：US09634646B1

公开(公告)日：2017-04-25

申请号：US14924310

申请日：2015-10-27

Applicant: ANALOG DEVICES, INC.

Inventor： Dongwan Ha

IPC: H03L5/00 ,  H03H11/28 ,  H03H11/04 ,  H03K3/012 ,  H03K19/0185

CPC classification number: H03H11/28 ,  H03H11/04 ,  H03K3/012 ,  H03K19/018521 ,  H04L25/0278 ,  H04L25/12

Abstract: Embodiments of the present disclosure may provide a method of calibrating an isolator system. The method may comprise the steps of driving a common signal to a pair of input terminals of the isolator system; measuring differences in signals at output terminals of the isolator system; and varying impedance of impedance elements connected between the output terminals and a center-tap terminal of the isolator system until a mismatch at the output terminals is minimized.