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公开(公告)号:US20240421217A1
公开(公告)日:2024-12-19
申请号:US18209977
申请日:2023-06-14
Applicant: Analog Devices, Inc.
Inventor: James G. Fiorenza , Daniel Piedra , Justin Scott Reiter , Michael Gurr
IPC: H01L29/778 , H01L23/373 , H01L29/20 , H01L29/66
Abstract: Techniques that separate the heat generation from the active device and that add a thermal heat shield layer between the heat generation and the active device to reduce the channel temperature in the areas that determine the reliability of a semiconductor device.
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公开(公告)号:US20230122090A1
公开(公告)日:2023-04-20
申请号:US17504391
申请日:2021-10-18
Applicant: Analog Devices, Inc.
Inventor: James G. Fiorenza , Daniel Piedra
IPC: H01L21/02 , H01L29/20 , H01L29/205 , H01L29/778 , H01L29/66
Abstract: Electric field management techniques in GaN based semiconductors that utilize patterned regions of differing conductivity under the active GaN device, such as a GaN high electron mobility transistor (HEMT), are described. As an example, a patterned layer of oxidized silicon can be formed superjacent a layer of silicon dioxide during or prior to the heteroepitaxy of GaN or another semiconductor material. These techniques can be useful for back-side electric field management because a silicon layer, for example, can be made conductive to act as a back-side field plate.
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公开(公告)号:US20210091061A1
公开(公告)日:2021-03-25
申请号:US17020189
申请日:2020-09-14
Applicant: Analog Devices, Inc.
Inventor: James G. Fiorenza , Puneet Srivastava , Daniel Piedra
IPC: H01L25/18 , H01L25/065 , H01L23/00 , H01L25/00
Abstract: A hybrid silicon carbide (SiC) device includes a first device structure having a first substrate comprising SiC of a first conductivity type and a first SiC layer of the first conductivity type, where the first SiC layer is formed on a face of the first substrate. The first device structure also includes a second SiC layer of a second conductivity type that is formed on a face of the first SiC layer and a first contact region of the first conductivity type, where the first contact region traverses the second SiC layer and contacts the first SiC. The device also includes a second device structure that is bonded to the first device structure. The second device structure includes a switching device formed on a second substrate and a second contact region that traverses a first terminal region of the switching device and contacts the first contact region.
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公开(公告)号:US20250098200A1
公开(公告)日:2025-03-20
申请号:US18940279
申请日:2024-11-07
Applicant: Analog Devices, Inc.
Inventor: James G. Fiorenza , Puneet Srivastava , Daniel Piedra
IPC: H01L29/778 , H01L21/265 , H01L21/266 , H01L27/088 , H01L29/06 , H01L29/20 , H01L29/205 , H01L29/417 , H01L29/423 , H01L29/66
Abstract: An enhancement mode compound semiconductor field-effect transistor (FET) includes a source, a drain, and a gate located therebetween. The transistor further includes a first gallium nitride-based hetero-interface located under the gate and a buried region, located under the first hetero-interface, the buried p-type region configured to determine an enhancement mode FET turn-on threshold voltage to permit current flow between the source and the drain.
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公开(公告)号:US12230699B2
公开(公告)日:2025-02-18
申请号:US17067988
申请日:2020-10-12
Applicant: Analog Devices, Inc.
Inventor: Daniel Piedra , James G. Fiorenza , Puneet Srivastava
IPC: H01L29/778 , H01L29/10 , H01L29/16 , H01L29/20 , H01L29/66
Abstract: Integrated circuits can include semiconductor devices with back-side field plates. The semiconductor devices can be formed on substrates that have conductive layers located within the substrates. The conductive layers can include at least one of a conducting material or a semi-conducting material that modifies an electric field produced by the semiconductor devices. The semiconductor devices can include one or more semiconductor layers that include one or more materials having a compound material that includes at least one Group 13 element and at least one Group 15 element.
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公开(公告)号:US20240213239A1
公开(公告)日:2024-06-27
申请号:US18069777
申请日:2022-12-21
Applicant: Analog Devices, Inc.
Inventor: James G. Fiorenza , Daniel Piedra
CPC classification number: H01L27/0255 , H01L29/2003 , H01L29/402 , H01L29/45 , H01L29/66462 , H01L29/7786
Abstract: Techniques to integrate a p-n diode with a GaN HEMT, such as in a silicon carbide (SiC) substrate. The p-n diode provides avalanche robustness to the device and over voltage protection to the transistor.
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公开(公告)号:US20230154875A1
公开(公告)日:2023-05-18
申请号:US18148982
申请日:2022-12-30
Applicant: Analog Devices, Inc.
Inventor: Daniel Piedra , James G. Fiorenza , Puneet Srivastava , Andrew Proudman , Kenneth Flanders , Denis Michael Murphy , Leslie P. Green , Peter R. Stubler
IPC: H01L23/66 , H01L27/06 , H01L29/20 , H01L29/205 , H01L29/45 , H01L23/48 , H01L21/285 , H01L29/66 , H01L21/8252 , H01L29/778
CPC classification number: H01L23/66 , H01L21/8252 , H01L21/28575 , H01L23/481 , H01L27/0605 , H01L27/0629 , H01L28/60 , H01L29/205 , H01L29/452 , H01L29/2003 , H01L29/7786 , H01L29/66462 , H01L23/53214 , H01L2223/6616 , H01L2223/6683
Abstract: Gallium nitride-based monolithic microwave integrated circuits (MMICs) can comprise aluminum-based metals. Electrical contacts for gates, sources, and drains of transistors can include aluminum-containing metallic materials. Additionally, connectors, inductors, and interconnect devices can also comprise aluminum-based metals. The gallium-based MMICs can be manufactured in complementary metal oxide semiconductor (CMOS) facilities with equipment that produces silicon-based semiconductor devices.
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公开(公告)号:US20230133481A1
公开(公告)日:2023-05-04
申请号:US18148996
申请日:2022-12-30
Applicant: Analog Devices, Inc.
Inventor: Daniel Piedra , James G. Fiorenza , Puneet Srivastava , Andrew Proudman , Kenneth Flanders , Denis Michael Murphy , Leslie P. Green , Peter R. Stubler
IPC: H01L23/66 , H01L27/06 , H01L29/20 , H01L29/205 , H01L29/45 , H01L23/48 , H01L21/285 , H01L29/66 , H01L21/8252 , H01L29/778
Abstract: Gallium nitride-based monolithic microwave integrated circuits (MMICs) can comprise aluminum-based metals. Electrical contacts for gates, sources, and drains of transistors can include aluminum-containing metallic materials. Additionally, connectors, inductors, and interconnect devices can also comprise aluminum-based metals. The gallium-based MMICs can be manufactured in complementary metal oxide semiconductor (CMOS) facilities with equipment that produces silicon-based semiconductor devices.
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公开(公告)号:US12261134B2
公开(公告)日:2025-03-25
申请号:US18148996
申请日:2022-12-30
Applicant: Analog Devices, Inc.
Inventor: Daniel Piedra , James G. Fiorenza , Puneet Srivastava , Andrew Proudman , Kenneth Flanders , Denis Michael Murphy , Leslie P. Green , Peter R. Stubler
IPC: H01L23/66 , H01L21/285 , H01L21/8252 , H01L23/48 , H01L27/06 , H01L29/20 , H01L29/205 , H01L29/45 , H01L29/66 , H01L29/778 , H01L49/02 , H01L23/532 , H01L29/417
Abstract: Gallium nitride-based monolithic microwave integrated circuits (MMICs) can comprise aluminum-based metals. Electrical contacts for gates, sources, and drains of transistors can include aluminum-containing metallic materials. Additionally, connectors, inductors, and interconnect devices can also comprise aluminum-based metals. The gallium-based MMICs can be manufactured in complementary metal oxide semiconductor (CMOS) facilities with equipment that produces silicon-based semiconductor devices.
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公开(公告)号:US20240282848A1
公开(公告)日:2024-08-22
申请号:US18560066
申请日:2021-12-08
Applicant: Analog Devices, Inc.
Inventor: James G. Fiorenza , Christopher John Day , Guanghai Ding , Daniel Piedra
IPC: H01L29/778 , H01L29/20 , H01L29/40 , H03K17/687
CPC classification number: H01L29/7786 , H01L29/2003 , H01L29/407 , H03K17/687
Abstract: A semiconductor device including a transistor having a threshold voltage for switching the transistor from a first conductive state to a second conductive state. The transistor includes a first region formed by a first compound semiconductor material and a second region formed by a second compound semiconductor material, where the second region overlying the first region and forming a two-dimensional electron gas (2DEG) at a junction with the first region. The transistor further includes a buried field plate disposed proximate to the first region so that the 2DEG is interposed between the buried field plate and the second region. The semiconductor device further includes a control circuit configured to adjust the threshold voltage of the transistor by providing a bias voltage to the buried field plate responsive to an input signal received at the transistor.
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