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Patent Agency Ranking
公开(公告)号：US20250137853A1
公开(公告)日：2025-05-01
申请号：US18499514
申请日：2023-11-01
Applicant: Analog Devices, Inc.
Inventor： Michael C.W. Coln , Phillip Michel Nadeau , Qingdong Meng
Abstract: Circuitry and measurement approaches are described herein that can be used to reduce or suppress sensitivity to variation of sensor properties or characteristics over time for a respective monolithically integrated resistive temperature sensor. Such measurement approaches can also help to suppress measurement variations between sensors, such as to provide stable temperature measurement characteristics across locations and over time for the respective different temperature measurement sites on or within the integrated circuit package. The approaches described herein can also reduce or suppress sensitivity to variation in excitation source characteristics, such as using a relative indication (e.g., a ratio) of measured signal values corresponding to a respective temperature sensor and a co-integrated reference device. Calibration or absolute temperature measurements can be performed, such as using an off-chip (e.g., off-die or off-package) calibration reference. The off-chip calibration reference can be used to establish calibration data for other measurements.
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公开(公告)号：US09595982B2
公开(公告)日：2017-03-14
申请号：US14891257
申请日：2014-05-20
Applicant: ANALOG DEVICES, INC.
Inventor： Theophane Weber , Martin Steven McCormick , Qingdong Meng
CPC classification number: H04B1/0475 , H03F1/3247 , H03M1/002 , H03M1/1245 , H04L25/03019
Abstract: An approach to linearization relaxes the requirements on the digitization of the analog output signal while maintaining the benefits of a high sampling rate of the output signal. The digitization approach extracts sufficient information to characterize the output signal over a wide bandwidth without necessarily determining sufficient information to fully represent the output signal, for example, without sampling the output signal at the Nyquist sampling rate with a sufficient precision to accurately represent the signal.
Abstract translation: 线性化的方法放松了对模拟输出信号数字化的要求，同时保持了输出信号的高采样率的好处。 数字化方法提取足够的信息以在宽带宽上表征输出信号，而不必确定足够的信息以完全表示输出信号，例如，不以具有足够精度的奈奎斯特采样率对输出信号进行采样以精确地表示信号。
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公开(公告)号：US20170170839A1
公开(公告)日：2017-06-15
申请号：US15360349
申请日：2016-11-23
Applicant: ANALOG DEVICES, INC.
Inventor： Jialin Zhao , Qingdong Meng , Yunzhi Dong , Jose Barreiro Silva
CPC classification number: H03M1/1071 , H03M1/1038 , H03M1/16 , H03M1/38 , H03M1/46 , H03M3/412 , H03M3/464
Abstract: For analog-to-digital converters (ADCs) which utilize a feedback digital-to-analog converter (DAC) for conversion, the final analog output can be affected or distorted by errors of the feedback DAC. A digital measurement technique can be implemented to determine timing mismatch error for the feedback DAC in a continuous-time delta-sigma modulator (CTDSM) or in a continuous-time pipeline modulator. The methodology utilizes cross-correlation of each DAC unit elements (UEs) output to the entire modulator output to measure its timing mismatch error respectively. Specifically, the timing mismatch error is estimated using a ratio based on a peak value and a value for the next tap in the cross-correlation function. The obtained errors can be stored in a look-up table and fully corrected in digital domain or analog domain.
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公开(公告)号：US20240396510A1
公开(公告)日：2024-11-28
申请号：US18202241
申请日：2023-05-25
Applicant: Analog Devices, Inc.
Inventor： Michael C.W. Coln , Qingdong Meng , Phillip Michel Nadeau
IPC: H03F3/45
Abstract: An enhanced auto-zero circuitry and technique for reducing the effective input offset voltage of an amplifier. The circuitry includes a multi-phase auto-zeroing amplifier circuitry including several capacitor and switch components and a switch controller circuit. The switch controller circuit is configured to provide control signals for controlling the switches, where during a first sub-phase of an auto-zero phase, multiple switches are turned on to store an amplifier input offset coarser compensation charge on the input capacitor, and where during a second sub-phase of the auto-zero phase, at least one switch is turned off before turning on another switch to store an amplifier input offset finer compensation charge on the input capacitor via the first auto-zero capacitor.
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公开(公告)号：US09735797B2
公开(公告)日：2017-08-15
申请号：US15360349
申请日：2016-11-23
Applicant: ANALOG DEVICES, INC.
Inventor： Jialin Zhao , Qingdong Meng , Yunzhi Dong , Jose Barreiro Silva
CPC classification number: H03M1/1071 , H03M1/1038 , H03M1/16 , H03M1/38 , H03M1/46 , H03M3/412 , H03M3/464
Abstract: For analog-to-digital converters (ADCs) which utilize a feedback digital-to-analog converter (DAC) for conversion, the final analog output can be affected or distorted by errors of the feedback DAC. A digital measurement technique can be implemented to determine timing mismatch error for the feedback DAC in a continuous-time delta-sigma modulator (CTDSM) or in a continuous-time pipeline modulator. The methodology utilizes cross-correlation of each DAC unit elements (UEs) output to the entire modulator output to measure its timing mismatch error respectively. Specifically, the timing mismatch error is estimated using a ratio based on a peak value and a value for the next tap in the cross-correlation function. The obtained errors can be stored in a look-up table and fully corrected in digital domain or analog domain.
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