Filtering circuit fitted with acoustic resonators
    1.
    发明授权
    Filtering circuit fitted with acoustic resonators 有权
    滤波电路配有声谐振器

    公开(公告)号:US07696844B2

    公开(公告)日:2010-04-13

    申请号:US11829549

    申请日:2007-07-27

    IPC分类号: H03H9/54

    CPC分类号: H03H9/0095 H03H2009/02204

    摘要: A filtering circuit based on a lattice structure comprising a first and a second input and a first and second output. The circuit further comprises two series impedance and two parallel impedance which each comprises an acoustic resonator associated with two inductive and capacitive components which can be adjusted by a first control value. The second and fourth impedance comprise each an acoustic resonator associated to two inductive and capacitive components which are adjustable by means of a second control value. A control circuit generates the two control values which simultaneously comprise a common mode potential and a differential mode potential which allows the emergence of first and second pass bands which are usable for realizing two different bandpass filters.

    摘要翻译: 一种基于包括第一和第二输入以及第一和第二输出的晶格结构的滤波电路。 电路还包括两个串联阻抗和两个并联阻抗,每个阻抗均包括与两个电感和电容部件相关联的声谐振器,这两个电感和电容部件可以通过第一控制值进行调节。 第二和第四阻抗包括每个与谐振器相关联的声谐振器,两个电感和电容元件可通过第二控制值进行调节。 控制电路产生同时包括共模电位和差模电位的两个控制值,允许出现可用于实现两个不同带通滤波器的第一和第二通带。

    INTEGRATED CIRCUIT AND CORRESPONDING METHOD OF PROCESSING A MULTITYPE RADIO FREQUENCY DIGITAL SIGNAL
    2.
    发明申请
    INTEGRATED CIRCUIT AND CORRESPONDING METHOD OF PROCESSING A MULTITYPE RADIO FREQUENCY DIGITAL SIGNAL 有权
    集成电路和处理多模式无线电频率数字信号的相应方法

    公开(公告)号:US20110102224A1

    公开(公告)日:2011-05-05

    申请号:US12988265

    申请日:2009-04-16

    IPC分类号: H03M1/66 H03M3/00

    摘要: Integrated circuit, incorporating an electronic device (PA) comprising input means (BE) for receiving a radiofrequency digital signal (SCH), output means (BS) capable of delivering a radiofrequency analogue signal (SARF), and a processing stage coupled between the input means and the output means and comprising several processing channels (VTi) in parallel, each processing channel (VTi) including a voltage switching block (BLCi) the input of which is coupled to the input means and a transmission line (LTi) substantially of the quarter-wave type at the frequency of the radiofrequency analogue signal coupled in series between the output of the voltage switching block and the said output means.

    摘要翻译: 集成电路,包括电子设备(PA),其包括用于接收射频数字信号(SCH)的输入装置(BE),能够传送射频模拟信号(SARF)的输出装置(BS))和耦合在输入端 装置并且输出装置并且包括并行的多个处理通道(VTi),每个处理通道(VTi)包括其输入端耦合到输入装置的电压切换块(BLCi)和基本上为 在电压切换块的输出和所述输出装置之间串联耦合的射频模拟信号的频率处的四分之一波型。

    Transconductance filtering circuit
    3.
    发明申请
    Transconductance filtering circuit 有权
    跨导滤波电路

    公开(公告)号:US20070194854A1

    公开(公告)日:2007-08-23

    申请号:US11648146

    申请日:2006-12-29

    IPC分类号: H03F3/191

    CPC分类号: H03H11/0472 H03H11/0444

    摘要: A transconductance filtering device with a flexible architecture that can selectively present a different topology and/or order beginning with the same initial structure is disclosed. For example, depending on the communications standard detected, the elementary cells of the filtering circuit required to form the adapted filter are selected and connected in such a manner as to obtain the configuration desired for the filtering means. As an example, the filter may be for use with a wireless communications system forming, in particular, a cellular mobile telephone. The filter is configurable by means of at least two elementary cells of the same structure and of controllable interconnection means each having an open or closed state.

    摘要翻译: 公开了一种具有柔性架构的跨导滤波装置,其能够以相同的初始结构开始选择性地呈现不同的拓扑和/或顺序。 例如,根据检测到的通信标准,选择并连接形成适配滤波器所需的滤波电路的基本单元,以获得滤波装置所需的配置。 作为示例,滤波器可以用于形成特别是蜂窝移动电话的无线通信系统。 滤波器可以通过至少两个相同结构的基本单元和每个具有打开或关闭状态的可控互连装置来配置。

    Method for processing a digital signal in a digital delta-sigma modulator, and digital delta-sigma modulator therefor
    4.
    发明授权
    Method for processing a digital signal in a digital delta-sigma modulator, and digital delta-sigma modulator therefor 有权
    用于处理数字delta-sigma调制器中的数字信号的方法,以及用于其的数字delta-sigma调制器

    公开(公告)号:US08594226B2

    公开(公告)日:2013-11-26

    申请号:US12522011

    申请日:2008-01-10

    IPC分类号: H04L27/04 H04L27/20

    CPC分类号: H03M7/304 H03M7/3026

    摘要: The digital delta-sigma modulator includes a signal input for receiving digital samples of N bits, and a digital filter connected to the signal input. The digital filter performs addition/subtraction and integration operations according to a redundant arithmetic coding for delivering digital filtered samples. A quantizer performs a nonexact quantization operation so as to deliver digital output samples of n bits, with n being less than N. The input of the quantizer is connected within the digital filter.

    摘要翻译: 数字delta-sigma调制器包括用于接收N位数字采样的信号输入端和连接到信号输入端的数字滤波器。 数字滤波器根据用于传送数字滤波样本的冗余算术编码执行加法/减法和积分操作。 量化器执行非事件量化操作,以便在n小于N的情况下传送n位的数字输出采样。量化器的输入连接在数字滤波器内。

    Integrated circuit and corresponding method of processing a multitype radio frequency digital signal
    5.
    发明授权
    Integrated circuit and corresponding method of processing a multitype radio frequency digital signal 有权
    集成电路及相应的处理多频射频数字信号的方法

    公开(公告)号:US08212701B2

    公开(公告)日:2012-07-03

    申请号:US12988265

    申请日:2009-04-16

    IPC分类号: H03M3/00

    摘要: An integrated circuit includes input circuitry for receiving a radio frequency digital signal, output circuitry capable of delivering a radio frequency analog signal, and a processing stage coupled between the input circuitry and the output circuitry and including several processing channels in parallel. Each processing channel may include a voltage switching block the input of which is coupled to the input circuitry and a transmission line substantially of the quarter-wave type at the frequency of the radio frequency analog signal coupled in series between the output of the voltage switching block and the output circuitry.

    摘要翻译: 集成电路包括用于接收射频数字信号的输入电路,能够传送射频模拟信号的输出电路,以及耦合在输入电路和输出电路之间的处理级并且包括若干并行的处理通道。 每个处理通道可以包括其输入端耦合到输入电路的电压切换模块和基本上四分之一波型的传输线,其中射频模拟信号的频率串联耦合在电压切换模块 和输出电路。

    Transconductance filtering circuit
    6.
    发明授权
    Transconductance filtering circuit 有权
    跨导滤波电路

    公开(公告)号:US07511570B2

    公开(公告)日:2009-03-31

    申请号:US11648146

    申请日:2006-12-29

    IPC分类号: H03B1/00 H03K5/00 H04B1/10

    CPC分类号: H03H11/0472 H03H11/0444

    摘要: A transconductance filtering device with a flexible architecture that can selectively present a different topology and/or order beginning with the same initial structure is disclosed. For example, depending on the communications standard detected, the elementary cells of the filtering circuit required to form the adapted filter are selected and connected in such a manner as to obtain the configuration desired for the filtering means. As an example, the filter may be for use with a wireless communications system forming, in particular, a cellular mobile telephone. The filter is configurable by means of at least two elementary cells of the same structure and of controllable interconnection means each having an open or closed state.

    摘要翻译: 公开了一种具有柔性架构的跨导滤波装置,其能够以相同的初始结构开始选择性地呈现不同的拓扑和/或顺序。 例如,根据检测到的通信标准,选择并连接形成适配滤波器所需的滤波电路的基本单元,以获得滤波装置所需的配置。 作为示例,滤波器可以用于形成特别是蜂窝移动电话的无线通信系统。 滤波器可以通过至少两个相同结构的基本单元和每个具有打开或关闭状态的可控互连装置来配置。

    Logarithmic analog/digital conversion method for an analog input signal, and corresponding device
    7.
    发明授权
    Logarithmic analog/digital conversion method for an analog input signal, and corresponding device 有权
    模拟输入信号的对数模拟/数字转换方法及相应的器件

    公开(公告)号:US08493252B2

    公开(公告)日:2013-07-23

    申请号:US13032115

    申请日:2011-02-22

    IPC分类号: H03M1/84

    CPC分类号: H03M1/1235 H03M1/16

    摘要: A logarithmic analog to digital conversion method for an analog input signal includes a logarithmic amplification with progressive compression of the input signal delivering a sequence of several secondary analog signals. The trend of the values of at least some of the secondary signals is a function of the values of the analog input signal including regions corresponding to a linear trend of the secondary signals as a function of that of the input signal expressed in a logarithmic scale. The method also includes a comparison of at least some of the secondary signals of the sequence with a common reference signal whose value lies within each of regions, supplying a thermometric code information item, and a generation of a first digital word from the thermometric code information item.

    摘要翻译: 用于模拟输入信号的对数模数转换方法包括对输入信号进行逐次压缩的对数放大,该输入信号提供多个次级模拟信号的序列。 至少一些次级信号的值的趋势是模拟输入信号的值的函数,该模拟输入信号包括与辅助信号的线性趋势相对应的区域作为以对数刻度表示的输入信号的函数的函数。 该方法还包括将序列中的至少一些辅助信号与其值位于每个区域内的公共参考信号进行比较,提供测温代码信息项,以及从测温代码信息生成第一数字字 项目。

    LOGARITHMIC ANALOG/DIGITAL CONVERSION METHOD FOR AN ANALOG INPUT SIGNAL, AND CORRESPONDING DEVICE
    8.
    发明申请
    LOGARITHMIC ANALOG/DIGITAL CONVERSION METHOD FOR AN ANALOG INPUT SIGNAL, AND CORRESPONDING DEVICE 有权
    用于模拟输入信号的对数模拟/数字转换方法及相应的器件

    公开(公告)号:US20110205093A1

    公开(公告)日:2011-08-25

    申请号:US13032115

    申请日:2011-02-22

    IPC分类号: H03M1/10 H03M1/34

    CPC分类号: H03M1/1235 H03M1/16

    摘要: A logarithmic analog to digital conversion method for an analog input signal includes a logarithmic amplification with progressive compression of the input signal delivering a sequence of several secondary analog signals. The trend of the values of at least some of the secondary signals is a function of the values of the analog input signal including regions corresponding to a linear trend of the secondary signals as a function of that of the input signal expressed in a logarithmic scale. The method also includes a comparison of at least some of the secondary signals of the sequence with a common reference signal whose value lies within each of regions, supplying a thermometric code information item, and a generation of a first digital word from the thermometric code information item.

    摘要翻译: 用于模拟输入信号的对数模数转换方法包括对输入信号进行逐次压缩的对数放大,该输入信号提供多个次级模拟信号的序列。 至少一些次级信号的值的趋势是模拟输入信号的值的函数,该模拟输入信号包括与辅助信号的线性趋势相对应的区域作为以对数标度表示的输入信号的函数的函数。 该方法还包括将序列中的至少一些辅助信号与其值位于每个区域内的公共参考信号进行比较,提供测温代码信息项,以及从测温代码信息生成第一数字字 项目。

    Frequency tuning circuit for lattice filter
    9.
    发明授权
    Frequency tuning circuit for lattice filter 有权
    晶格滤波器频率调谐电路

    公开(公告)号:US07920036B2

    公开(公告)日:2011-04-05

    申请号:US12203003

    申请日:2008-09-02

    IPC分类号: H03H9/54 H03H3/04

    CPC分类号: H03H9/0095 H03H9/542 H03J7/02

    摘要: A lattice tunable filtering circuit includes a first input and a second input, and a first output and a second output. The circuit includes two series branches and two parallel branches. The first and second series branches include a Tunable Resonator Component (TRC) which presents a first series resonance frequency whereas the third and fourth parallel branches present a second series resonance frequency which has a value being lower than that of the first series resonance frequency. The first and second series resonance frequencies are tunable by one analog control quantity. The filtering circuit further includes a feedback control loop for the control of the analog quantity, which feedback is based on a criterion of equality between the modulus of impedances Zs and Zp.

    摘要翻译: 晶格可调滤波电路包括第一输入和第二输入,以及第一输出和第二输出。 该电路包括两个串联分支和两个并行分支。 第一和第二串联分支包括提供第一串联谐振频率的可调谐谐振器分量(TRC),而第三和第四并联分支呈现第二串联谐振频率,其具有低于第一串联谐振频率的值。 第一和第二串联谐振频率可通过一个模拟量控制量来调节。 滤波电路还包括用于控制模拟量的反馈控制回路,该反馈基于阻抗模Zs和Zp之间相等的标准。

    METHOD FOR PROCESSING A DIGITAL SIGNAL IN A DIGITAL DELTA-SIGMA MODULATOR, AND DIGITAL DELTA-SIGMA MODULATOR THEREFOR
    10.
    发明申请
    METHOD FOR PROCESSING A DIGITAL SIGNAL IN A DIGITAL DELTA-SIGMA MODULATOR, AND DIGITAL DELTA-SIGMA MODULATOR THEREFOR 有权
    用于在数字三角形调制器中处理数字信号的方法及其数字三角形调制器

    公开(公告)号:US20100142641A1

    公开(公告)日:2010-06-10

    申请号:US12522011

    申请日:2008-01-10

    IPC分类号: H04L27/00 G06F17/10 H03M3/02

    CPC分类号: H03M7/304 H03M7/3026

    摘要: The digital delta-sigma modulator includes a signal input for receiving digital samples of N bits, and a digital filter connected to the signal input. The digital filter performs addition/subtraction and integration operations according to a redundant arithmetic coding for delivering digital filtered samples. A quantizer performs a nonexact quantization operation so as to deliver digital output samples of n bits, with n being less than N. The input of the quantizer is connected within the digital filter.

    摘要翻译: 数字delta-sigma调制器包括用于接收N位数字采样的信号输入端和连接到信号输入端的数字滤波器。 数字滤波器根据用于传送数字滤波样本的冗余算术编码执行加法/减法和积分操作。 量化器执行非事件量化操作,以便在n小于N的情况下传送n位的数字输出采样。量化器的输入连接在数字滤波器内。