IOMMU architected TLB support
    1.
    发明授权
    IOMMU architected TLB support 有权
    IOMMU架构了TLB支持

    公开(公告)号:US08244978B2

    公开(公告)日:2012-08-14

    申请号:US12707341

    申请日:2010-02-17

    IPC分类号: G06F12/00

    摘要: Embodiments allow a smaller, simpler hardware implementation of an input/output memory management unit (IOMMU) having improved translation behavior that is independent of page table structures and formats. Embodiments also provide device-independent structures and methods of implementation, allowing greater generality of software (fewer specific software versions, in turn reducing development costs).

    摘要翻译: 实施例允许具有独立于页表结构和格式的改进的翻译行为的输入/输出存储器管理单元(IOMMU)的更小,更简单的硬件实现。 实施例还提供了与设备无关的结构和实现方法,允许更大程度的软件通用性(较少的特定软件版本,从而降低开发成本)。

    IOMMU Architected TLB Support
    2.
    发明申请
    IOMMU Architected TLB Support 有权
    IOMMU架构的TLB支持

    公开(公告)号:US20110202724A1

    公开(公告)日:2011-08-18

    申请号:US12707341

    申请日:2010-02-17

    IPC分类号: G06F12/10 G06F12/08

    摘要: Embodiments allow a smaller, simpler hardware implementation of an input/output memory management unit (IOMMU) having improved translation behavior that is independent of page table structures and formats. Embodiments also provide device-independent structures and methods of implementation, allowing greater generality of software (fewer specific software versions, in turn reducing development costs).

    摘要翻译: 实施例允许具有独立于页表结构和格式的改进的翻译行为的输入/输出存储器管理单元(IOMMU)的更小,更简单的硬件实现。 实施例还提供了与设备无关的结构和实现方法,允许更大程度的软件通用性(较少的特定软件版本,从而降低开发成本)。

    Direct Device Assignment
    3.
    发明申请
    Direct Device Assignment 审中-公开
    直接设备分配

    公开(公告)号:US20130145051A1

    公开(公告)日:2013-06-06

    申请号:US13309738

    申请日:2011-12-02

    IPC分类号: G06F3/00

    摘要: A system is enabled for configuring an IOMMU to provide direct access to system memory data by at least one I/O device/peripheral. Further, the IOMMU is configured to pass a pointer to at least one I/O device without having to translate the pointer. Further, commands are sent from a process within a guest operating system (OS) directly to a peripheral without intervention from a hypervisor. Further, the IOMMU is configured to grant peripherals access permissions to memory blocks to maintain isolation among peripherals.

    摘要翻译: 启用一个系统来配置IOMMU以通过至少一个I / O设备/外围设备直接访问系统内存数据。 此外,IOMMU被配置为将指针传递到至少一个I / O设备,而不必转换指针。 此外,命令从客户操作系统(OS)中的进程直接发送到外设,而无需管理程序的干预。 此外,IOMMU被配置为允许外设对存储器块的访问权限,以保持外设之间的隔离。

    MEMORY TYPES FOR CACHING POLICIES
    4.
    发明申请
    MEMORY TYPES FOR CACHING POLICIES 审中-公开
    缓存政策的内存类型

    公开(公告)号:US20130262736A1

    公开(公告)日:2013-10-03

    申请号:US13436342

    申请日:2012-03-30

    IPC分类号: G06F12/10 G06F12/08

    CPC分类号: G06F12/1081 G06F12/0888

    摘要: The present system enables receiving a request from an I/O device to translate a virtual address to a physical address to access the page in system memory. One or more memory attributes of the page defining a cacheability characteristic of the page is identified. A response including the physical address and the cacheability characteristic of the page is sent to the I/O device.

    摘要翻译: 本系统能够接收来自I / O设备的请求,以将虚拟地址转换为物理地址以访问系统存储器中的页面。 识别页面的一个或多个存储器属性来定义页面的可高速缓存性能。 包括页面的物理地址和缓存性能的响应被发送到I / O设备。

    Efficient Memory and Resource Management
    5.
    发明申请
    Efficient Memory and Resource Management 有权
    高效的内存和资源管理

    公开(公告)号:US20130138840A1

    公开(公告)日:2013-05-30

    申请号:US13308211

    申请日:2011-11-30

    IPC分类号: G06F13/28

    CPC分类号: G06F13/28

    摘要: The present system enables passing a pointer, associated with accessing data in a memory, to an input/output (I/O) device via an input/output memory management unit (IOMMU). The I/O device accesses the data in the memory via the IOMMU without copying the data into a local I/O device memory. The I/O device can perform an operation on the data in the memory based on the pointer, such that I/O device accesses the memory without expensive copies.

    摘要翻译: 本系统使得能够通过输入/输出存储器管理单元(IOMMU)将与访问存储器中的数据相关联的指针传递到输入/输出(I / O)设备。 I / O设备通过IOMMU访问存储器中的数据,而不将数据复制到本地I / O设备存储器中。 I / O设备可以基于指针对存储器中的数据执行操作,使得I / O设备访问存储器而不需要昂贵的副本。

    Peripheral Memory Management
    6.
    发明申请
    Peripheral Memory Management 审中-公开
    外设内存管理

    公开(公告)号:US20130145055A1

    公开(公告)日:2013-06-06

    申请号:US13309753

    申请日:2011-12-02

    IPC分类号: G06F13/28

    摘要: The present system enables an input/output (I/O) device to request memory for performing a direct memory access (DMA) of system memory. Further, the system uses an input/output memory management unit (IOMMU) to determine whether or not the system memory is available. The IOMMU notifies an operating system associated with the system memory if the system memory is not available, such that the operating system allocates non-system memory for use by the I/O device to perform the DMA.

    摘要翻译: 本系统使得输入/输出(I / O)设备能够请求存储器来执行系统存储器的直接存储器访问(DMA)。 此外,系统使用输入/输出存储器管理单元(IOMMU)来确定系统存储器是否可用。 如果系统内存不可用,IOMMU将通知与系统内存相关联的操作系统,以便操作系统分配非系统内存供I / O设备使用以执行DMA。

    Efficient memory and resource management
    7.
    发明授权
    Efficient memory and resource management 有权
    高效的内存和资源管理

    公开(公告)号:US08719464B2

    公开(公告)日:2014-05-06

    申请号:US13308211

    申请日:2011-11-30

    IPC分类号: G06F13/28 G06F21/00

    CPC分类号: G06F13/28

    摘要: The present system enables passing a pointer, associated with accessing data in a memory, to an input/output (I/O) device via an input/output memory management unit (IOMMU). The I/O device accesses the data in the memory via the IOMMU without copying the data into a local I/O device memory. The I/O device can perform an operation on the data in the memory based on the pointer, such that I/O device accesses the memory without expensive copies.

    摘要翻译: 本系统使得能够通过输入/输出存储器管理单元(IOMMU)将与访问存储器中的数据相关联的指针传递到输入/输出(I / O)设备。 I / O设备通过IOMMU访问存储器中的数据,而不将数据复制到本地I / O设备存储器中。 I / O设备可以基于指针对存储器中的数据执行操作,使得I / O设备访问存储器而不需要昂贵的副本。

    Systems and methods for sharing devices in a virtualization environment
    8.
    发明授权
    Systems and methods for sharing devices in a virtualization environment 有权
    在虚拟化环境中共享设备的系统和方法

    公开(公告)号:US09154451B2

    公开(公告)日:2015-10-06

    申请号:US13590700

    申请日:2012-08-21

    摘要: Described are systems and methods for communication between a plurality of electronic devices and an aggregation device. An aggregation device processes instructions related to a configuration of an electronic device in communication with the aggregation device. One or more virtual devices are generated in response to processing the instructions. The electronic device enumerates a configuration space to determine devices for use by the electronic device. The aggregation device detects an access of the configuration space by the electronic device. The one or more virtual devices are presented from the aggregation device to the electronic device in accordance with the instructions.

    摘要翻译: 描述了用于多个电子设备和聚合设备之间的通信的系统和方法。 聚合设备处理与聚合设备通信的电子设备的配置相关的指令。 响应于处理指令而产生一个或多个虚拟设备。 电子设备列举配置空间以确定电子设备使用的设备。 聚合设备检测电子设备对配置空间的访问。 一个或多个虚拟设备根据指令从聚合设备呈现给电子设备。

    Cache Management for Memory Operations
    9.
    发明申请
    Cache Management for Memory Operations 有权
    内存操作缓存管理

    公开(公告)号:US20130262775A1

    公开(公告)日:2013-10-03

    申请号:US13436767

    申请日:2012-03-30

    IPC分类号: G06F12/08

    摘要: Embodiments of the present invention provides for the execution of threads and/or workitems on multiple processors of a heterogeneous computing system in a manner that they can share data correctly and efficiently. Disclosed method, system, and article of manufacture embodiments include, responsive to an instruction from a sequence of instructions of a work-item, determining an ordering of visibility to other work-items of one or more other data items in relation to a particular data item, and performing at least one cache operation upon at least one of the particular data item or the other data items present in any one or more cache memories in accordance with the determined ordering. The semantics of the instruction includes a memory operation upon the particular data item.

    摘要翻译: 本发明的实施例提供在异构计算系统的多个处理器上执行线程和/或工作项,以使得它们可以正确且有效地共享数据。 公开的方法,系统和制品实施例包括响应于来自工作项目的指令序列的指令,确定与特定数据相关的一个或多个其他数据项的其他工作项的可见性的排序 并且根据所确定的顺序对存在于任何一个或多个高速缓存存储器中的特定数据项或其他数据项中的至少一个执行至少一个高速缓存操作。 指令的语义包括对特定数据项的存储器操作。

    Controlling an I/O MMU
    10.
    发明申请
    Controlling an I/O MMU 有权
    控制I / O MMU

    公开(公告)号:US20070038839A1

    公开(公告)日:2007-02-15

    申请号:US11503390

    申请日:2006-08-11

    IPC分类号: G06F12/00

    摘要: In an embodiment, a computer system comprises a processor; a memory management module comprising a plurality of instructions executable on the processor; a memory coupled to the processor; and an input/output memory management unit (IOMMU) coupled to the memory. The IOMMU is configured to implement address translation and memory protection for memory operations sourced by one or more input/output (I/O) devices. The memory stores a command queue during use. The memory management module is configured to write one or more control commands to the command queue, and the IOMMU is configured to read the control commands from the command queue and execute the control commands.

    摘要翻译: 在一个实施例中,计算机系统包括处理器; 存储器管理模块,包括可在所述处理器上执行的多个指令; 耦合到处理器的存储器; 以及耦合到存储器的输入/输出存储器管理单元(IOMMU)。 IOMMU被配置为对由一个或多个输入/输出(I / O)设备提供的存储器操作实现地址转换和存储器保护。 内存在使用过程中存储命令队列。 存储器管理模块被配置为将一个或多个控制命令写入命令​​队列,并且IOMMU被配置为从命令队列读取控制命令并执行控制命令。