Lattice-mismatched GaInP LED devices and methods of fabricating same
    1.
    发明授权
    Lattice-mismatched GaInP LED devices and methods of fabricating same 有权
    晶格不匹配的GaInP LED器件及其制造方法

    公开(公告)号:US08866146B2

    公开(公告)日:2014-10-21

    申请号:US13262509

    申请日:2010-04-15

    IPC分类号: H01L33/02 H01L33/00

    CPC分类号: H01L33/0075

    摘要: A method (100) of fabricating an LED or the active regions of an LED and an LED (200). The method includes growing, depositing or otherwise providing a bottom cladding layer (208) of a selected semiconductor alloy with an adjusted bandgap provided by intentionally disordering the structure of the cladding layer (208). A first active layer (202) may be grown above the bottom cladding layer (208) wherein the first active layer (202) is fabricated of the same semiconductor alloy, with however, a partially ordered structure. The first active layer (202) will also be fabricated to include a selected n or p type doping. The method further includes growing a second active layer (204) above the first active layer (202) where the second active layer (204) Is fabricated from the same semiconductor alloy.

    摘要翻译: 一种制造LED或LED的有源区域(100)的方法(100)。 该方法包括生长,沉积或以其它方式提供所选择的半导体合金的底部包层(208),其具有通过有意地排列包覆层(208)的结构而提供的调整的带隙。 可以在底部包层(208)上方生长第一有源层(202),其中第一有源层(202)由相同的半导体合金制成,然而,部分有序结构。 还将制造第一有源层(202)以包括所选择的n或p型掺杂。 该方法还包括在第一有源层(202)上方生长第二有源层(204),其中第二有源层(204)由相同的半导体合金制成。

    Lattice-Mismatched GaInP LED Devices and Methods of Fabricating Same
    2.
    发明申请
    Lattice-Mismatched GaInP LED Devices and Methods of Fabricating Same 有权
    晶格不匹配的GaInP LED器件及其制造方法

    公开(公告)号:US20120032187A1

    公开(公告)日:2012-02-09

    申请号:US13262509

    申请日:2010-04-15

    IPC分类号: H01L33/02

    CPC分类号: H01L33/0075

    摘要: A method (100) of fabricating an LED or the active regions of an LED and an LED (200). The method includes growing, depositing or otherwise providing a bottom cladding layer (208) of a selected semiconductor alloy with an adjusted bandgap provided by intentionally disordering the structure of the cladding layer (208). A first active layer (202) may be grown above the bottom cladding layer (208) wherein the first active layer (202) is fabricated of the same semiconductor alloy, with however, a partially ordered structure. The first active layer (202) will also be fabricated to include a selected n or p type doping. The method further includes growing a second active layer (204) above the first active layer (202) where the second active layer (204) Is fabricated from the same semiconductor alloy.

    摘要翻译: 一种制造LED或LED的有源区域(100)的方法(100)。 该方法包括生长,沉积或以其它方式提供所选择的半导体合金的底部包层(208),其具有通过有意地排列包覆层(208)的结构而提供的调整的带隙。 可以在底部包层(208)上方生长第一有源层(202),其中第一有源层(202)由相同的半导体合金制成,然而,部分有序结构。 还将制造第一有源层(202)以包括所选择的n或p型掺杂。 该方法还包括在第一有源层(202)上方生长第二有源层(204),其中第二有源层(204)由相同的半导体合金制成。

    OPTOELECTRONIC DEVICES HAVING A DIRECT-BAND-GAP BASE AND AN INDIRECT-BAND-GAP EMITTER
    3.
    发明申请
    OPTOELECTRONIC DEVICES HAVING A DIRECT-BAND-GAP BASE AND AN INDIRECT-BAND-GAP EMITTER 审中-公开
    具有直线带隙和间隔带隙发射体的光电器件

    公开(公告)号:US20110073887A1

    公开(公告)日:2011-03-31

    申请号:US12566769

    申请日:2009-09-25

    IPC分类号: H01L33/00 H01L29/20

    摘要: Optoelectronic devices, junctions and methods of fabricating a device or junction where the emitter layer is of an indirect-band-gap material and the base layer is of a direct-band-gap material. The device or junction may have, among other structures and layers, a base layer of a first semiconductor material having a first conductivity type and further having a direct band gap and an emitter layer forming a junction with the base layer. In this embodiment, the emitter layer may be of a second semiconductor material having a second conductivity type and further having an indirect band gap. The optoelectronic device may have the semiconductor material of the emitter layer substantially lattice mismatched with the semiconductor material of the base layer in bulk form. Alternatively, the emitter layer may be substantially lattice matched with the base layer.

    摘要翻译: 光电子器件,结和制造器件或结的方法,其中发射极层是间接带隙材料,而基极层是直接带隙材料。 除了其它结构和层之外,器件或结可以具有具有第一导电类型并且还具有直接带隙的第一半导体材料的基底层和与基底层形成结的发射极层。 在该实施例中,发射极层可以是具有第二导电类型并且还具有间接带隙的第二半导体材料。 光电子器件可以使发射极层的半导体材料与基底层的半导体材料基本上晶格错配,这是散装形式。 或者,发射极层可以与基极层基本上晶格匹配。

    High Bandgap III-V Alloys for High Efficiency Optoelectronics
    5.
    发明申请
    High Bandgap III-V Alloys for High Efficiency Optoelectronics 有权
    高带隙III-V合金高效光电子学

    公开(公告)号:US20130221326A1

    公开(公告)日:2013-08-29

    申请号:US13878738

    申请日:2011-10-12

    IPC分类号: H01L33/04 H01L33/00

    摘要: High bandgap alloys for high efficiency optoelectronics are disclosed. An exemplary optoelectronic device may include a substrate, at least one Al1-xInxP layer, and a step-grade buffer between the substrate and at least one Al1-xInxP layer. The buffer may begin with a layer that is substantially lattice matched to GaAs, and may then incrementally increase the lattice constant in each sequential layer until a predetermined lattice constant of Al1-xInxP is reached.

    摘要翻译: 公开了用于高效光电子的高带隙合金。 示例性光电子器件可以包括衬底,至少一个Al1-xInxP层,以及衬底和至少一个Al1-xInxP层之间的阶级缓冲器。 缓冲器可以以与GaAs基本上晶格匹配的层开始,然后可以递增地增加每个顺序层中的晶格常数,直到达到Al1-xInxP的预定晶格常数。

    MONOLITHIC, MULTI-BANDGAP, TANDEM, ULTRA-THIN, STRAIN-COUNTERBALANCED, PHOTOVOLTAIC ENERGY CONVERTERS WITH OPTIMAL SUBCELL BANDGAPS
    6.
    发明申请
    MONOLITHIC, MULTI-BANDGAP, TANDEM, ULTRA-THIN, STRAIN-COUNTERBALANCED, PHOTOVOLTAIC ENERGY CONVERTERS WITH OPTIMAL SUBCELL BANDGAPS 有权
    单片,多带,宽带,超薄,应变平衡,具有最佳SUBCELL BANDGAPS的光伏能量转换器

    公开(公告)号:US20090229659A1

    公开(公告)日:2009-09-17

    申请号:US12121463

    申请日:2008-05-15

    IPC分类号: H01L31/0256 H01L21/20

    摘要: Modeling a monolithic, multi-bandgap, tandem, solar photovoltaic converter or thermophotovoltaic converter by constraining the bandgap value for the bottom subcell to no less than a particular value produces an optimum combination of subcell bandgaps that provide theoretical energy conversion efficiencies nearly as good as unconstrained maximum theoretical conversion efficiency models, but which are more conducive to actual fabrication to achieve such conversion efficiencies than unconstrained model optimum bandgap combinations. Achieving such constrained or unconstrained optimum bandgap combinations includes growth of a graded layer transition from larger lattice constant on the parent substrate to a smaller lattice constant to accommodate higher bandgap upper subcells and at least one graded layer that transitions back to a larger lattice constant to accommodate lower bandgap lower subcells and to counter-strain the epistructure to mitigate epistructure bowing.

    摘要翻译: 通过将底部子电池的带隙值约束到不小于特定值来建模单片,多带隙,串联,太阳能光伏转换器或热光伏转换器可以产生最佳组合的子电池带隙,从而提供理论能量转换效率几乎与无约束 最大理论转换效率模型,但是比无约束模型最佳带隙组合更有利于实际制造以实现这种转换效率。 实现这种约束或无约束的最佳带隙组合包括从母基板上的较大晶格常数到较小晶格常数的渐变层跃迁的生长,以适应较高带隙上部子电池和至少一个渐变层,其转变回较大的晶格常数以适应 较低的带隙较低的子电池并且使得结构发生逆应以减轻结构弯曲。

    Boron, Bismuth Co-Doping of Gallium Arsenide and Other Compounds for Photonic and Heterojunction Bipolar Transistor Devices
    7.
    发明申请
    Boron, Bismuth Co-Doping of Gallium Arsenide and Other Compounds for Photonic and Heterojunction Bipolar Transistor Devices 有权
    硼,铋共掺杂砷化镓和其他化合物用于光子和异质结双极晶体管器件

    公开(公告)号:US20130327380A1

    公开(公告)日:2013-12-12

    申请号:US13877092

    申请日:2011-03-08

    IPC分类号: H01L31/0725 H01L29/737

    摘要: Isoelectronic co-doping of semiconductor compounds and alloys with acceptors and deep donors is sued to decrease bandgap, to increase concentration of the dopant constituents in the resulting alloys, and to increase carrier mobilities lifetimes. For example, Group III-V compounds and alloys, such as GaAs and GaP, are isoelectronically co-doped with, for example, B and Bi, to customize solar cells, and other semiconductor devices. Isoelectronically co-doped Group II-VI compounds and alloys are also included.

    摘要翻译: 要求半导体化合物和合金与受体和深供体的等电子共掺杂降低带隙,以增加所得合金中掺杂剂成分的浓度,并增加载流子迁移率寿命。 例如,III-V族化合物和诸如GaAs和GaP的合金与例如B和Bi的等电子共掺杂,以定制太阳能电池和其它半导体器件。 还包括等电子共掺杂的II-VI族化合物和合金。

    Monolithic photovoltaic energy conversion device
    9.
    发明申请
    Monolithic photovoltaic energy conversion device 审中-公开
    单片光伏能量转换装置

    公开(公告)号:US20070137698A1

    公开(公告)日:2007-06-21

    申请号:US10551598

    申请日:2002-02-27

    IPC分类号: H01L31/00

    摘要: A multijunction, monolithic, photovoltaic (PV) cell and device (600) is provided for converting radiant energy to photocurrent and photovoltage with improved efficiency. The PV cell includes an array of subcells (602), i.e., active p/n junctions, grown on a compliant substrate, where the compliant substrate accommodates greater flexibility in matching lattice constants to adjacent semiconductor material. The lattice matched semiconductor materials are selected with appropriate band-gaps to efficiently create photovoltage from a larger portion of the solar spectrum. Subcell strings (601, 603) from multiple PV cells are voltage matched to provide high output PV devices. A light emitting cell and device is also provided having monolithically grown red-yellow and green emission subcells and a mechanically stacked blue emission subcell.

    摘要翻译: 提供了一种多结,单片,光伏(PV)电池和装置(600),用于将辐射能转化为光电流和光电压,并提高效率。 PV电池包括在顺应性衬底上生长的子电池阵列(602),即活性p / n结,其中柔性衬底适应将晶格常数与相邻半导体材料相匹配的更大的灵活性。 用合适的带隙选择晶格匹配的半导体材料,以有效地从太阳光谱的较大部分产生光电压。 来自多个PV电池的子电池串(601,603)被电压匹配以提供高输出PV装置。 还提供了具有单片生长的红 - 黄和绿色发射子电池和机械堆叠的蓝色发射子电池的发光单元和器件。

    Multi-junction, monolithic solar cell with active silicon substrate
    10.
    发明申请
    Multi-junction, monolithic solar cell with active silicon substrate 审中-公开
    具有活性硅衬底的多结,单片太阳能电池

    公开(公告)号:US20060162767A1

    公开(公告)日:2006-07-27

    申请号:US10523745

    申请日:2002-08-16

    IPC分类号: H01L31/00

    摘要: A monolithic multi-junction (tandem) photo-voltaic (PV) device includes one or more PV subcells epitaxially formed on a compliant silicon substrate (102). The compliant silicon substrate (102) includes a base silicon layer (108), a conductive perovskite layer (112), and an oxide layer (110) interposed between the base silicon layer (108) and the conductive perovskite layer (112). A PV subcell is formed within the base silicon layer (108) of the conductive silicon substrate (102). The conductive perovskite layer (112) facilitates the conduction of charge carriers between the PV subcell formed in the compliant silicon substrate (102) and the one or more PV subcells formed on the compliant silicon substrate (102).

    摘要翻译: 单片多结(串联)光伏(PV)装置包括外延形成在柔性硅衬底(102)上的一个或多个PV子电池。 柔性硅衬底(102)包括基底硅层(108),导电钙钛矿层(112)和插入在基底硅层(108)和导电钙钛矿层(112)之间的氧化物层(110)。 PV电池形成在导电硅衬底(102)的基底硅层(108)内。 导电钙钛矿层(112)有助于在柔性硅衬底(102)中形成的PV子电池与形成在柔性硅衬底(102)上的一个或多个PV子电池之间的电荷载流子的传导。