METHOD AND HARDWARE FOR CLEANING UV CHAMBERS
    1.
    发明申请
    METHOD AND HARDWARE FOR CLEANING UV CHAMBERS 有权
    清洁紫外线灯的方法和硬件

    公开(公告)号:US20140053866A1

    公开(公告)日:2014-02-27

    申请号:US13970176

    申请日:2013-08-19

    Abstract: A cleaning method for a UV chamber involves providing a first cleaning gas, a second cleaning gas, and a purge gas to one or more openings in the chamber. The first cleaning gas may be an oxygen containing gas, such as ozone, to remove carbon residues. The second cleaning gas may be a remote plasma of NF3 and O2 to remove silicon residues. The UV chamber may have two UV transparent showerheads, which together with a UV window in the chamber lid, define a gas volume proximate the UV window and a distribution volume below the gas volume. A purge gas may be flowed through the gas volume while one or more of the cleaning gases is flowed into the distribution volume to prevent the cleaning gases from impinging on the UV transparent window.

    Abstract translation: 用于UV室的清洁方法包括向腔室中的一个或多个开口提供第一清洁气体,第二清洁气体和净化气体。 第一清洁气体可以是含氧气体,例如臭氧,以除去碳残留物。 第二清洁气体可以是NF3和O2的远程等离子体以除去硅残余物。 UV室可以具有两个UV透明花洒,其与室盖中的UV窗口一起限定靠近UV窗口的气体体积和低于气体体积的分布体积。 吹扫气体可以流过气体体积,同时一个或多个清洁气体流入分配容积以防止清洁气体撞击到UV透明窗口上。

    BOTTOM PUMP AND PURGE AND BOTTOM OZONE CLEAN HARDWARE TO REDUCE FALL-ON PARTICLE DEFECTS
    2.
    发明申请
    BOTTOM PUMP AND PURGE AND BOTTOM OZONE CLEAN HARDWARE TO REDUCE FALL-ON PARTICLE DEFECTS 审中-公开
    底部泵和冲洗和底部臭氧清洁硬件,以减少落下的颗粒缺陷

    公开(公告)号:US20150211114A1

    公开(公告)日:2015-07-30

    申请号:US14593068

    申请日:2015-01-09

    CPC classification number: C23C16/4412 C23C16/4405 C23C16/4408

    Abstract: Embodiments described herein generally relate to preventing contaminant deposition within a semiconductor processing chamber and removing contaminants from a semiconductor processing chamber. Bottom purging and pumping prevents contaminant deposition below a pedestal heater or exhausts contaminants from below the pedestal, respectively. Bottom purging prevents contaminants from depositing below the pedestal and provides for an exhaust from the processing chamber to be located substantially coplanar with a substrate being processed. Bottom pumping removes contaminants present below the pedestal from the processing chamber. Specifically, embodiments described herein relate to purging and pumping via a pedestal bellows and/or equalization port.

    Abstract translation: 本文描述的实施例通常涉及防止在半导体处理室内的污染物沉积并从半导体处理室去除污染物。 底部清洗和抽吸可以防止底座加热器下方的污染物沉积或分别从基座下方排出污染物。 底部清洗防止污染物沉积在基座下方,并且提供来自处理室的排气物,以与被处理的基底基本上共面定位。 底部泵送从处理室移除底座下面的污染物。 具体地,本文所述的实施例涉及通过基座波纹管和/或均衡端口的清洗和泵送。

    LIGHT IRRADIANCE AND THERMAL MEASUREMENT IN UV AND CVD CHAMBERS
    4.
    发明申请
    LIGHT IRRADIANCE AND THERMAL MEASUREMENT IN UV AND CVD CHAMBERS 审中-公开
    紫外光和CVD气体的光照辐射和热测量

    公开(公告)号:US20140264059A1

    公开(公告)日:2014-09-18

    申请号:US14174378

    申请日:2014-02-06

    CPC classification number: H01L21/67248 H01L21/67115

    Abstract: Embodiments of a semiconductor processing chamber described herein include a substrate support, a source of radiant energy opposite the substrate support, a window between the source of radiant energy and the substrate support, a detector sensitive to the radiant energy positioned to detect the radiant energy transmitted by the window, and a detector sensitive to radiation emitted by the substrate positioned to detect radiation emitted by the substrate. The chamber may also include a showerhead. The substrate support may be between the detectors and the window. A second radiant energy source may be included to project energy through the window to a detector. The second radiant energy source may also be located proximate the first radiant energy source and the detectors.

    Abstract translation: 本文所述的半导体处理室的实施例包括衬底支撑件,与衬底支撑件相对的辐射能源,在辐射源源与衬底支撑件之间的窗口,对辐射能敏感的检测器,其被定位以检测发射的辐射能 以及对由被定位成检测由衬底发射的辐射的衬底发射的辐射敏感的检测器。 腔室还可以包括喷头。 衬底支撑件可以在检测器和窗口之间。 可以包括第二辐射能源以将能量通过窗口投射到检测器。 第二辐射能量源也可以位于第一辐射能源和检测器附近。

    RECURSIVE COILS FOR INDUCTIVELY COUPLED PLASMAS

    公开(公告)号:US20200219698A1

    公开(公告)日:2020-07-09

    申请号:US16678081

    申请日:2019-11-08

    Abstract: Embodiments of the present disclosure generally relate to a semiconductor processing apparatus. More specifically, embodiments of the disclosure relate to generating and controlling plasma. A process chamber includes a chamber body that includes one or more chamber walls and defines a processing region. The process chamber also includes two or more inductively driven radio frequency (RF) coils in a concentric axial alignment, the RF coils arranged near the chamber walls to strike and sustain a plasma inside the chamber body, where at least two of the two or more RF coils are in a recursive configuration.

    DOME STRESS ISOLATING LAYER
    7.
    发明申请

    公开(公告)号:US20200181772A1

    公开(公告)日:2020-06-11

    申请号:US16691259

    申请日:2019-11-21

    Abstract: Embodiments described herein relate to apparatus and techniques for mechanical isolation and thermal insulation in a process chamber. In one embodiment, an insulating layer is disposed between a dome assembly and a gas ring. The insulating layer is configured to maintain a temperature of the dome assembly and prevent thermal energy transfer from the dome assembly to the gas ring. The insulating layer provides mechanical isolation of the dome assembly from the gas ring. The insulating layer also provides thermal insulation between the dome assembly and the gas ring. The insulating layer may be fabricated from a polyimide containing material, which substantially reduces an occurrence of deformation of the insulating layer.

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