公开(公告)号：US09646893B2

公开(公告)日：2017-05-09

申请号：US15075094

申请日：2016-03-18

Applicant: Applied Materials, Inc.

Inventor： Gary E. Dickerson ,  Seng (victor) Keong Lim ,  Samer Banna ,  Gregory Kirk ,  Mehdi Vaez-Iravani

IPC: H01L21/67 ,  H01L21/66 ,  H01L21/324 ,  H01L21/027 ,  H01L21/683

CPC classification number: H01L21/67248 ,  H01L21/0273 ,  H01L21/324 ,  H01L21/67103 ,  H01L21/67115 ,  H01L21/67253 ,  H01L21/6831 ,  H01L22/12

Abstract: Embodiments of the present disclosure relate to an apparatus and a method for reducing the adverse effects of exposing portions of an integrated circuit (IC) device to various forms of radiation during one or more operations found within the IC formation processing sequence by controlling the environment surrounding and temperature of an IC device during one or more parts of the IC formation processing sequence. The provided energy may include the delivery of radiation to a surface of a formed or a partially formed IC device during a deposition, etching, inspection or post-processing process operation. In some embodiments of the disclosure, the temperature of the substrate on which the IC device is formed is controlled to a temperature that is below room temperature (e.g.,

公开(公告)号：US09978620B2

公开(公告)日：2018-05-22

申请号：US15584767

申请日：2017-05-02

Applicant: Applied Materials, Inc.

Inventor： Gary E. Dickerson ,  Seng (victor) Keong Lim ,  Samer Banna ,  Gregory Kirk ,  Mehdi Vaez-Iravani

IPC: H01L21/67 ,  H01L21/324 ,  H01L21/683 ,  H01L21/66 ,  H01L21/027

CPC classification number: H01L21/67248 ,  H01L21/0273 ,  H01L21/324 ,  H01L21/67103 ,  H01L21/67115 ,  H01L21/67253 ,  H01L21/6831 ,  H01L22/12

Abstract: Embodiments of the present disclosure relate to an apparatus and a method for reducing the adverse effects of exposing portions of an integrated circuit (IC) device to various forms of radiation during one or more operations found within the IC formation processing sequence by controlling the environment surrounding and temperature of an IC device during one or more parts of the IC formation processing sequence. The provided energy may include the delivery of radiation to a surface of a formed or a partially formed IC device during a deposition, etching, inspection or post-processing process operation. In some embodiments of the disclosure, the temperature of the substrate on which the IC device is formed is controlled to a temperature that is below room temperature (e.g.,

公开(公告)号：US11119051B2

公开(公告)日：2021-09-14

申请号：US17062231

申请日：2020-10-02

Applicant: Applied Materials, Inc.

Inventor： Todd Egan ,  Mehdi Vaez-Iravani ,  Samer Banna ,  Kyle Tantiwong ,  Gregory Kirk ,  Abraham Ravid ,  Yaoming Shen

IPC: G01N21/00 ,  G01N21/95 ,  H01L21/67 ,  G01N15/02 ,  G01N15/14 ,  G01N21/94

Abstract: A system for processing a substrate is provided. The system includes a process chamber including one or more sidewalls enclosing a processing region; and a substrate support. The system further includes a passageway connected to the process chamber; and a first particle detector disposed at a first location along the passageway. The first particle detector includes an energy source configured to emit a first beam; one or more optical devices configured to direct the first beam along one or more paths, where the one or more paths extend through at least a portion of the passageway. The first particle detector further includes a first energy detector disposed at a location other than on the one or more paths. The system further includes a controller configured to communicate with the first particle detector, wherein the controller is configured to identify a fault based on signals received from the first particle detector.