公开(公告)号：US12002705B2

公开(公告)日：2024-06-04

申请号：US17670777

申请日：2022-02-14

Applicant: Applied Materials, Inc.

Inventor： He Ren ,  Houssam Lazkani ,  Raman Gaire ,  Mehul Naik ,  Kuan-Ting Liu

IPC: H01L21/74 ,  H01L21/02 ,  H01L23/528 ,  H01L23/535

CPC classification number: H01L21/743 ,  H01L21/02016 ,  H01L21/02365 ,  H01L23/5286 ,  H01L23/535

Abstract: A method that forms a sacrificial fill material that can be selectively removed for forming a backside contact via for a transistor backside power rail. In some embodiments, the method may include performing an etching process on a substrate with an opening that is conformally coated with an oxide layer, wherein the etching process is an anisotropic dry etch process using a chlorine gas to remove the oxide layer from a field of the substrate and only from a bottom portion of the opening, and wherein the etching process forms a partial oxide spacer in the opening and increases a depth of the opening and epitaxially growing the sacrificial fill material in the opening by flowing a hydrogen chloride gas at a rate of approximately 60 sccm to approximately 90 sccm in a chamber pressure of approximately 1 Torr to approximately 100 Torr.

公开(公告)号：US12125699B2

公开(公告)日：2024-10-22

申请号：US17359947

申请日：2021-06-28

Applicant: Applied Materials, Inc.

Inventor： Abhijeet S. Bagal ,  Qian Fu ,  Kuan-Ting Liu ,  Chung Liu

IPC: H01L21/02 ,  H01L21/263

CPC classification number: H01L21/02115 ,  H01L21/02274 ,  H01L21/2636

Abstract: Semiconductor processing methods are described that include providing a substrate to a reaction chamber, where the substrate includes substrate trenches that have a top surface and a bottom surface. A deposition gas that includes a carbon-containing gas and a nitrogen-containing gas flows into a plasma excitation region of the reaction chamber. A deposition plasma having an electron temperature less than or about 4 eV is generated from the deposition gas. The methods further include depositing a carbon-containing layer on the top surface and the bottom surface of the substrate trenches, where the as-deposited carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1. Also described are semiconductor structures that include an as-deposited carbon-containing layer on the top and bottom surface of at least a first and second trench, where the carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1.

公开(公告)号：US20220415648A1

公开(公告)日：2022-12-29

申请号：US17359947

申请日：2021-06-28

Applicant: Applied Materials, Inc.

Inventor： Abhijeet S. Bagal ,  Qian Fu ,  Kuan-Ting Liu ,  Chung Liu

IPC: H01L21/02 ,  H01L21/263

Abstract: Semiconductor processing methods are described that include providing a substrate to a reaction chamber, where the substrate includes substrate trenches that have a top surface and a bottom surface. A deposition gas that includes a carbon-containing gas and a nitrogen-containing gas flows into a plasma excitation region of the reaction chamber. A deposition plasma having an electron temperature less than or about 4 eV is generated from the deposition gas. The methods further include depositing a carbon-containing layer on the top surface and the bottom surface of the substrate trenches, where the as-deposited carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1. Also described are semiconductor structures that include an as-deposited carbon-containing layer on the top and bottom surface of at least a first and second trench, where the carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1.

公开(公告)号：US12237149B2

公开(公告)日：2025-02-25

申请号：US17984772

申请日：2022-11-10

Applicant: Applied Materials, Inc.

Inventor： Deyang Li ,  Sunil Srinivasan ,  Yi-Chuan Chou ,  Shahid Rauf ,  Kuan-Ting Liu ,  Jason A. Kenney ,  Chung Liu ,  Olivier P. Joubert ,  Shreeram Jyoti Dash ,  Aaron Eppler ,  Michael Thomas Nichols

IPC: H01J37/00 ,  H01J37/32

Abstract: Embodiments of the present disclosure generally relate to a system used in a semiconductor device manufacturing process. More specifically, embodiments provided herein generally include apparatus and methods for synchronizing and controlling the delivery of an RF bias signal and a pulsed voltage waveform to one or more electrodes within a plasma processing chamber. The apparatus and methods disclosed herein can be useful to at least minimize or eliminate a microloading effect created while processing small dimension features that have differing densities across various regions of a substrate. The plasma processing methods and apparatus described herein are configured to improve the control of various characteristics of the generated plasma and control an ion energy distribution (IED) of the plasma generated ions that interact with a surface of a substrate during plasma processing. The ability to synchronize and control waveform characteristics of a voltage waveform bias established on a substrate during processing allows for an improved control of the generated plasma and process of forming, for example, high-aspect ratio features in the surface of the substrate by a reactive ion etching process. As a result, greater precision for plasma processing can be achieved, which is described herein in more detail.

公开(公告)号：US20240420948A1

公开(公告)日：2024-12-19

申请号：US18816702

申请日：2024-08-27

Applicant: Applied Materials, Inc.

Inventor： Abhijeet S. Bagal ,  Qian Fu ,  Kuan-Ting Liu ,  Chung Liu

IPC: H01L21/02 ,  H01L21/263

Abstract: Semiconductor processing methods are described that include providing a substrate to a reaction chamber, where the substrate includes substrate trenches that have a top surface and a bottom surface. A deposition gas that includes a carbon-containing gas and a nitrogen-containing gas flows into a plasma excitation region of the reaction chamber. A deposition plasma having an electron temperature less than or about 4 eV is generated from the deposition gas. The methods further include depositing a carbon-containing layer on the top surface and the bottom surface of the substrate trenches, where the as-deposited carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1. Also described are semiconductor structures that include an as-deposited carbon-containing layer on the top and bottom surface of at least a first and second trench, where the carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1.

公开(公告)号：US09236255B2

公开(公告)日：2016-01-12

申请号：US14313246

申请日：2014-06-24

Applicant: APPLIED MATERIALS, INC.

Inventor： Sang Wook Kim ,  Han Soo Cho ,  Joo Won Han ,  Kee Young Cho ,  Kuan-Ting Liu ,  Anisul Khan

IPC: H01L21/3065 ,  H01L21/308 ,  H01L21/027 ,  H01L21/311 ,  H01L21/3213 ,  H01L27/115

CPC classification number: H01L21/0273 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/32137 ,  H01L21/32139 ,  H01L27/11548 ,  H01L27/11575

Abstract: In some embodiments, a method of forming a three dimensional NAND structure atop a substrate may include providing to a process chamber a substrate having alternating nitride layers and oxide layers or alternating polycrystalline silicon layers and oxide layers formed atop the substrate and a photoresist layer formed atop the alternating layers; etching the photoresist layer to expose at least a portion of the alternating nitride layers and oxide layers or alternating polycrystalline silicon layers and oxide layers; providing a process gas comprising sulfur hexafluoride (SF6), carbon tetrafluoride (CF4), and oxygen (O2) to the process chamber; providing an RF power of about 4 kW to about 6 kW to an RF coil to ignite the process gas to form a plasma; and etching through a desired number of the alternating layers to form a feature of a NAND structure.

Abstract translation: 在一些实施例中，在衬底顶部形成三维NAND结构的方法可以包括向处理室提供具有交替的氮化物层和氧化物层或交替的多晶硅层和形成在衬底顶部的氧化物层的衬底，以及形成在顶部的光致抗蚀剂层 交替层; 蚀刻光致抗蚀剂层以暴露交替的氮化物层和氧化物层或交替的多晶硅层和氧化物层的至少一部分; 提供包括六氟化硫（SF6），四氟化碳（CF4）和氧气（O2））的处理气体到处理室; 向RF线圈提供约4kW至约6kW的RF功率以点燃工艺气体以形成等离子体; 并蚀刻通过所需数量的交替层以形成NAND结构的特征。