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    OVERLAYING ON LOCALLY DISPOSITIONED PATTERNS BY ML BASED DYNAMIC DIGITAL CORRECTIONS (ML-DDC)
    3.
    发明申请
    OVERLAYING ON LOCALLY DISPOSITIONED PATTERNS BY ML BASED DYNAMIC DIGITAL CORRECTIONS (ML-DDC) 有权

    公开(公告)号：US20230040198A1

    公开(公告)日：2023-02-09

    申请号：US17396453

    申请日：2021-08-06

    Applicant: Applied Materials, Inc.

    Inventor： Tamer COSKUN ,  Aidyn KEMELDINOV ,  Chung-Shin KANG ,  Uwe HOLLERBACH ,  Thomas L. LAIDIG

    IPC: G06F30/392 ,  H01L21/68 ,  G06N20/00

    Abstract: Systems and methods disclosed are generally related to masklessly developing connections between a chip-group and a design connection point on a substrate. In placement of the chip-group on the substrate, according to certain embodiments the chip-group may be dispositioned relative to an expected position per a substrate layout design, causing a connection misalignment with the design connection point. According to certain embodiments, a machine learning (ML) model is trained on historical and simulated pixel models of chip-group connections and design connection points. Upon determining the chip-group misalignment by a metrology measurement, the trained ML model determines a pixel model to connect the misaligned chip-group, and causes the pixel model to be exposed to a substrate with a digital lithography tool, thereby connecting the dispositioned chip-group to the design connection point.

    OVERLAYING ON LOCALLY DISPOSITIONED PATTERNS BY ML BASED DYNAMIC DIGITAL CORRECTIONS (ML-DDC)
    5.
    发明公开
    OVERLAYING ON LOCALLY DISPOSITIONED PATTERNS BY ML BASED DYNAMIC DIGITAL CORRECTIONS (ML-DDC) 审中-公开

    公开(公告)号：US20240249062A1

    公开(公告)日：2024-07-25

    申请号：US18439287

    申请日：2024-02-12

    Applicant: Applied Materials, Inc.

    Inventor： Tamer COSKUN ,  Aidyn KEMELDINOV ,  Chung-Shin KANG ,  Uwe HOLLERBACH ,  Thomas L. LAIDIG

    IPC: G06F30/392 ,  G06N20/00 ,  H01L21/68

    CPC classification number: G06F30/392 ,  G06N20/00 ,  H01L21/68

    Abstract: Systems and methods disclosed are generally related to masklessly developing connections between a chip-group and a design connection point on a substrate. In placement of the chip-group on the substrate, according to certain embodiments the chip-group may be dispositioned relative to an expected position per a substrate layout design, causing a connection misalignment with the design connection point. According to certain embodiments, a machine learning (ML) model is trained on historical and simulated pixel models of chip-group connections and design connection points. Upon determining the chip-group misalignment by a metrology measurement, the trained ML model determines a pixel model to connect the misaligned chip-group, and causes the pixel model to be exposed to a substrate with a digital lithography tool, thereby connecting the dispositioned chip-group to the design connection point.

    REAL TIME SOFTWARE AND ARRAY CONTROL
    7.
    发明申请
    REAL TIME SOFTWARE AND ARRAY CONTROL 审中-公开

    公开(公告)号：US20190271916A1

    公开(公告)日：2019-09-05

    申请号：US16400563

    申请日：2019-05-01

    Applicant: Applied Materials, Inc.

    Inventor： Uwe HOLLERBACH ,  Thomas L. LAIDIG ,  Mark HUNT ,  Don STARSES

    IPC: G03F7/20

    Abstract: A real time software and array control software application platform which maintains the ability to manage the synchronization between substrate alignments and image projection systems during maskless lithography patterning in a manufacturing process is disclosed. The application coordinates and controls the image projection systems such that discrepancies in and misalignments of the substrate may be determined and accounted for in real time. The image projection systems may run in parallel and may be controlled by a central processor.

    REAL TIME SOFTWARE AND ARRAY CONTROL
    8.
    发明申请
    REAL TIME SOFTWARE AND ARRAY CONTROL 审中-公开
    实时软件和阵列控制

    公开(公告)号：US20160282849A1

    公开(公告)日：2016-09-29

    申请号：US15078419

    申请日：2016-03-23

    Applicant: Applied Materials, Inc.

    Inventor： Uwe HOLLERBACH ,  Thomas L. LAIDIG ,  Mark HUNT ,  Don STARSES

    IPC: G05B19/4099

    CPC classification number: G03F7/70783 ,  G03F7/70258 ,  G03F7/70275 ,  G03F7/70291 ,  G03F7/70508 ,  G05B2219/45028

    Abstract: A real time software and array control software application platform which maintains the ability to manage the synchronization between substrate alignments and image projection systems during maskless lithography patterning in a manufacturing process is disclosed. The application coordinates and controls the image projection systems such that discrepancies in and misalignments of the substrate may be determined and accounted for in real time. The image projection systems may run in parallel and may be controlled by a central processor.

    Abstract translation: 公开了一种实时软件和阵列控制软件应用平台，其在制造过程中在无掩模光刻图案化期间保持管理衬底对准和图像投影系统之间的同步的能力。 应用程序协调和控制图像投影系统，使得可以确定并且实时地考虑基板的偏差和不对准。 图像投影系统可以并行运行并且可以由中央处理器来控制。

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