公开(公告)号：US20200161181A1

公开(公告)日：2020-05-21

申请号：US16669082

申请日：2019-10-30

Applicant: Applied Materials, Inc.

Inventor： Wenhui WANG ,  Huixiong DAI ,  Christopher S. NGAI ,  Liqi WU ,  Wenyu ZHANG ,  Yongmei CHEN ,  Hao CHEN ,  Keith Tatseun WONG ,  Ke CHANG

IPC: H01L21/768 ,  H01L23/535 ,  H01L21/033 ,  H01L21/02

Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits, and more particularly, to methods for forming a layer. The layer may be a mask used in lithography process to pattern and form a trench. The mask is formed over a substrate having at least two distinct materials by a selective deposition process. The edges of the mask are disposed on an intermediate layer formed on at least one of the two distinct materials. The method includes removing the intermediate layer to form a gap between edges of the mask and the substrate and filling the gap with a different material than the mask or with the same material as the mask. By filling the gap with the same or different material as the mask, electrical paths are improved.

公开(公告)号：US20240352577A1

公开(公告)日：2024-10-24

申请号：US18758099

申请日：2024-06-28

Applicant: Applied Materials, Inc.

Inventor： Chang KE ,  Wenyu ZHANG ,  Liqi WU

IPC: C23C16/18 ,  C23C16/02 ,  C23C16/04 ,  C23C16/08 ,  C23C16/455

CPC classification number: C23C16/18 ,  C23C16/0281 ,  C23C16/04 ,  C23C16/08 ,  C23C16/45525

Abstract: Methods and apparatus for selectively depositing a layer atop a substrate having a metal surface and a dielectric surface is disclosed, including: (a) contacting the metal surface with one or more metal halides such as metal chlorides or metal fluorides to form an exposed metal surface; (b) growing an organosilane based self-assembled monolayer atop the dielectric surface; and (c) selectively depositing a layer atop the exposed metal surface of the substrate, wherein the organosilane based self-assembled monolayer inhibits deposition of the layer atop the dielectric surface.

公开(公告)号：US20170179252A1

公开(公告)日：2017-06-22

申请号：US15043883

申请日：2016-02-15

Applicant: APPLIED MATERIALS, INC.

Inventor： Wei V. TANG ,  Paul F. MA ,  Steven C. H. HUNG ,  Michael CHUDZIK ,  Siddarth KRISHNAN ,  Wenyu ZHANG ,  Seshadri GANGULI ,  Naomi YOSHIDA ,  Lin DONG ,  Yixiong YANG ,  Liqi WU ,  Shih Chung CHEN

IPC: H01L29/66 ,  H01L29/49 ,  H01L29/51 ,  H01L29/786 ,  H01L21/02

CPC classification number: H01L29/66446 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78603 ,  H01L29/78681

Abstract: Semiconductor devices incorporating multi-threshold voltage structures and methods of forming such semiconductor devices are provided herein. In some embodiments of the present disclosure, a semiconductor device having a multi-threshold voltage structure includes: a substrate; a gate dielectric layer atop the substrate, wherein the gate dielectric layer comprises an interface layer and a high-k dielectric layer atop the interface layer; a lanthanum nitride layer deposited atop the high-k dielectric layer; an interface of the interface layer and the high-k dielectric layer comprising lanthanum species from the lanthanum nitride layer; and a gate electrode layer atop the lanthanum nitride layer.