Abstract:
Methods and systems involve collecting memory device parameters and using memory device parameters to determine memory wear information. A set of first parameters associated with wear of the memory device is monitored for at least one memory unit of the memory device. The first parameters are compared to respective trigger criterion. If the comparison reveals that one or more of the first parameters are beyond their trigger criterion, then collection of a second set of parameters is triggered. The second parameters are also indicative of the wear of the memory device. The set of first parameters may overlap the set of second parameters. The set of second parameters are used to develop memory wear information. In some implementations, the memory wear information may be configuration information used to configure the read/write channel to compensate for wear of the memory device. In some implementations, the memory wear information may be used to predict or estimate the lifetime of the device.
Abstract:
A nominal reference read operation compares analog voltages of the memory cells to at least one nominal reference voltage. A shifted reference read operation compares the analog voltages of the memory cells to at least one shifted reference voltage that is shifted from the nominal reference voltage to compensate for an expected change in the analog voltages of the memory cells. Data stored in the memory cells is decoded by a first decoding process that uses the information from either the nominal reference read operation or the shifted reference read operation. The data stored in the memory cells is decoded by a second decoding process that uses the information from both the nominal reference read operation and the shifted reference read operation.
Abstract:
Methods and systems involve collecting memory device parameters and using memory device parameters to determine memory wear information. A set of first parameters associated with wear of the memory device is monitored for at least one memory unit of the memory device. The first parameters are compared to respective trigger criterion. If the comparison reveals that one or more of the first parameters are beyond their trigger criterion, then collection of a second set of parameters is triggered. The second parameters are also indicative of the wear of the memory device. The set of first parameters may overlap the set of second parameters. The set of second parameters are used to develop memory wear information. In some implementations, the memory wear information may be configuration information used to configure the read/write channel to compensate for wear of the memory device. In some implementations, the memory wear information may be used to predict or estimate the lifetime of the device.
Abstract:
Approaches for decoding data read from memory cells of a nonvolatile, solid state memory involve attempting to decode hard data using a hard decoding process prior to a time that soft data is available to the decoder. The hard data includes information about the digital symbols stored in the memory cells without data confidence information. The soft data includes information about the digital symbols stored in the memory cells and data confidence information. In response to the hard decoding process failing to achieve convergence, after the soft data becomes available to the decoder, the soft data is decoded using a soft decoding process. The decoder generates an output of the decoded data after the hard decoding process or the soft decoding process achieves convergence.
Abstract:
An iterative decoder is controlled to iteratively decode a block by performing one or more decoding iterations for the block. The iterative decoder uses a parity-check matrix and can be configured to process that parity-check matrix for parallel, sequential or a combination of parallel and sequential (“hybrid”) parity constraint updates.
Abstract:
An iterative decoder is controlled to iteratively decode a block by performing one or more decoding iterations for the block during a predetermined block time. The iterative decoder is further controlled to perform more decoding iterations for the block during a time in which the hardware of the iterative decoder is available, if the block fails to converge to correct data during the predetermined block time. The iterative decoder uses a parity-check matrix and can be configured to process that parity-check matrix for parallel, sequential or a combination of parallel and sequential (“hybrid”) parity constraint updates.
Abstract:
A disk drive includes a rotatable data storage disk, a transducer, an actuator, and a servo burst demodulator. The rotatable data storage disk includes a plurality of servo burst patterns thereon. The plurality of servo burst patterns are substantially radially aligned to each other, and radially adjacent ones of the servo burst patterns are configured to generate contributions to a read signal that are substantially orthogonal to each other. The transducer is configured to read the servo burst patterns on the disk to generate the read signal. The actuator is configured to position the transducer relative to the disk. The servo burst demodulator is configured to identify a separate contribution to the read signal from the radially adjacent servo burst patterns. The servo burst demodulator may be configured to generate transducer position information based on the identified separate contribution to the read signal from the radially adjacent servo burst patterns.
Abstract:
Multiple logical pages are jointly encoded into a single code word and are stored in the same physical page of a solid state non-volatile memory (NVM) device having multi-level memory cells. A first logical page of the multiple logical pages is stored in the memory device as first bits of the multi-level memory cells while a second logical page of the multiple logical pages is temporarily cached. After the first logical page is stored as the first bits of the memory cell, the second logical page is stored as second bits of the memory cells.
Abstract:
A pointer-based modulation coding method and apparatus are presented. The pointer-based modulation coding operates to produce, from an unconstrained data stream of data blocks to be delivered to a data channel, a constrained data stream which satisfies a code constraint of the data channel. The pointer-based modulation coding replaces code constraint violating bit sequences occurring in each data block with values that form a linked list in such data block.
Abstract:
A disk drive includes a rotatable data storage disk, a head, a heater element, and a controller. The disk includes a plurality of data sectors between servo spokes. The head is configured to fly on an air cushion relative to the rotating disk while writing data on the data sectors. The heater element is attached to the head and configured to controllably heat the head responsive to a heater signal. The controller determines an upcoming pattern of selected ones of the data sectors on which data is to be written through the head in response to at least one write command from a host device, and controls the heater signal in response to the determined upcoming pattern of data sectors on which data is to be written.