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公开(公告)号：US08745318B2
公开(公告)日：2014-06-03
申请号：US13170794
申请日：2011-06-28
Applicant: Bernardo Rub , Ara Patapoutian , Bruce Buch
Inventor： Bernardo Rub , Ara Patapoutian , Bruce Buch
IPC: G06F12/00
CPC classification number: G06F12/0246 , G06F2212/7205 , G06F2212/7211
Abstract: Methods and systems involve collecting memory device parameters and using memory device parameters to determine memory wear information. A set of first parameters associated with wear of the memory device is monitored for at least one memory unit of the memory device. The first parameters are compared to respective trigger criterion. If the comparison reveals that one or more of the first parameters are beyond their trigger criterion, then collection of a second set of parameters is triggered. The second parameters are also indicative of the wear of the memory device. The set of first parameters may overlap the set of second parameters. The set of second parameters are used to develop memory wear information. In some implementations, the memory wear information may be configuration information used to configure the read/write channel to compensate for wear of the memory device. In some implementations, the memory wear information may be used to predict or estimate the lifetime of the device.
Abstract translation: 方法和系统涉及收集存储器件参数并使用存储器件参数来确定存储器损耗信息。 针对存储器件的至少一个存储器单元监视与存储器件的磨损相关联的一组第一参数。 将第一个参数与相应的触发条件进行比较。 如果比较显示一个或多个第一参数超出其触发标准，则触发第二组参数的收集。 第二参数也表示存储器件的磨损。 第一个参数的集合可能与第二个参数的集合重叠。 第二个参数的集合用于开发内存磨损信息。 在一些实现中，存储器损耗信息可以是用于配置读/写通道以补偿存储器件的磨损的配置信息。 在一些实现中，可以使用存储器磨损信息来预测或估计设备的寿命。
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公开(公告)号：US20120075930A1
公开(公告)日：2012-03-29
申请号：US12891475
申请日：2010-09-27
Applicant: Ara Patapoutian , Bernardo Rub , Bruce Buch
Inventor： Ara Patapoutian , Bernardo Rub , Bruce Buch
CPC classification number: G11C11/5628 , G11C16/0483 , G11C16/06 , G11C16/3418
Abstract: A nominal reference read operation compares analog voltages of the memory cells to at least one nominal reference voltage. A shifted reference read operation compares the analog voltages of the memory cells to at least one shifted reference voltage that is shifted from the nominal reference voltage to compensate for an expected change in the analog voltages of the memory cells. Data stored in the memory cells is decoded by a first decoding process that uses the information from either the nominal reference read operation or the shifted reference read operation. The data stored in the memory cells is decoded by a second decoding process that uses the information from both the nominal reference read operation and the shifted reference read operation.
Abstract translation: 标称参考读取操作将存储器单元的模拟电压与至少一个标称参考电压进行比较。 移位的参考读取操作将存储器单元的模拟电压与从标称参考电压偏移的至少一个移位的参考电压进行比较，以补偿存储器单元的模拟电压的预期变化。 通过使用来自标称参考读取操作或移位参考读取操作的信息的第一解码处理对存储单元中存储的数据进行解码。 通过使用来自标称参考读取操作和偏移的参考读取操作的信息的第二解码处理来对存储单元中存储的数据进行解码。
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公开(公告)号：US20130007343A1
公开(公告)日：2013-01-03
申请号：US13170794
申请日：2011-06-28
Applicant: Bernardo Rub , Ara Patapoutian , Bruce Buch
Inventor： Bernardo Rub , Ara Patapoutian , Bruce Buch
CPC classification number: G06F12/0246 , G06F2212/7205 , G06F2212/7211
Abstract: Methods and systems involve collecting memory device parameters and using memory device parameters to determine memory wear information. A set of first parameters associated with wear of the memory device is monitored for at least one memory unit of the memory device. The first parameters are compared to respective trigger criterion. If the comparison reveals that one or more of the first parameters are beyond their trigger criterion, then collection of a second set of parameters is triggered. The second parameters are also indicative of the wear of the memory device. The set of first parameters may overlap the set of second parameters. The set of second parameters are used to develop memory wear information. In some implementations, the memory wear information may be configuration information used to configure the read/write channel to compensate for wear of the memory device. In some implementations, the memory wear information may be used to predict or estimate the lifetime of the device.
Abstract translation: 方法和系统涉及收集存储器件参数并使用存储器件参数来确定存储器损耗信息。 针对存储器件的至少一个存储器单元监视与存储器件的磨损相关联的一组第一参数。 将第一个参数与相应的触发条件进行比较。 如果比较显示一个或多个第一参数超出其触发标准，则触发第二组参数的收集。 第二参数也表示存储器件的磨损。 第一个参数的集合可能与第二个参数的集合重叠。 第二个参数的集合用于开发内存磨损信息。 在一些实现中，存储器损耗信息可以是用于配置读/写通道以补偿存储器件的磨损的配置信息。 在一些实现中，可以使用存储器磨损信息来预测或估计设备的寿命。
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公开(公告)号：US20120079355A1
公开(公告)日：2012-03-29
申请号：US12891490
申请日：2010-09-27
Applicant: Ara Patapoutian , Bernardo Rub , Bruce Buch
Inventor： Ara Patapoutian , Bernardo Rub , Bruce Buch
CPC classification number: G06F11/1008 , G06F11/1048 , G11C16/26 , G11C29/844 , H03M13/1108 , H03M13/1111 , H03M13/3707 , H03M13/45 , H03M13/451 , H03M13/458
Abstract: Approaches for decoding data read from memory cells of a nonvolatile, solid state memory involve attempting to decode hard data using a hard decoding process prior to a time that soft data is available to the decoder. The hard data includes information about the digital symbols stored in the memory cells without data confidence information. The soft data includes information about the digital symbols stored in the memory cells and data confidence information. In response to the hard decoding process failing to achieve convergence, after the soft data becomes available to the decoder, the soft data is decoded using a soft decoding process. The decoder generates an output of the decoded data after the hard decoding process or the soft decoding process achieves convergence.
Abstract translation: 用于解码从非易失性固态存储器的存储器单元读取的数据的方法包括在软数据可用于解码器的时间之前尝试使用硬解码处理对硬数据进行解码。 硬数据包括关于存储在存储器单元中的数字符号的信息，而没有数据置信度信息。 软数据包括关于存储在存储单元中的数字符号和数据置信度的信息。 响应于难以实现收敛的硬解码处理，在软数据变得可用于解码器之后，使用软解码处理解码软数据。 在硬解码处理或软解码处理实现收敛之后，解码器生成解码数据的输出。
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公开(公告)号：US08627175B2
公开(公告)日：2014-01-07
申请号：US12891490
申请日：2010-09-27
Applicant: Ara Patapoutian , Bernardo Rub , Bruce D. Buch
Inventor： Ara Patapoutian , Bernardo Rub , Bruce D. Buch
IPC: G11C29/00
CPC classification number: G06F11/1008 , G06F11/1048 , G11C16/26 , G11C29/844 , H03M13/1108 , H03M13/1111 , H03M13/3707 , H03M13/45 , H03M13/451 , H03M13/458
Abstract: Approaches for decoding data read from memory cells of a nonvolatile, solid state memory involve attempting to decode hard data using a hard decoding process prior to a time that soft data is available to the decoder. The hard data includes information about the digital symbols stored in the memory cells without data confidence information. The soft data includes information about the digital symbols stored in the memory cells and data confidence information. In response to the hard decoding process failing to achieve convergence, after the soft data becomes available to the decoder, the soft data is decoded using a soft decoding process. The decoder generates an output of the decoded data after the hard decoding process or the soft decoding process achieves convergence.
Abstract translation: 用于解码从非易失性固态存储器的存储器单元读取的数据的方法包括在软数据可用于解码器的时间之前尝试使用硬解码处理对硬数据进行解码。 硬数据包括关于存储在存储器单元中的数字符号的信息，而没有数据置信度信息。 软数据包括关于存储在存储单元中的数字符号和数据置信度的信息。 响应于难以实现收敛的硬解码处理，在软数据变得可用于解码器之后，使用软解码处理解码软数据。 在硬解码处理或软解码处理实现收敛之后，解码器生成解码数据的输出。
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Patent Agency Ranking
公开(公告)号：US20110296272A1
公开(公告)日：2011-12-01
申请号：US12790120
申请日：2010-05-28
Applicant: Bernardo Rub , Ara Patapoutian , Arvind Sridharan , Bruce D. Buch
Inventor： Bernardo Rub , Ara Patapoutian , Arvind Sridharan , Bruce D. Buch
CPC classification number: G06F11/1012
Abstract: Outer code words can span multiple data blocks, multiple die, or multiple chips of a memory device to protect against errors in the data stored in the blocks, die and/or chips. A solid state memory device is arranged in multiple data blocks, each block including an array of memory cells arranged in a plurality of pages. The data is encoded into inner code words and symbol-based outer code words. The inner code words and the symbol-based outer code words are stored in the memory cells of the multiple blocks. One or more inner code words are stored in each page of each block and one or more symbols of each outer code word are stored in at least one page of each block. The inner code words and the outer code words are read from the memory device and are used to correct the errors in the data.
Abstract translation: 外码字可以跨越存储器设备的多个数据块，多个芯片或多个芯片，以防止存储在块，芯片和/或芯片中的数据中的错误。 固态存储器件被布置在多个数据块中，每个块包括以多页布置的存储器单元的阵列。 数据被编码成内码字和基于符号的外码字。 内码字和基于符号的外码字被存储在多个块的存储单元中。 一个或多个内部码字被存储在每个块的每个页面中，并且每个外部码字的一个或多个符号被存储在每个块的至少一个页面中。 内部码字和外部码字从存储器件读取并用于校正数据中的错误。
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公开(公告)号：US09015549B2
公开(公告)日：2015-04-21
申请号：US13094048
申请日：2011-04-26
Applicant: Bernardo Rub , Ara Patapoutian , Arvind Sridharan , Bruce D. Buch
Inventor： Bernardo Rub , Ara Patapoutian , Arvind Sridharan , Bruce D. Buch
CPC classification number: G11B20/1833 , G11B2020/1836 , G11B2020/1853 , G11B2220/2516 , H03M13/1102 , H03M13/1515 , H03M13/2909 , H03M13/2927 , H03M13/3746
Abstract: A storage medium includes at least one data unit defining a plurality of symbol-based inner code words and a plurality of symbol-based outer code words. Each symbol included in one of the inner code words is also included in one of the outer code words. A processor is configured to perform a first iteration of inner code error correction on the plurality of symbol-based inner code words, a first iteration of outer code error correction on the plurality of symbol-based outer code words and a second iteration of inner code error correction on the plurality of symbol-based inner code words. In the first iteration of outer code error corrections, at least one of the outer code words is correctable. In the second iteration of inner code error correction, at least one of the inner code words is correctable.
Abstract translation: 存储介质包括定义多个基于符号的内码字和多个基于符号的外码字的至少一个数据单元。 包含在其中一个内部码字中的每个符号也被包括在一个外部码字中。 处理器被配置为对所述多个基于符号的内码字执行内码纠错的第一迭代，对所述多个基于符号的外码字进行外码纠错的第一迭代和内码的第二次迭代 对多个基于符号的内码字进行纠错。 在外码错误校正的第一次迭代中，外码字中的至少一个是可校正的。 在内码纠错的第二次迭代中，内码字中的至少一个是可校正的。
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公开(公告)号：US08130553B2
公开(公告)日：2012-03-06
申请号：US12629481
申请日：2009-12-02
Applicant: Bruce D. Buch , Ara Patapoutian , Bengt A. Ulriksson , Bernardo Rub
Inventor： Bruce D. Buch , Ara Patapoutian , Bengt A. Ulriksson , Bernardo Rub
CPC classification number: G11C16/10 , G11C16/349
Abstract: This disclosure is related to systems and methods for low wear operation of solid state memory, such as a flash memory. In one example, a controller is coupled to a memory and adapted to dynamically adjust programming thresholds over the course of usage of the data storage device such that a signal-to-noise ratio from reading data stored in the data storage cells is no less than a minimum amount needed to recover the data using an enhanced error detection capability.
Abstract translation: 本公开涉及固态存储器（例如闪速存储器）的低磨损操作的系统和方法。 在一个示例中，控制器耦合到存储器并且适于在数据存储设备的使用过程中动态地调整编程阈值，使得从存储在数据存储单元中的读取数据的信噪比不小于 使用增强的错误检测功能恢复数据所需的最小数量。
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公开(公告)号：US08572457B2
公开(公告)日：2013-10-29
申请号：US12790120
申请日：2010-05-28
Applicant: Bernardo Rub , Ara Patapoutian , Arvind Sridharan , Bruce D. Buch
Inventor： Bernardo Rub , Ara Patapoutian , Arvind Sridharan , Bruce D. Buch
CPC classification number: G06F11/1012
Abstract: Outer code words can span multiple data blocks, multiple die, or multiple chips of a memory device to protect against errors in the data stored in the blocks, die and/or chips. A solid state memory device is arranged in multiple data blocks, each block including an array of memory cells arranged in a plurality of pages. The data is encoded into inner code words and symbol-based outer code words. The inner code words and the symbol-based outer code words are stored in the memory cells of the multiple blocks. One or more inner code words are stored in each page of each block and one or more symbols of each outer code word are stored in at least one page of each block. The inner code words and the outer code words are read from the memory device and are used to correct the errors in the data.
Abstract translation: 外码字可以跨越存储器设备的多个数据块，多个芯片或多个芯片，以防止存储在块，芯片和/或芯片中的数据中的错误。 固态存储器件被布置在多个数据块中，每个块包括以多页布置的存储器单元的阵列。 数据被编码成内码字和基于符号的外码字。 内码字和基于符号的外码字被存储在多个块的存储单元中。 一个或多个内部码字被存储在每个块的每个页面中，并且每个外部码字的一个或多个符号被存储在每个块的至少一个页面中。 内部码字和外部码字从存储器件读取并用于校正数据中的错误。
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公开(公告)号：US20120278679A1
公开(公告)日：2012-11-01
申请号：US13094048
申请日：2011-04-26
Applicant: Bernardo Rub , Ara Patapoutian , Arvind Sridharan , Bruce D. Buch
Inventor： Bernardo Rub , Ara Patapoutian , Arvind Sridharan , Bruce D. Buch
CPC classification number: G11B20/1833 , G11B2020/1836 , G11B2020/1853 , G11B2220/2516 , H03M13/1102 , H03M13/1515 , H03M13/2909 , H03M13/2927 , H03M13/3746
Abstract: A storage medium includes at least one data unit defining a plurality of symbol-based inner code words and a plurality of symbol-based outer code words. Each symbol included in one of the inner code words is also included in one of the outer code words. A processor is configured to perform a first iteration of inner code error correction on the plurality of symbol-based inner code words, a first iteration of outer code error correction on the plurality of symbol-based outer code words and a second iteration of inner code error correction on the plurality of symbol-based inner code words. In the first iteration of outer code error corrections, at least one of the outer code words is correctable. In the second iteration of inner code error correction, at least one of the inner code words is correctable.
Abstract translation: 存储介质包括定义多个基于符号的内码字和多个基于符号的外码字的至少一个数据单元。 包含在其中一个内部码字中的每个符号也被包括在一个外部码字中。 处理器被配置为对所述多个基于符号的内码字执行内码纠错的第一迭代，对所述多个基于符号的外码字进行外码纠错的第一迭代和内码的第二次迭代 对多个基于符号的内码字进行纠错。 在外码错误校正的第一次迭代中，外码字中的至少一个是可校正的。 在内码纠错的第二次迭代中，内码字中的至少一个是可校正的。
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