公开(公告)号：US20090289304A1

公开(公告)日：2009-11-26

申请号：US12296402

申请日：2007-03-30

申请人： Arnaud Pouydebasque ,  Robin Cerutti

发明人： Arnaud Pouydebasque ,  Robin Cerutti

IPC分类号： H01L27/12 ,  H01L21/84 ,  H01L29/786

CPC分类号： H01L27/1211 ,  H01L21/845 ,  H01L29/045 ,  H01L29/42392 ,  H01L29/66787 ,  H01L29/785

摘要： The present invention relates to a CMOS circuit device on a SOI substrate with an oriented silicon surface, comprising on a first substrate region a FET that has a FET channel region of a first conductivity type, and comprising on a second substrate region a FinFET that has a FinFET channel region of a second conductivity type which is opposite to the first conductivity type. The invention also relates to a method for fabricating such a CMOS circuit device. The fabrication of the multi-gate planar FET comprises, at an intermediate step, forming a FET channel stack with an alternating sequence of layers of a FET material and of a sacrificial material and containing main FET-channel faces, which have the same orientation as the oriented silicon surface. According to the invention, a co-integration of multi-gate FET devices is achieved that ensures high carrier mobilities for both NMOS and PMOS FETs.

摘要翻译： 本发明涉及具有取向硅表面的SOI衬底上的CMOS电路器件，在第一衬底区域上包括具有第一导电类型的FET沟道区的FET，并且在第二衬底区域上包括具有 与第一导电类型相反的第二导电类型的FinFET沟道区。 本发明还涉及制造这种CMOS电路器件的方法。 多栅平面FET的制造包括在中间步骤中，形成具有FET材料和牺牲材料的层的交替序列并且包含主FET沟道面的FET沟道堆叠，其具有与 定向硅表面。 根据本发明，实现了多栅极FET器件的共同集成，确保了NMOS和PMOS FET的高载流子迁移率。

公开(公告)号：US20050184325A1

公开(公告)日：2005-08-25

申请号：US10877755

申请日：2004-06-25

申请人： Francois Jacquet ,  Philippe Candellier ,  Robin Cerutti ,  Philippe Coronel ,  Pascale Mazoyer

发明人： Francois Jacquet ,  Philippe Candellier ,  Robin Cerutti ,  Philippe Coronel ,  Pascale Mazoyer

IPC分类号： G11C11/405 ,  H01L27/06 ,  H01L27/108 ,  H01L27/12 ,  H01L29/76

CPC分类号： H01L27/0688 ,  G11C11/405 ,  H01L27/108

摘要： An integrated dynamic random access memory element includes two cells for the storage of two respective bits. A source region and a drain region are included. Each cell comprises a field-effect transistor having a gate and an intermediate portion which extend between the source and drain regions. A channel is provided in the intermediate portion of the transistor for each cell. A polarization electrode is placed between the respective intermediate portions of the two transistors. This polarization electrode is capacitively coupled to the intermediate portion of each transistor and is used to store the first and second bits.

摘要翻译： 集成的动态随机存取存储器元件包括两个用于存储两个相应位的单元。 包括源区和漏区。 每个单元包括具有栅极和在源极和漏极区域之间延伸的中间部分的场效应晶体管。 在每个单元的晶体管的中间部分设置有沟道。 偏振电极被放置在两个晶体管的各个中间部分之间。 该极化电极电容耦合到每个晶体管的中间部分，并用于存储第一和第二位。

公开(公告)号：US20050023617A1

公开(公告)日：2005-02-03

申请号：US10903527

申请日：2004-07-30

申请人： Jean-Pierre Schoellkopf ,  Robin Cerutti ,  Philippe Coronel ,  Thomas Skotnicki

发明人： Jean-Pierre Schoellkopf ,  Robin Cerutti ,  Philippe Coronel ,  Thomas Skotnicki

IPC分类号： H01L21/74 ,  H01L21/762 ,  H01L21/765 ,  H01L21/768 ,  H01L21/8244 ,  H01L23/485 ,  H01L23/528 ,  H01L23/535 ,  H01L27/11 ,  H01L29/78 ,  H01L27/10 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062

CPC分类号： H01L21/743 ,  H01L21/76224 ,  H01L21/765 ,  H01L21/76802 ,  H01L21/76838 ,  H01L21/76895 ,  H01L23/485 ,  H01L23/5286 ,  H01L23/535 ,  H01L27/11 ,  H01L27/1104 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit comprising a semiconductor substrate in which active areas surround or are surrounded by hollowings filled with an insulator, and in which a conductive region is embedded in the insulator of at least one hollowing, the conductive region being connected to a reference voltage and being connected at least one neighboring element of the circuit.

摘要翻译： 一种集成电路，包括半导体衬底，其中有源区域围绕或被填充有绝缘体的中空部围绕，并且其中导电区域嵌入至少一个中空的绝缘体中，所述导电区域连接到参考电压，并且 连接电路的至少一个相邻元件。

公开(公告)号：US08299541B2

公开(公告)日：2012-10-30

申请号：US12538723

申请日：2009-08-10

申请人： Damien Lenoble ,  Philippe Coronel ,  Robin Cerutti

发明人： Damien Lenoble ,  Philippe Coronel ,  Robin Cerutti

IPC分类号： H01L21/02

CPC分类号： H01L21/76805 ,  H01L21/26506 ,  H01L21/28061 ,  H01L21/76814 ,  H01L23/485 ,  H01L29/66545 ,  H01L29/66636 ,  H01L2924/0002 ,  H01L2924/00

摘要： A region is locally modified so as to create a zone that extends as far as at least part of the surface of the region and is formed from a material that can be removed selectively with respect to the material of the region. The region is then covered with an insulating material. An orifice is formed in the insulating material emerging at the surface of the zone. The selectively removable material is removed from the zone through the orifice so as to form a cavity in place of the zone. The cavity and the orifice are then filled with at least one electrically conducting material so as to form a contact pad.

摘要翻译： 局部地修改区域，以便产生延伸至该区域表面的至少一部分的区域，并且由相对于该区域的材料选择性地移除的材料形成。 然后用绝缘材料覆盖该区域。 在出现在区域表面的绝缘材料中形成孔口。 可选择性地移除的材料通过孔口从区域移除，以便形成空腔而不是区域。 然后用至少一个导电材料填充空腔和孔，以便形成接触垫。

公开(公告)号：US20100025773A1

公开(公告)日：2010-02-04

申请号：US12538723

申请日：2009-08-10

申请人： Damien Lenoble ,  Philippe Coronel ,  Robin Cerutti

发明人： Damien Lenoble ,  Philippe Coronel ,  Robin Cerutti

IPC分类号： H01L29/78 ,  H01L29/73 ,  H01L23/532

CPC分类号： H01L21/76805 ,  H01L21/26506 ,  H01L21/28061 ,  H01L21/76814 ,  H01L23/485 ,  H01L29/66545 ,  H01L29/66636 ,  H01L2924/0002 ,  H01L2924/00

摘要： A region is locally modified so as to create a zone that extends as far as at least part of the surface of the region and is formed from a material that can be removed selectively with respect to the material of the region. The region is then covered with an insulating material. An orifice is formed in the insulating material emerging at the surface of the zone. The selectively removable material is removed from the zone through the orifice so as to form a cavity in place of the zone. The cavity and the orifice are then filled with at least one electrically conducting material so as to form a contact pad.

摘要翻译： 局部地修改区域，以便产生延伸至该区域表面的至少一部分的区域，并且由相对于该区域的材料选择性地移除的材料形成。 然后用绝缘材料覆盖该区域。 在出现在区域表面的绝缘材料中形成孔口。 可选择性地移除的材料通过孔口从区域移除，以便形成空腔而不是区域。 然后用至少一个导电材料填充空腔和孔，以便形成接触垫。

公开(公告)号：US20070194355A1

公开(公告)日：2007-08-23

申请号：US11698755

申请日：2007-01-26

申请人： Romain Wacquez ,  Philippe Coronel ,  Damien Lenoble ,  Robin Cerutti ,  Thomas Skotnicki

发明人： Romain Wacquez ,  Philippe Coronel ,  Damien Lenoble ,  Robin Cerutti ,  Thomas Skotnicki

IPC分类号： H01L29/76

CPC分类号： H01L29/66772 ,  H01L27/1203 ,  H01L29/78648

摘要： A planar transistor device includes two independent gates (a first and second gates) along with a semiconductor channel lying between the gates. The semiconductor channel is formed of a first material. The channel includes opposed ends comprising dielectric zone with a channel region positioned between the gates. The dielectric zones comprises an oxide of the first material.

摘要翻译： 平面晶体管器件包括两个独立的栅极（第一和第二栅极）以及位于栅极之间的半导体沟道。 半导体通道由第一材料形成。 通道包括相对的端部，其包括介电区域，沟道区域位于栅极之间。 介电区包括第一材料的氧化物。

公开(公告)号：US20060091477A1

公开(公告)日：2006-05-04

申请号：US11250641

申请日：2005-10-14

申请人： Damien Lenoble ,  Philippe Coronel ,  Robin Cerutti

发明人： Damien Lenoble ,  Philippe Coronel ,  Robin Cerutti

IPC分类号： H01L29/76

CPC分类号： H01L21/76805 ,  H01L21/26506 ,  H01L21/28061 ,  H01L21/76814 ,  H01L23/485 ,  H01L29/66545 ,  H01L29/66636 ,  H01L2924/0002 ,  H01L2924/00

摘要： A region is locally modified so as to create a zone that extends as far as at least part of the surface of the region and is formed from a material that can be removed selectively with respect to the material of the region. The region is then covered with an insulating material. An orifice is formed in the insulating material emerging at the surface of the zone. The selectively removable material is removed from the zone through the orifice so as to form a cavity in place of the zone. The cavity and the orifice are then filled with at least one electrically conducting material so as to form a contact pad.

公开(公告)号：US07994008B2

公开(公告)日：2011-08-09

申请号：US11698755

申请日：2007-01-26

申请人： Romain Wacquez ,  Philippe Coronel ,  Damien Lenoble ,  Robin Cerutti ,  Thomas Skotnicki

发明人： Romain Wacquez ,  Philippe Coronel ,  Damien Lenoble ,  Robin Cerutti ,  Thomas Skotnicki

IPC分类号： H01L21/336

CPC分类号： H01L29/66772 ,  H01L27/1203 ,  H01L29/78648

摘要： A planar transistor device includes two independent gates (a first and second gates) along with a semiconductor channel lying between the gates. The semiconductor channel is formed of a first material. The channel includes opposed ends comprising dielectric zone with a channel region positioned between the gates. The dielectric zones comprises an oxide of the first material.

摘要翻译： 平面晶体管器件包括两个独立的栅极（第一和第二栅极）以及位于栅极之间的半导体沟道。 半导体通道由第一材料形成。 通道包括相对的端部，其包括介电区域，沟道区域位于栅极之间。 介电区包括第一材料的氧化物。

公开(公告)号：US07601634B2

公开(公告)日：2009-10-13

申请号：US11250641

申请日：2005-10-14

申请人： Damien Lenoble ,  Philippe Coronel ,  Robin Cerutti

发明人： Damien Lenoble ,  Philippe Coronel ,  Robin Cerutti

IPC分类号： H01L21/4763

CPC分类号： H01L21/76805 ,  H01L21/26506 ,  H01L21/28061 ,  H01L21/76814 ,  H01L23/485 ,  H01L29/66545 ,  H01L29/66636 ,  H01L2924/0002 ,  H01L2924/00

摘要： A region is locally modified so as to create a zone that extends as far as at least part of the surface of the region and is formed from a material that can be removed selectively with respect to the material of the region. The region is then covered with an insulating material. An orifice is formed in the insulating material emerging at the surface of the zone. The selectively removable material is removed from the zone through the orifice so as to form a cavity in place of the zone. The cavity and the orifice are then filled with at least one electrically conducting material so as to form a contact pad.

摘要翻译： 局部地修改区域，以便产生延伸至该区域表面的至少一部分的区域，并且由相对于该区域的材料选择性地移除的材料形成。 然后用绝缘材料覆盖该区域。 在出现在区域表面的绝缘材料中形成孔口。 可选择性地移除的材料通过孔口从区域移除，以便形成空腔而不是区域。 然后用至少一个导电材料填充空腔和孔，以便形成接触垫。

公开(公告)号：US20050212018A1

公开(公告)日：2005-09-29

申请号：US11135172

申请日：2005-05-23

申请人： Jean-Pierre Schoellkopf ,  Robin Cerutti ,  Philippe Coronel ,  Thomas Skotnicki

发明人： Jean-Pierre Schoellkopf ,  Robin Cerutti ,  Philippe Coronel ,  Thomas Skotnicki

IPC分类号： H01L21/74 ,  H01L21/762 ,  H01L21/765 ,  H01L21/768 ,  H01L21/8244 ,  H01L23/485 ,  H01L23/528 ,  H01L23/535 ,  H01L27/11 ,  H01L29/78 ,  H01L29/76

CPC分类号： H01L21/743 ,  H01L21/76224 ,  H01L21/765 ,  H01L21/76802 ,  H01L21/76838 ,  H01L21/76895 ,  H01L23/485 ,  H01L23/5286 ,  H01L23/535 ,  H01L27/11 ,  H01L27/1104 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit comprising a semiconductor substrate in which active areas surround or are surrounded by hollowings filled with an insulator, and in which a conductive region is embedded in the insulator of at least one hollowing, the conductive region being connected to a reference voltage and being connected at least one neighboring element of the circuit.