ENABLING CONSECUTIVE COMMAND MESSAGE TRANSMISSION TO DIFFERENT DEVICES
    1.
    发明申请
    ENABLING CONSECUTIVE COMMAND MESSAGE TRANSMISSION TO DIFFERENT DEVICES 审中-公开
    为不同的设备启用一致的命令消息传输

    公开(公告)号:US20110099306A1

    公开(公告)日:2011-04-28

    申请号:US12980636

    申请日:2010-12-29

    IPC分类号: G06F13/10

    CPC分类号: G06F13/387

    摘要: In one embodiment, the present invention includes a method for transmitting a frame information structure (FIS) message from a host controller or receiving a FIS message at the host controller, transmitting a synchronization signal from the host controller to a port multiplier coupled to the host controller via a link and sustaining a transmit ready signal from the host controller to the port multiplier to thereby lock the link between the host controller and the port multiplier after sending the synchronization signal, and transmitting multiple command FIS messages from the host controller to the port multiplier in a back-to-back manner, where the back-to-back command FIS messages are directed to different devices. Other embodiments are described and claimed.

    摘要翻译: 在一个实施例中,本发明包括一种用于从主机控制器发送帧信息结构(FIS)消息或在主机控制器处接收FIS消息的方法,其将来自主机控制器的同步信号发送到耦合到主机的端口倍增器 控制器,并且从主机控制器向端口倍增器维持发送就绪信号,从而在发送同步信号之后锁定主机控制器和端口倍增器之间的链路,并且从主机控制器向端口发送多个命令FIS消息 乘法器以背对背方式进行,其中背靠背命令FIS消息被定向到不同的设备。 描述和要求保护其他实施例。

    Enabling consecutive command message transmission to different devices
    2.
    发明申请
    Enabling consecutive command message transmission to different devices 审中-公开
    启用连续的命令消息传输到不同的设备

    公开(公告)号:US20090006657A1

    公开(公告)日:2009-01-01

    申请号:US11821874

    申请日:2007-06-26

    IPC分类号: G06F3/00

    CPC分类号: G06F13/387

    摘要: In one embodiment, the present invention includes a method for transmitting a frame information structure (FIS) message from a host controller or receiving a FIS message at the host controller, transmitting a synchronization signal from the host controller to a port multiplier coupled to the host controller via a link and sustaining a transmit ready signal from the host controller to the port multiplier to thereby lock the link between the host controller and the port multiplier after sending the synchronization signal, and transmitting multiple command FIS messages from the host controller to the port multiplier in a back-to-back manner, where the back-to-back command FIS messages are directed to different devices. Other embodiments are described and claimed.

    摘要翻译: 在一个实施例中,本发明包括一种用于从主机控制器发送帧信息结构(FIS)消息或在主机控制器处接收FIS消息的方法,其将来自主机控制器的同步信号发送到耦合到主机的端口倍增器 控制器,并且从主机控制器向端口倍增器维持发送就绪信号,从而在发送同步信号之后锁定主机控制器和端口倍增器之间的链路,并且从主机控制器向端口发送多个命令FIS消息 乘法器以背对背方式进行,其中背靠背命令FIS消息被定向到不同的设备。 描述和要求保护其他实施例。

    Serial storage protocol compatible frame conversion, at least in part being compatible with SATA and one packet being compatible with PCIe protocol
    5.
    发明授权
    Serial storage protocol compatible frame conversion, at least in part being compatible with SATA and one packet being compatible with PCIe protocol 有权
    串行存储协议兼容的帧转换,至少部分兼容SATA和一个与PCIe协议兼容的数据包

    公开(公告)号:US08745296B2

    公开(公告)日:2014-06-03

    申请号:US13633690

    申请日:2012-10-02

    IPC分类号: G06F13/12

    摘要: An embodiment may include circuitry to (a) convert, at least in part, at least one serial storage protocol compatible frame into at least one packet that is compatible, at least in part, with a multi-lane input/output (I/O) protocol, and/or (b) convert, at least in part, the at least one packet into the at least one frame. The at least one packet may be transmitted via a physical layer that is compatible, at least in part, with the multi-lane I/O protocol. The at least one packet may comprise frame information structure (FIS) information of the at least one frame.

    摘要翻译: 一个实施例可以包括以下电路:(a)至少部分地将至少一个串行存储协议兼容帧转换成至少一个分组,至少部分地与多通道输入/输出(I / O )协议,和/或(b)至少部分地将所述至少一个分组转换成所述至少一个帧。 至少一个分组可以经由至少部分地与多通道I / O协议兼容的物理层来传输。 所述至少一个分组可以包括所述至少一个帧的帧信息结构(FIS)信息。

    Dynamically switching command types to a mass storage drive
    6.
    发明授权
    Dynamically switching command types to a mass storage drive 有权
    将命令类型动态切换到大容量存储驱动器

    公开(公告)号:US08606992B2

    公开(公告)日:2013-12-10

    申请号:US13446599

    申请日:2012-04-13

    申请人: Eng Hun Ooi

    发明人: Eng Hun Ooi

    IPC分类号: G06F12/00

    摘要: A method, device, and system are disclosed. In one embodiment method begins by receiving a first new mass storage disk access request. The method then determines the total number of access requests to the mass storage disk received in a window of time. If the total number of requests received over the period of time is greater than or equal to a request threshold number then a request frequency counter is decremented. Otherwise, the counter is incremented. The method continues by generating a legacy advanced technology attachment (ATA)-type command for the first new access request when the counter is greater than or equal to a counter threshold number. Otherwise, the method generates a native command queue (NCQ)-type command for the first new access request.

    摘要翻译: 公开了一种方法,装置和系统。 在一个实施例中,方法开始于接收第一新的大容量存储盘访问请求。 该方法然后确定在时间窗口中接收的大容量存储盘的访问请求的总数。 如果在一段时间内接收到的请求总数大于或等于请求阈值,则请求频率计数器递减。 否则,计数器递增。 当计数器大于或等于计数器阈值数时,该方法继续生成用于第一新访问请求的传统高级技术附件(ATA)类型命令。 否则,该方法将为第一个新的访问请求生成本机命令队列(NCQ)-type命令。

    OUT-OF-BAND ACCESS TO STORAGE DEVICES THROUGH PORT-SHARING HARDWARE
    7.
    发明申请
    OUT-OF-BAND ACCESS TO STORAGE DEVICES THROUGH PORT-SHARING HARDWARE 有权
    通过端口共享硬件访问存储设备的带外

    公开(公告)号:US20120017011A1

    公开(公告)日:2012-01-19

    申请号:US12836341

    申请日:2010-07-14

    IPC分类号: G06F3/00

    摘要: A method, apparatus, system, and computer program product for enabling out-of-band access to storage devices through port-sharing hardware. Providing out-of-band access to storage devices enables system management functions to be performed when an operating system is non-functional as well as when the operating system is active. Storage commands originating with a management service can be interleaved with storage commands issued by the host operating system. The host operating system maintains ownership and control over its storage devices, but management activities can be performed while the host operating system is operational.

    摘要翻译: 一种用于通过端口共享硬件对存储设备进行带外访问的方法,装置,系统和计算机程序产品。 提供对存储设备的带外访问可使系统管理功能在操作系统不起作用以及操作系统处于活动状态时执行。 源自管理服务的存储命令可以与主机操作系统发出的存储命令交错。 主机操作系统维护对其存储设备的所有权和控制权,但是可以在主机操作系统运行时执行管理活动。

    Cache for a host controller
    8.
    发明申请
    Cache for a host controller 有权
    高速缓存用于主机控制器

    公开(公告)号:US20090006670A1

    公开(公告)日:2009-01-01

    申请号:US11821865

    申请日:2007-06-26

    IPC分类号: G06F3/00

    CPC分类号: G06F12/0893 G06F12/128

    摘要: In one embodiment, the present invention includes a host controller having a cache memory to store entries each including, at least, a command header (CH) portion having data associated with a command from the host controller to one of multiple devices coupled to a port multiplier, and a physical region descriptor (PRD) portion to store address information associated with a next address for data transfer with regard to the command. Other embodiments are described and claimed.

    摘要翻译: 在一个实施例中,本发明包括具有高速缓存存储器的主机控制器,该高速缓冲存储器存储条目,每个条目至少包括命令头部(CH)部分,命令头部(CH)部分具有与从主机控制器到与端口耦合的多个设备中的一个的相关联的命令 乘法器和物理区域描述符(PRD)部分,用于存储与用于关于命令的数据传输的下一个地址相关联的地址信息。 描述和要求保护其他实施例。

    NON-VOLATILE MEMORY INTERFACE
    9.
    发明申请
    NON-VOLATILE MEMORY INTERFACE 有权
    非易失性存储器接口

    公开(公告)号:US20150032941A1

    公开(公告)日:2015-01-29

    申请号:US14128669

    申请日:2013-07-25

    IPC分类号: G06F12/02

    摘要: In an embodiment, a memory interface may send an indication that a request is being sent. The indication may be sent to a non-volatile memory via a point-to-point bus between a memory interface and the non-volatile memory. The memory interface may send the request to the non-volatile memory via the bus. The request may include an address that may be used to identify a location for storing or reading data. The non-volatile memory may acquire the request from the bus and process the request. After processing the request, the non-volatile memory may send an indication to the memory interface that indicates the non-volatile memory has a response to send to the memory interface. The memory interface may grant access to the bus to the non-volatile memory. After being granted access to the bus, the non-volatile memory may send the response to the memory interface.

    摘要翻译: 在一个实施例中,存储器接口可以发送请求被发送的指示。 该指示可以经由存储器接口和非易失性存储器之间的点对点总线发送到非易失性存储器。 存储器接口可以经由总线将请求发送到非易失性存储器。 请求可以包括可用于标识用于存储或读取数据的位置的地址。 非易失性存储器可以从总线获取请求并处理请求。 在处理请求之后,非易失性存储器可以向存储器接口发送指示非易失性存储器具有发送到存储器接口的响应的指示。 存储器接口可以向总线授予对非易失性存储器的访问。 在被允许访问总线之后,非易失性存储器可以将响应发送到存储器接口。

    SERIAL STORAGE PROTOCOL COMPATIBLE FRAME CONVERSION, AT LEAST IN PART
    10.
    发明申请
    SERIAL STORAGE PROTOCOL COMPATIBLE FRAME CONVERSION, AT LEAST IN PART 有权
    串行存储协议兼容的帧转换,至少部分

    公开(公告)号:US20140095742A1

    公开(公告)日:2014-04-03

    申请号:US13633690

    申请日:2012-10-02

    IPC分类号: G06F3/00

    摘要: An embodiment may include circuitry to (a) convert, at least in part, at least one serial storage protocol compatible frame into at least one packet that is compatible, at least in part, with a multi-lane input/output (I/O) protocol, and/or (b) convert, at least in part, the at least one packet into the at least one frame. The at least one packet may be transmitted via a physical layer that is compatible, at least in part, with the multi-lane I/O protocol. The at least one packet may comprise frame information structure (FIS) information of the at least one frame.

    摘要翻译: 一个实施例可以包括以下电路:(a)至少部分地将至少一个串行存储协议兼容帧转换成至少一个分组,至少部分地与多通道输入/输出(I / O )协议,和/或(b)至少部分地将所述至少一个分组转换成所述至少一个帧。 至少一个分组可以经由至少部分地与多通道I / O协议兼容的物理层来传输。 所述至少一个分组可以包括所述至少一个帧的帧信息结构(FIS)信息。