公开(公告)号：US09823678B1

公开(公告)日：2017-11-21

申请号：US15191510

申请日：2016-06-23

Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.

Inventor： Saihua Lin

IPC: G05F1/575 ,  H03F3/45

CPC classification number: G05F1/575 ,  H03F3/45273 ,  H03F3/45475

Abstract: A voltage regulator includes: a difference amplifier with first input terminal connected to a reference voltage; a first transistor having a first terminal connected to a supply voltage, a control terminal connected to the output terminal of the difference amplifier, and a second terminal configured to supply a regulated voltage to a load; a feedback circuit connected to the second terminal of the first transistor and configured to supply a feedback voltage to a second input terminal of the difference amplifier; and a current compensator configured to draw a compensation current from the first transistor when a load current supplied by the first transistor to the load is less than a threshold current, thereby increasing the first current through the first transistor, and configured to draw substantially no compensation current from the first transistor when the load current is greater than or equal to the threshold current.

公开(公告)号：US09755595B1

公开(公告)日：2017-09-05

申请号：US15130691

申请日：2016-04-15

Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.

Inventor： Saihua Lin

IPC: H03G3/30 ,  H03G1/00 ,  H03K19/21 ,  H03F3/193 ,  H03F1/02 ,  H03F1/30

CPC classification number: H03G1/0029 ,  H03F1/0261 ,  H03F1/30 ,  H03F1/301 ,  H03F1/302 ,  H03F1/303 ,  H03F3/193 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/492 ,  H03G1/0088 ,  H03G3/001 ,  H03K19/21

Abstract: A device includes: a transistor having an input terminal configured to receive an input signal and to amplify the input signal; a bias current source configured to set a bias current of the input terminal of the transistor, the bias current source having a control input for receiving a control signal for selecting the bias current to have one of a plurality of selectable bias current levels; a bias resistance connected between the bias current source and the input terminal of the transistor; a bypass switch for selectively bypassing a first part of the bias resistance; and a control circuit for controlling the bypass switch to bypass the part of the bias resistance for a predefined time period in response to a change in the bias current level, and for controlling the bypass switch to stop bypassing the first part of the bias resistance after the predefined time period expires.