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公开(公告)号：US20240334776A1
公开(公告)日：2024-10-03
申请号：US18577995
申请日：2022-01-30
Inventor： Pandeng TANG , Qian WANG , Yiyang ZHANG , Yue WEI , Yuqing YANG , Xiping LI , Yang ZHOU
IPC: H10K59/40 , G06F3/041 , G06F3/044 , G09G3/3266 , H10K59/122 , H10K59/131 , H10K59/80 , H10K59/88
CPC classification number: H10K59/40 , G06F3/0412 , G06F3/0445 , G09G3/3266 , H10K59/122 , H10K59/131 , H10K59/873 , H10K59/88
Abstract: The present disclosure provides a display panel and a display apparatus. The display panel includes: a substrate; and a touch structure located on a side, away from the substrate, of an organic light-emitting device and including a touch electrode and an insulating layer, a control chip connecting terminal is arranged in the bonding area at a position close to a bending area, the control chip connecting terminal is electrically connected with a gate driving circuit, a contact pad is arranged on a side, away from the bending area, of the control chip connecting terminal, the contact pad is configured to be capable of being bonded with a flexible printed circuit board, and at least part of the contact pad and at least part of the touch electrode are arranged in the same layer and made of the same material.
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2.发明申请公开(公告)号：US20180145146A1
公开(公告)日：2018-05-24
申请号：US15519948
申请日：2016-01-04
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Zuqiang WANG , Yuqing YANG
IPC: H01L29/66 , H01L29/786 , H01L21/02 , H01L27/12
CPC classification number: H01L29/6675 , H01L21/02595 , H01L21/02675 , H01L27/12 , H01L27/1218 , H01L27/1274 , H01L29/786
Abstract: The present disclosure provides a thin film transistor, a method for manufacturing the same, an array substrate and a display device. The method for manufacturing a thin film transistor includes providing a substrate, forming a gate electrode, a gate insulating layer, an amorphous silicon material active layer and a cap layer on the substrate successively, wherein The cap layer is provided with a pattern on a side of the cap layer away from the amorphous silicon material active layer, and the pattern is composed of at least one groove along a length direction of the active layer and at least one groove along a width direction of the active layer, subjecting the amorphous silicon material active layer to laser annealing treatment to transform the amorphous silicon material active layer into a low temperature polycrystalline silicon material active layer, and removing the cap layer.
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公开(公告)号：US20190051716A1
公开(公告)日：2019-02-14
申请号：US15566108
申请日：2017-05-27
Inventor： Qi LIU , Lei ZHANG , Yuqing YANG , Kun GUO
CPC classification number: H01L27/3276 , H01L51/5206 , H01L51/5221 , H01L51/5237 , H01L51/529
Abstract: An organic light emitting display panel includes a display region and a non-display region, the display region provided with a gate wiring, a data wiring, an anode wiring and a cathode, wherein the cathode is disposed in a central region of the display region, the gate wiring, the data wiring, and the anode wiring are disposed along an edge region of the display region; the gate wiring has a first gate wiring parallel to a first direction, the data wiring has a first data wiring parallel to the first direction, the anode wiring has a first anode wiring parallel to the first direction, the first direction is a direction from the display region to the non-display region, a width of at least one of the first gate wiring, the first data wiring, and the first anode wiring, is gradually increased in the first direction.
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公开(公告)号：US20180197897A1
公开(公告)日：2018-07-12
申请号：US15127771
申请日：2015-08-03
Inventor： Yanxia XIN , Yuqing YANG , Xiaofei YANG
CPC classification number: H01L27/1255 , H01L21/28 , H01L21/77 , H01L27/124 , H01L2021/775
Abstract: An array substrate and a method for fabricating the same, and a display device are disclosed. The array substrate comprises: a thin film transistor comprising an active region, a source/drain and a gate; a shading part arranged below the active region and made from an electrically conductive material; and a storage capacitor comprising a first plate and a second plate which are spaced apart and arranged oppositely. The first plate is arranged in a same layer as the shading part, and the second plate is arranged in a same layer as any one of the active region, the source/drain and the gate.
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公开(公告)号：US20170194224A1
公开(公告)日：2017-07-06
申请号：US15321172
申请日：2016-02-01
Inventor： Fan YANG , Kun GUO , Yuqing YANG , Qi LIU , Bo ZHANG , Fei CHEN , Tianyi CHENG , Zihua LI , Yan WU , Jin YANG , Liman PENG , Chao KONG
IPC: H01L23/08 , H01L23/24 , H01L23/13 , H01L23/053 , H01L23/15
CPC classification number: H01L23/08 , G02F1/133351 , G02F1/1339 , G02F1/13452 , H01L23/053 , H01L23/13 , H01L23/15 , H01L23/24 , H01L51/525
Abstract: A display panel and a method for forming the same are disclosed. The display panel includes a first substrate and a second substrate arranged opposite to each other. An integrated circuit (IC) is arranged at a non-display region of the first substrate, and at least one supporting component is arranged beyond a portion of the non-display region where the IC is arranged. A thickness of the at least one supporting component is larger than a thickness of the IC.
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Patent Agency Ranking
公开(公告)号：US20170040236A1
公开(公告)日：2017-02-09
申请号：US14908455
申请日：2015-09-11
Inventor： Haoyuan FAN , Yanxia XIN , Yuqing YANG
CPC classification number: H01L22/32 , H01L22/14 , H01L27/1244 , H01L27/1259
Abstract: The present disclosure provides an array substrate, its manufacturing method and a display device. The array substrate includes operating circuit interfaces, testing interfaces, and testing lines connecting the operating circuit interfaces and the testing interfaces. Each testing line includes at least one cut-off point, and conductive contacts extending to an upper surface of the array substrate are arranged at two sides of each cut-off point of the testing line. When testing an operating circuit, electrically connecting the conductive contacts at two sides of each cut-off point enables the testing line to be conductive.
Abstract translation: 本公开提供了阵列基板，其制造方法和显示装置。 阵列基板包括操作电路接口，测试接口和连接操作电路接口和测试接口的测试线。 每个测试线包括至少一个截止点，并且延伸到阵列基板的上表面的导电触点布置在测试线的每个截止点的两侧。 当测试操作电路时，将每个截止点两侧的导电触点电连接使测试线能够导通。
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公开(公告)号：US20160260614A1
公开(公告)日：2016-09-08
申请号：US14400931
申请日：2013-12-04
Inventor： Yuqing YANG , Seung Yik PARK , Byung Chun LEE
IPC: H01L21/285 , H01L21/033 , H01L29/43 , H01L27/12 , H01L21/28
CPC classification number: H01L21/2855 , G06F3/041 , G06F2203/04103 , H01L21/0331 , H01L21/28008 , H01L27/1259 , H01L29/43 , H01L31/1884 , H01L2924/0002 , Y02E10/50 , H01L2924/00
Abstract: A method for preparing film patterns; firstly, a complementary film pattern (1) to a desired film pattern (201) is prepared on a substrate (3) with an erasable agent; secondly, a whole layer of film (2) is formed on the complementary film pattern (1); and thirdly, the desired film pattern (201) is obtained by removing the complementary film pattern (1). The preparation method can simplify the production process and reduce the production cost of the film patterns.
Abstract translation: 一种制备薄膜图案的方法; 首先，在具有可擦除剂的基板（3）上制备所需膜图案（201）的互补膜图案（1） 其次，在互补膜图案（1）上形成整层膜（2）; 第三，通过去除互补膜图案（1）来获得所需的膜图案（201）。 制备方法可以简化生产过程，降低膜图案的生产成本。
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公开(公告)号：US20220077423A1
公开(公告)日：2022-03-10
申请号：US16767663
申请日：2019-07-12
Inventor： Zhen ZHANG , Yuqing YANG , Yue WEI , Yiyang ZHANG , Lei DENG
Abstract: A display substrate and a preparation method thereof, and a display device are provided. The preparation method includes: forming a display region and a non-display region including an opening region; forming a first barrier wall between the display region and the opening region, in which the first barrier wall surrounds the opening region and includes a first metal layer structure, and a recess is formed on at least one side surface, surrounding the opening region, of the first metal layer structure; and after the first barrier wall is formed, forming a conductive layer pattern in the display region and on the first barrier wall. The forming the conductive layer pattern includes: forming a conductive material layer in the display region and on the first barrier wall, the conductive material layer being disconnected at the first barrier wall; and patterning the conductive material layer to form the conductive layer pattern.
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公开(公告)号：US20210210016A1
公开(公告)日：2021-07-08
申请号：US16069414
申请日：2017-11-15
Inventor： Zihua LI , Qi LIU , Guoping ZHANG , Jing LIU , Yuqing YANG , Xiping LI
IPC: G09G3/3258 , G09G3/3291 , G09G3/3266
Abstract: A pixel circuit, a display panel, a display device and a driving method are provided. The pixel circuit provides an initial signal having an excitation pulse to a control electrode of a driving transistor through a reset circuit in advance; and the initial signal having a preset voltage is provided to the control electrode of the driving transistor after a preset duration.
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公开(公告)号：US20210005686A1
公开(公告)日：2021-01-07
申请号：US16844307
申请日：2020-04-09
Inventor： Xuhui CHENG , Daji WANG , Yuqing YANG , Zhen ZHANG , Xiping LI , Fuwei ZOU , Yiyang ZHANG , Huiyang YU
Abstract: The disclosure provides a display substrate motherboard, a manufacturing method thereof, a display panel motherboard and a manufacturing method of a display substrate. The display substrate motherboard includes a base substrate including multiple substrate areas, each substrate area including a display region and a pad region; a display structure layer located on the base substrate and including a pixel defining layer and multiple film layers located between the pixel defining layer and the base substrate, a blocking region is arranged between any two adjacent substrate areas; a portion of the display structure layer in the blocking region has a first groove therein, a portion of the display structure layer between the first groove and the pad region adjacent thereto constitutes a first spacer region; a thickness of the portion of the display structure layer in the first spacer region is less than that in the display region.
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