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1.发明申请公开(公告)号：US20160223901A1
公开(公告)日：2016-08-04
申请号：US14744392
申请日：2015-06-19
发明人： Xiaoxiang Zhang , Zheng Liu , Zongjie Guo , Zhichao Zhang , Mingxuan Liu , Xi Chen
CPC分类号： G02F1/1339 , G02F1/1341 , G02F2001/133354 , G03F1/42 , G03F1/54
摘要： An UV curing mask plate, comprising: a mask layer, wherein: the mask layer is arranged on the substrate, and has a position corresponding to alignment marks, selection marks and an area not covered by the sealing frame glue to be cured; the material of the mask layer is a material with the function of blocking UV light.
摘要翻译： 一种UV固化掩模板，包括：掩模层，其中：所述掩模层布置在所述基板上，并且具有对应于对准标记，选择标记和未被待固化的密封框胶水覆盖的区域的位置; 掩模层的材料是具有阻挡UV光的功能的材料。
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公开(公告)号：US20160217727A1
公开(公告)日：2016-07-28
申请号：US14803876
申请日：2015-07-20
发明人： Huibin Guo , Liangliang Li , Shoukun Wang , Yuchun Feng , Jing Wang , Zongjie Guo , Jianfeng Yuan
CPC分类号： G11C19/28 , G09G2310/0286
摘要： The embodiment of the present invention discloses a display panel, a driving method thereof and a display device, a plurality of shift register units connected in one-to-one correspondence are arranged at one terminal of a plurality of gate lines, a plurality of charging modules connected in one-to-one correspondence are arranged at the other terminal of the plurality of gate lines; each charging module charges a corresponding gate line when the corresponding gate line is applied with a scanning signal by the shift register unit, i.e., when the shift register unit applies a scanning signal to the gate line, the charging module to which the gate line corresponds charges the gate line at the same time, which realizes bidirectional application of the scanning signal to the gate line, and increases the charging rate of the gate line.
摘要翻译： 本发明的实施例公开了一种显示面板及其驱动方法和显示装置，在多个栅极线的一个端子处配置有一对一连接的多个移位寄存器单元，多个充电 一对一对应连接的模块布置在多条栅极线的另一端; 当移位寄存器单元对扫描信号施加相应的栅极线时，每个充电模块对相应的栅线充电，即当移位寄存器单元向栅极线施加扫描信号时，栅极线对应的充电模块 同时对栅极线进行充电，这实现了扫描信号向栅极线的双向应用，并且增加了栅极线的充电速率。
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公开(公告)号：US20150359078A1
公开(公告)日：2015-12-10
申请号：US14500379
申请日：2014-09-29
发明人： Zhichao Zhang , Zongjie Guo , Zheng Liu , Xiangqian Ding , Mingxuan Liu
IPC分类号： H05F3/04
CPC分类号： H05F3/04 , H05K9/0067
摘要： A discharge device and a display panel preparation system based thereon are disclosed. The discharge device includes a conductive contact terminal electrically connected with an electrostatic discharge contactor of a substrate to be processed; and a voltage controller electrically connected to the contact terminal for adjusting a voltage on the contact terminal. The discharge device is able to eliminate (e.g., neutralize) the static electricity on the substrate to be processed.
摘要翻译： 公开了一种基于此的放电装置和显示面板制备系统。 放电装置包括与要处理的基板的静电放电接触器电连接的导电接触端子; 电压控制器电连接到接触端子，用于调节接触端子上的电压。 放电装置能够消除（例如，中和）要处理的基板上的静电。
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公开(公告)号：US20150318304A1
公开(公告)日：2015-11-05
申请号：US14314433
申请日：2014-06-25
发明人： Xiaowei Liu , Xi Chen , Zhenfei Cai , Yao Liu , Liangliang Li , Zongjie Guo
IPC分类号： H01L27/12 , H01L21/768
CPC分类号： G02F1/13458 , G02F2001/13456 , H01L21/768 , H01L27/124 , H01L27/1248 , H01L27/1259
摘要： The present disclosure relates to an array substrate, a method of manufacturing the same and a display device. The array substrate comprises a gate line PAD region and a data line PAD region. In the gate line PAD region of the array substrate, gate-line wirings, which are parallel to the gate lines and are electrically insulated from the gate lines, are provided between adjacent gate lines. In the data line PAD region of the array substrate, data-line wirings, which are parallel to the data lines and are electrically insulated from the data lines, are provided between adjacent data lines. Both of the gate-line wirings and the data-line wirings are conductive wiring segments. By forming the gate-line wirings and the data-line wirings in the PAD region, the ability of resisting scratch of the product can be improved while not deteriorating performance of display of the product.
摘要翻译： 本发明涉及阵列基板，其制造方法和显示装置。 阵列基板包括栅极线PAD区域和数据线PAD区域。 在阵列基板的栅极线PAD区域中，与栅极线平行且与栅极线电绝缘的栅极线配线设置在相邻的栅极线之间。 在阵列基板的数据线PAD区域中，在相邻数据线之间设置与数据线并行并与数据线电绝缘的数据线布线。 栅线布线和数据线布线都是导电布线段。 通过在PAD区域中形成栅极布线和数据线布线，可以在不降低产品显示性能的同时，提高产品耐刮擦能力。
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公开(公告)号：US20150311222A1
公开(公告)日：2015-10-29
申请号：US14310826
申请日：2014-06-20
发明人： Jinchao Bai , Yao Liu , Liangliang Li , Xiangqian Ding , Zongjie Guo
IPC分类号： H01L27/12
CPC分类号： H01L27/124 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides an array substrate, its manufacturing method, and a display device. The array substrate comprises a gate metal layer, a gate insulating layer, a source/drain metal layer, first common electrode lines arranged on an identical layer to the gate metal layer, a first via hole arranged in the gate insulating layer and corresponding to the first common electrode line, a source/drain metal filling part arranged within the first via hole, a second via hole in communication with the first via hole, and a transparent connection part. The first common electrode lines are, by means of the transparent connection part and the source/drain metal filling part, in electrical connection with each other through the second via hole. According to the present invention, it is able to reduce the depth of the via holes in the array substrate, and improve the uneven diffusion of an alignment layer.
摘要翻译： 本发明提供阵列基板，其制造方法和显示装置。 阵列基板包括栅极金属层，栅极绝缘层，源极/漏极金属层，布置在与栅极金属层相同的层上的第一公共电极线，布置在栅极绝缘层中并对应于栅极金属层的第一通孔 第一公共电极线，设置在第一通孔内的源极/漏极金属填充部，与第一通孔连通的第二通孔和透明连接部。 第一公共电极线通过透明连接部分和源极/漏极金属填充部分通过第二通孔彼此电连接。 根据本发明，能够减小阵列基板中的通孔的深度，并且可以改善取向层的不均匀扩散。
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公开(公告)号：US10209573B2
公开(公告)日：2019-02-19
申请号：US14744392
申请日：2015-06-19
发明人： Xiaoxiang Zhang , Zheng Liu , Zongjie Guo , Zhichao Zhang , Mingxuan Liu , Xi Chen
IPC分类号： G03F1/42 , G02F1/1339 , G03F1/54 , G02F1/1341 , G02F1/1333
摘要： An UV curing mask plate, comprising: a mask layer, wherein: the mask layer is arranged on the substrate, and has a position corresponding to alignment marks, selection marks and an area not covered by the sealing frame glue to be cured; the material of the mask layer is a material with the function of blocking UV light.
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公开(公告)号：US09817287B2
公开(公告)日：2017-11-14
申请号：US14314433
申请日：2014-06-25
发明人： Xiaowei Liu , Xi Chen , Zhenfei Cai , Yao Liu , Liangliang Li , Zongjie Guo
IPC分类号： H01L21/768 , H01L27/12 , G02F1/1345
CPC分类号： G02F1/13458 , G02F2001/13456 , H01L21/768 , H01L27/124 , H01L27/1248 , H01L27/1259
摘要： The present disclosure relates to an array substrate, a method of manufacturing the same and a display device. The array substrate comprises a gate line PAD region and a data line PAD region. In the gate line PAD region of the array substrate, gate-line wirings, which are parallel to the gate lines and are electrically insulated from the gate lines, are provided between adjacent gate lines. In the data line PAD region of the array substrate, data-line wirings, which are parallel to the data lines and are electrically insulated from the data lines, are provided between adjacent data lines. Both of the gate-line wirings and the data-line wirings are conductive wiring segments. By forming the gate-line wirings and the data-line wirings in the PAD region, the ability of resisting scratch of the product can be improved while not deteriorating performance of display of the product.
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公开(公告)号：US09595547B2
公开(公告)日：2017-03-14
申请号：US14568813
申请日：2014-12-12
发明人： Huibin Guo , Shoukun Wang , Liangliang Li , Yuchun Feng , Zongjie Guo
IPC分类号： H01L27/12 , H01L29/786
CPC分类号： H01L27/1259 , H01L27/1222 , H01L27/124 , H01L29/78663
摘要： The invention discloses an array substrate, and a method for repairing a broken data line on an array substrate. The method for repairing a broken data line on an array substrate includes steps: performing a treatment on a part of a semiconductor layer corresponding to an opening in a data line so that the part of the semiconductor layer becomes a conductive region, and the ends of the opening in the data line are electrically connected to each other by the conductive semiconductor layer. The above method for repairing a broken data line provided by the invention is not affected by the linewidth of the data line so that the broken data line can be repaired in the case that the linewidth of the data line is relatively small.
摘要翻译： 本发明公开了一种阵列基板，以及在阵列基板上修复断线数据线的方法。 用于修复阵列基板上的断裂数据线的方法包括以下步骤：对与数据线中的开口相对应的半导体层的一部分进行处理，使得半导体层的一部分变为导电区域， 数据线中的开口通过导电半导体层彼此电连接。 上述用于修复由本发明提供的断线数据线的方法不受数据线的线宽的影响，从而在数据线的线宽相对较小的情况下可以修复断线数据线。
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公开(公告)号：US20160372629A1
公开(公告)日：2016-12-22
申请号：US14436141
申请日：2014-07-29
发明人： Xiaoxiang Zhang , Zheng Liu , Zongjie Guo
CPC分类号： H01L33/0095 , G02B5/003 , G02B27/2214 , H01L21/76807 , H01L21/7684 , H01L27/124 , H01L27/1288 , H01L27/3248 , H01L33/42 , H01L33/44 , H01L33/58 , H01L2933/0016 , H01L2933/0025 , H01L2933/0058
摘要： The present invention provides a manufacturing method for a light barrier substrate which comprising steps of: forming a metal electrode pattern on a substrate through a first patterning process; forming an insulating layer above the substrate and the metal electrode pattern; forming a metal electrode via hole on the insulating layer and forming a channel pattern for a connecting line between a metal electrode and an exterior integrated circuit (IC) on the insulating layer, with a half tone make process, through a second patterning process; forming a transparent electrode layer pattern on the substrate on which the metal electrode via hole and the channel pattern are formed. The masking steps for forming the insulating layer and the transparent electrode layer may be decreased due to the half tone masking process, thus, the manufacturing process is simplified and the manufacturing efficiency is increased, and the cost for manufacturing the light barrier substrate is lowered because the mask is less used in the manufacturing process.
摘要翻译： 本发明提供一种光阻板基片的制造方法，包括以下步骤：通过第一图形化工艺在基片上形成金属电极图案; 在衬底上方形成绝缘层和金属电极图案; 在所述绝缘层上形成金属电极通孔，并通过第二图案化工艺，通过半色调制作工艺，在所述绝缘层上形成金属电极和外部集成电路（IC）之间的连接线的沟道图案; 在其上形成有金属电极通孔和沟道图案的基板上形成透明电极层图案。 用于形成绝缘层和透明电极层的掩模步骤可以由于半色调掩蔽处理而降低，因此，制造工艺简化并且制造效率提高，并且制造光阻垒基板的成本降低，因为 该掩模在制造过程中较少使用。
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公开(公告)号：US10014329B2
公开(公告)日：2018-07-03
申请号：US14436843
申请日：2014-09-11
发明人： Jinchao Bai , Xiangqian Ding , Yao Liu , Liangliang Li , Zongjie Guo
CPC分类号： H01L27/1248 , H01L27/124 , H01L27/127 , H01L27/1288
摘要： An array substrate and manufacturing method thereof and display device are provided. The method of manufacturing the array substrate includes forming a pattern including a gate electrode, a gate line, a common electrode line and a gate insulating layer on a substrate; forming a pattern including a data line, a source electrode, a drain electrode and an active layer; forming a pattern including an insulating interlayer over the pattern of the source electrode, the drain electrode and the active layer; forming a pattern including a first transparent electrode over the insulating interlayer; forming a pattern including a passivation layer over the first transparent electrode; and forming a pattern including a second transparent electrode over the passivation layer. The method can efficiently prevent the ITO process polluting the TFT channel.
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