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公开(公告)号：US10304861B2
公开(公告)日：2019-05-28
申请号：US15326383
申请日：2016-01-29
发明人： Shoukun Wang , Jianfeng Yuan , Huibin Guo , Yuchun Feng , Liangliang Li , Tsung-Chieh Kuo
IPC分类号： H01L29/04 , H01L27/12 , G02F1/1333 , G02F1/1343 , G02F1/1362 , G02F1/1368
摘要： The present disclosure provide an array substrate and a method of manufacturing the same, and a display panel. The array substrate includes: a base substrate; a first signal transmission layer comprising a common electrode line; a first insulating layer covering the first signal transmission layer and having a first through hole at a position corresponding to the common electrode line; a first electrode layer located on the first insulating layer, the first electrode layer comprising a connection electrode located at the position of the first through hole; a second insulating layer covering the first electrode layer and having a second through hole at a position corresponding to the connection electrode; and a second electrode layer comprising a common electrode that covers the second through hole; the connection electrode contacts the common electrode line and the common electrode respectively.
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公开(公告)号：US10254609B2
公开(公告)日：2019-04-09
申请号：US15525979
申请日：2016-05-25
发明人： Shoukun Wang , Huibin Guo , Yuchun Feng , Liangliang Li
IPC分类号： H01L27/12 , G02F1/1362 , H01L21/77 , G02F1/1343 , G02F1/1368 , H01L29/49
摘要： An array substrate and a method of manufacturing the same, a display panel and a display device are provided. The array substrate includes a thin film transistor and a pixel electrode. An insulating layer is formed between a drain electrode of the thin film transistor and the pixel electrode. The drain electrode is in direct electrical contact with the pixel electrode through a via-hole in the insulating layer.
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公开(公告)号：US20170271370A1
公开(公告)日：2017-09-21
申请号：US15326383
申请日：2016-01-29
发明人： Shoukun Wang , Jianfeng Yuan , Huibin Guo , Yuchun Feng , Liangliang Li , Tsung-Chieh Kuo
IPC分类号： H01L27/12 , G02F1/1362 , G02F1/1343 , G02F1/1368 , G02F1/1333
CPC分类号： H01L27/124 , G02F1/133345 , G02F1/134309 , G02F1/13439 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/134372 , G02F2201/121 , G02F2201/123 , H01L27/1218 , H01L27/1244 , H01L27/1248 , H01L27/1288
摘要： The present disclosure provide an array substrate and a method of manufacturing the same, and a display panel. The array substrate includes: a base substrate; a first signal transmission layer comprising a common electrode line; a first insulating layer covering the first signal transmission layer and having a first through hole at a position corresponding to the common electrode line; a first electrode layer located on the first insulating layer, the first electrode layer comprising a connection electrode located at the position of the first through hole; a second insulating layer covering the first electrode layer and having a second through hole at a position corresponding to the connection electrode; and a second electrode layer comprising a common electrode that covers the second through hole; the connection electrode contacts the common electrode line and the common electrode respectively.
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公开(公告)号：US20160217727A1
公开(公告)日：2016-07-28
申请号：US14803876
申请日：2015-07-20
发明人： Huibin Guo , Liangliang Li , Shoukun Wang , Yuchun Feng , Jing Wang , Zongjie Guo , Jianfeng Yuan
CPC分类号： G11C19/28 , G09G2310/0286
摘要： The embodiment of the present invention discloses a display panel, a driving method thereof and a display device, a plurality of shift register units connected in one-to-one correspondence are arranged at one terminal of a plurality of gate lines, a plurality of charging modules connected in one-to-one correspondence are arranged at the other terminal of the plurality of gate lines; each charging module charges a corresponding gate line when the corresponding gate line is applied with a scanning signal by the shift register unit, i.e., when the shift register unit applies a scanning signal to the gate line, the charging module to which the gate line corresponds charges the gate line at the same time, which realizes bidirectional application of the scanning signal to the gate line, and increases the charging rate of the gate line.
摘要翻译： 本发明的实施例公开了一种显示面板及其驱动方法和显示装置，在多个栅极线的一个端子处配置有一对一连接的多个移位寄存器单元，多个充电 一对一对应连接的模块布置在多条栅极线的另一端; 当移位寄存器单元对扫描信号施加相应的栅极线时，每个充电模块对相应的栅线充电，即当移位寄存器单元向栅极线施加扫描信号时，栅极线对应的充电模块 同时对栅极线进行充电，这实现了扫描信号向栅极线的双向应用，并且增加了栅极线的充电速率。
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公开(公告)号：US20150318304A1
公开(公告)日：2015-11-05
申请号：US14314433
申请日：2014-06-25
发明人： Xiaowei Liu , Xi Chen , Zhenfei Cai , Yao Liu , Liangliang Li , Zongjie Guo
IPC分类号： H01L27/12 , H01L21/768
CPC分类号： G02F1/13458 , G02F2001/13456 , H01L21/768 , H01L27/124 , H01L27/1248 , H01L27/1259
摘要： The present disclosure relates to an array substrate, a method of manufacturing the same and a display device. The array substrate comprises a gate line PAD region and a data line PAD region. In the gate line PAD region of the array substrate, gate-line wirings, which are parallel to the gate lines and are electrically insulated from the gate lines, are provided between adjacent gate lines. In the data line PAD region of the array substrate, data-line wirings, which are parallel to the data lines and are electrically insulated from the data lines, are provided between adjacent data lines. Both of the gate-line wirings and the data-line wirings are conductive wiring segments. By forming the gate-line wirings and the data-line wirings in the PAD region, the ability of resisting scratch of the product can be improved while not deteriorating performance of display of the product.
摘要翻译： 本发明涉及阵列基板，其制造方法和显示装置。 阵列基板包括栅极线PAD区域和数据线PAD区域。 在阵列基板的栅极线PAD区域中，与栅极线平行且与栅极线电绝缘的栅极线配线设置在相邻的栅极线之间。 在阵列基板的数据线PAD区域中，在相邻数据线之间设置与数据线并行并与数据线电绝缘的数据线布线。 栅线布线和数据线布线都是导电布线段。 通过在PAD区域中形成栅极布线和数据线布线，可以在不降低产品显示性能的同时，提高产品耐刮擦能力。
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公开(公告)号：US20150311222A1
公开(公告)日：2015-10-29
申请号：US14310826
申请日：2014-06-20
发明人： Jinchao Bai , Yao Liu , Liangliang Li , Xiangqian Ding , Zongjie Guo
IPC分类号： H01L27/12
CPC分类号： H01L27/124 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides an array substrate, its manufacturing method, and a display device. The array substrate comprises a gate metal layer, a gate insulating layer, a source/drain metal layer, first common electrode lines arranged on an identical layer to the gate metal layer, a first via hole arranged in the gate insulating layer and corresponding to the first common electrode line, a source/drain metal filling part arranged within the first via hole, a second via hole in communication with the first via hole, and a transparent connection part. The first common electrode lines are, by means of the transparent connection part and the source/drain metal filling part, in electrical connection with each other through the second via hole. According to the present invention, it is able to reduce the depth of the via holes in the array substrate, and improve the uneven diffusion of an alignment layer.
摘要翻译： 本发明提供阵列基板，其制造方法和显示装置。 阵列基板包括栅极金属层，栅极绝缘层，源极/漏极金属层，布置在与栅极金属层相同的层上的第一公共电极线，布置在栅极绝缘层中并对应于栅极金属层的第一通孔 第一公共电极线，设置在第一通孔内的源极/漏极金属填充部，与第一通孔连通的第二通孔和透明连接部。 第一公共电极线通过透明连接部分和源极/漏极金属填充部分通过第二通孔彼此电连接。 根据本发明，能够减小阵列基板中的通孔的深度，并且可以改善取向层的不均匀扩散。
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公开(公告)号：US10147643B2
公开(公告)日：2018-12-04
申请号：US15521079
申请日：2016-09-07
发明人： Shoukun Wang , Huibin Guo , Yuchun Feng , Liangliang Li
IPC分类号： H01L21/77 , H01L27/12 , H01L21/3213 , H01L27/14
摘要： An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate, a signal line disposed on the base substrate, an extinction layer disposed between the base substrate and the signal line, the extinction layer being configured to reduce an ambient light when the array substrate is located on a light exiting side. An orthographic projection of the signal line in a plane of the base substrate is coincided with an orthographic projection of the extinction layer in the plane of the base substrate.
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8.发明授权公开(公告)号：US10101626B2
公开(公告)日：2018-10-16
申请号：US15324053
申请日：2016-01-29
发明人： Shoukun Wang , Huibin Guo , Yuchun Feng , Liangliang Li , Tsungchieh Kuo
IPC分类号： H01L33/00 , G02F1/136 , G02F1/1343 , G02F1/1368 , G02F1/1362 , H01L27/12 , G06F3/038 , G09G3/36 , G09G3/20
摘要： An array substrate, a display panel, a display device, and a method for fabricating an array substrate are provided. The array substrate comprises gate lines and data lines on a substrate plate which are insulated from each other and intersect to define sub-pixel units, and the data lines comprise a first data line and a second data line which are arranged side by side between two neighboring columns of sub-pixel units. Between two of the sub-pixel units which are neighbors in a column direction, at least a portion of the first data line is arranged in a layer different from the neighboring second data line. At least a part of the first data line is arranged in a layer different from that of the neighboring second data line, to overcome the problem of short circuit between dual data lines.
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公开(公告)号：US09817287B2
公开(公告)日：2017-11-14
申请号：US14314433
申请日：2014-06-25
发明人： Xiaowei Liu , Xi Chen , Zhenfei Cai , Yao Liu , Liangliang Li , Zongjie Guo
IPC分类号： H01L21/768 , H01L27/12 , G02F1/1345
CPC分类号： G02F1/13458 , G02F2001/13456 , H01L21/768 , H01L27/124 , H01L27/1248 , H01L27/1259
摘要： The present disclosure relates to an array substrate, a method of manufacturing the same and a display device. The array substrate comprises a gate line PAD region and a data line PAD region. In the gate line PAD region of the array substrate, gate-line wirings, which are parallel to the gate lines and are electrically insulated from the gate lines, are provided between adjacent gate lines. In the data line PAD region of the array substrate, data-line wirings, which are parallel to the data lines and are electrically insulated from the data lines, are provided between adjacent data lines. Both of the gate-line wirings and the data-line wirings are conductive wiring segments. By forming the gate-line wirings and the data-line wirings in the PAD region, the ability of resisting scratch of the product can be improved while not deteriorating performance of display of the product.
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公开(公告)号：US09673229B2
公开(公告)日：2017-06-06
申请号：US15177795
申请日：2016-06-09
发明人： Jinchao Bai , Yao Liu , Liangliang Li , Zhaohui Hao , Liang Sun
IPC分类号： H01L29/04 , H01L29/10 , H01L31/00 , H01L27/12 , G02F1/1368 , G02F1/1362 , G02F1/1345 , G02F1/1333 , H01L23/31 , G02F1/1343
CPC分类号： H01L27/124 , G02F1/133345 , G02F1/1345 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/134318 , G02F2201/121 , G02F2201/123 , G02F2201/40 , H01L23/3171 , H01L27/1214 , H01L27/1218 , H01L27/1248
摘要： An array substrate, a method for manufacturing the same and a display apparatus are provided. The array substrate comprises: a substrate (1); a common electrode (2) and a pixel electrode (10) sequentially formed on the substrate (1) and insulated from each other; a thin film transistor comprising a gate electrode (4), an active layer (7), a source electrode (8a) and a drain electrode (8b), wherein the drain electrode (8b) is electrically connected with the pixel electrode (10); a common electrode line (5) disposed in a same layer as the gate electrode (4); and an insulating layer (3) between the gate electrode (4) and the common electrode (2), wherein the common electrode (2) is connected with the common electrode line (5) through a through hole in the insulating layer (3).
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