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公开(公告)号:US09823567B2
公开(公告)日:2017-11-21
申请号:US14361763
申请日:2013-06-14
发明人: Yong Liu , Xiaohe Li , Hongmin Li , Xianjie Shao , Qinghua Jiang
摘要: A manufacturing method of a mask plate for shielding during sealant-curing includes: forming a negative photoresist light-shielding material layer on a transparent substrate; with a color-filter mask plate set, exposing the substrate formed with the negative photoresist light-shielding material layer; developing the substrate after exposing to form the pattern of the mask plate. The method does not require separate fabrication of a mask plate, thereby significantly reducing the manufacturing costs of the mask plate for shielding during sealant-curing.
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公开(公告)号:US09613583B2
公开(公告)日:2017-04-04
申请号:US14424247
申请日:2014-05-23
发明人: Xianjie Shao , Hongmin Li , Xiaohe Li , Yong Liu , Qinghua Jiang , Xiaojie Zhang , Feng Qin
CPC分类号: G09G3/3677 , G09G2300/0408 , G09G2300/0871 , G09G2310/0291 , G09G2310/08 , G09G2320/0219 , G09G2320/043 , G11C19/28
摘要: There is provided a shift register unit and driving method for the shift register unit, a shift register and a display device. The shift register unit comprises a first capacitor (C1), an input buffering module (31), a pulling-up module (32), a reset control module (33), a pulling-down module (34) and a pulling-down enhancement module (35); the pulling-down module (34) is configured to reduce the level at the signal output terminal (OUTPUT) and discharge the first capacitor (C1) during a first noise-removal phase; the pulling-down enhancement module (35) is configured to control, in cooperation with the pulling-down module (34), to continuously reduce the level at the signal output terminal (OUTPUT) and continuously discharge the first capacitor (C1) during a second noise-removal phase. Noise in the output signals of the shift register can be reduced and reliability of the shift register can be improved.
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公开(公告)号:US10394073B2
公开(公告)日:2019-08-27
申请号:US14912868
申请日:2015-08-12
发明人: Gaofei Shi , Yijun Wang , Jie Song , Tianzhen Liu , Qinghua Jiang
IPC分类号: G02F1/1335 , C23C14/08 , C23C14/14 , C23C14/24 , C23C14/34 , C23C14/58 , G02B5/20 , G03F7/00 , G03F7/20 , G03F7/30 , G06F3/041 , G06F3/044 , G02B1/14 , G02B5/00 , G02B5/30
摘要: The present disclosure relates to a color film substrate, a method for manufacturing the color film substrate, a display device and a method for manufacturing the display device. The color film substrate comprises: a basal substrate; a color film layer arranged on a side of the basal substrate; a conductive layer arranged on another side of the basal substrate, the conductive layer comprising a plurality of conductive regions; each conductive region comprising a driving channel and an inducing channel; a first gap between the driving channel and the inducing channel in a same conductive region, a second gap between adjacent conductive regions; the first gap and the second gap correspond to a position of a black matrix in the color film layer; the black matrix being used for absorbing light, which light comes from a side of the basal substrate provided with the conductive layer, enters from the first gaps and the second gaps, and passes through the basal substrate. With the solution according to the embodiment of the present invention, the shadow elimination effect of a substrate can be ensured without adding or removing any layer structure for the color film substrate, thereby avoiding impacts on the other performances of the color film substrate.
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公开(公告)号:US10234998B2
公开(公告)日:2019-03-19
申请号:US15325415
申请日:2016-01-26
发明人: Bo Liu , Long Xia , Qinghua Jiang , Xiaohe Li
摘要: The touch display panel comprises an array substrate, a color film substrate a touch electrode layer located at a side of the color film substrate away from the array substrate, and a transparent electrically conductive layer between the color film substrate and the touch electrode layer and insulated from the touch electrode layer. The transparent electrically conductive layer comprises a first area and a second area, a thickness of the transparent electrically conductive layer in the first area is greater than a thickness of the transparent electrically conductive layer in the second area, the transparent electrically conductive layer is suitable for being electrically connected to ground. A projection area of the touch electrode layer on the color film substrate overlaps with a projection area of the transparent electrically conductive layer located in the second area on the color film substrate.
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公开(公告)号:US20150339991A1
公开(公告)日:2015-11-26
申请号:US14408683
申请日:2013-12-12
发明人: Qinghua Jiang , Feng Qin , Xiaohe Li , Hongmin Li , Xiaojie Zhang
IPC分类号: G09G3/36
CPC分类号: G09G3/3614 , G02F1/134363 , G02F2001/134372 , G02F2201/121 , G09G3/3648 , G09G2300/0426
摘要: An array substrate (40), a driving method thereof and a display apparatus, relate to a field of display technique. The array substrate (40) comprises a plurality of pixel units (33) arranged in a matrix form and divided by a plurality of crisscrossed gate lines (31) and data lines (32), each of the pixel units (33) comprises pixel electrodes (331) and further comprises common electrodes (332); in the matrix of the pixel units (33), voltage polarities of the common electrodes (332) corresponding to pixel units (33) with a sum of numbers of rows and columns being equal are the same; voltage polarities of the common electrodes (332) of adjacent pixel units (33) are reverse. By adopting the array substrate of such a structure, the voltage swing of the data line (32) driving voltage between the positive and negative polarity gray scale is greatly reduced while the dot reversal driving is realized, thereby effectively reducing the power consumption of the array substrate (40) in the dot reversal driving mode.
摘要翻译: 阵列基板(40),其驱动方法和显示装置涉及显示技术领域。 阵列基板(40)包括多个像素单元(33),其以矩阵形式排列并被多个十字交叉的栅极线(31)和数据线(32)分开,每个像素单元(33)包括像素电极 (331)并且还包括公共电极(332); 在像素单元(33)的矩阵中,对应于像素单元(33)的公共电极(332)的电压极性与行和列数之和相等; 相邻像素单元(33)的公共电极(332)的电压极性相反。 通过采用这种结构的阵列基板,在实现点反转驱动的同时,在正负极性灰度级之间驱动电压的数据线(32)的电压摆幅大大降低,从而有效地降低阵列的功耗 基板(40)处于点反转驱动模式。
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公开(公告)号:US09881537B2
公开(公告)日:2018-01-30
申请号:US14744088
申请日:2015-06-19
发明人: Honggang Gu , Xiaohe Li , Xianjie Shao , Qinghua Jiang
IPC分类号: G09G3/20 , G02F1/1345
CPC分类号: G09G3/20 , G02F1/1345 , G02F2001/13456 , G09G2300/0408 , G09G2300/0426 , G09G2300/0452 , G09G2310/0278 , G09G2330/08
摘要: A display panel comprises: a set of gate lines; and a set of data lines and a set of transmission lines extending in substantially the same direction, the set of transmission lines being electrically connected to the set of gate lines, respectively. A flat panel display apparatus comprises: a set of gate lines; a set of data lines and a set of transmission lines extending in substantially the same direction, the set of transmission lines being electrically connected to the set of gate lines, respectively; and a control circuit electrically connected to the set of data lines and the set of transmission lines.
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公开(公告)号:US20160260370A1
公开(公告)日:2016-09-08
申请号:US14744088
申请日:2015-06-19
发明人: Honggang Gu , Xiaohe Li , Xianjie Shao , Qinghua Jiang
CPC分类号: G09G3/20 , G02F1/1345 , G02F2001/13456 , G09G2300/0408 , G09G2300/0426 , G09G2300/0452 , G09G2310/0278 , G09G2330/08
摘要: A display panel comprises: a set of gate lines; and a set of data lines and a set of transmission lines extending in substantially the same direction, the set of transmission lines being electrically connected to the set of gate lines, respectively. A flat panel display apparatus comprises: a set of gate lines; a set of data lines and a set of transmission lines extending in substantially the same direction, the set of transmission lines being electrically connected to the set of gate lines, respectively; and a control circuit electrically connected to the set of data lines and the set of transmission lines.
摘要翻译: 显示面板包括:一组栅极线; 以及一组数据线和一组沿基本上相同的方向延伸的传输线,该组传输线分别电连接到该组栅极线。 平板显示装置包括:一组栅极线; 一组数据线和一组沿基本上相同的方向延伸的传输线,该组传输线分别电连接到该组栅极线; 以及电连接到该组数据线和该组传输线的控制电路。
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8.
公开(公告)号:US20150277226A1
公开(公告)日:2015-10-01
申请号:US14361763
申请日:2013-06-14
发明人: Yong Liu , Xiaohe Li , Hongmin Li , Xianjie Shao , Qinghua Jiang
摘要: A manufacturing method of a mask plate for shielding during sealant-curing includes: forming a negative photoresist light-shielding material layer on a transparent substrate; with a color-filter mask plate set, exposing the substrate formed with the negative photoresist light-shielding material layer; developing the substrate after exposing to form the pattern of the mask plate. The method does not require separate fabrication of a mask plate, thereby significantly reducing the manufacturing costs of the mask plate for shielding during sealant-curing.
摘要翻译: 在密封固化期间遮蔽掩模板的制造方法包括:在透明基板上形成负光致抗蚀剂光阻材料层; 用彩色滤光片掩模板组合,使形成有负性光刻胶遮光材料层的基板曝光; 在曝光之后显影衬底以形成掩模板的图案。 该方法不需要单独制造掩模板,从而显着降低了密封剂固化期间用于屏蔽的掩模板的制造成本。
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9.
公开(公告)号:US20150129882A1
公开(公告)日:2015-05-14
申请号:US14361883
申请日:2013-12-19
发明人: Qinghua Jiang , Xiaohe Li , Yong Liu , Xianjie Shao , Hongmin Li
IPC分类号: H01L27/12 , H01L29/786 , H01L29/423 , H01L29/66
CPC分类号: H01L27/124 , G02F1/1362 , G02F1/1368 , H01L27/1259 , H01L29/41733 , H01L29/42384 , H01L29/66742 , H01L29/786
摘要: The invention relates to an array substrate for a display device and to a method for manufacturing an array substrate comprising a thin-film transistor (“TFT”). An array substrate according to an embodiment of the invention comprises a source electrode, a gate electrode and a drain electrode, wherein the gate electrode is located on a first metal layer, the source electrode and the drain electrode are located on a second metal layer, and in the case that dislocation occurs between the first metal layer and the second metal layer, the area of the overlapping region between the source electrode and the gate electrode keeps constant.
摘要翻译: 本发明涉及一种用于显示装置的阵列基板和一种用于制造包括薄膜晶体管(“TFT”)的阵列基板的方法。 根据本发明实施例的阵列基板包括源电极,栅电极和漏电极,其中栅电极位于第一金属层上,源电极和漏电极位于第二金属层上, 并且在第一金属层和第二金属层之间发生位错的情况下,源电极和栅电极之间的重叠区域的面积保持恒定。
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公开(公告)号:US11423823B2
公开(公告)日:2022-08-23
申请号:US17255665
申请日:2020-06-02
发明人: Wei Xue , Hongmin Li , Yue Shi , Qinghua Jiang
摘要: The present disclosure provides a shift register including: a pre-charge reset circuit and an output circuit, the pre-charge reset circuit is configured to write, in a pre-charge stage, an input signal in an active level state into the pull-up node in response to the control of a first control signal, and write, in a reset stage, an input signal in an inactive level state into the pull-up node in response to the control of a second control signal; the output circuit is configured to write, in an output stage, a clock signal in an active level state into a signal output terminal in response to the control of an electric signal in an active level state at the pull-up node, and write, in the reset stage, a clock signal in an inactive level state into the signal output terminal in response to the control of the second control signal.
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