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公开(公告)号:US20170154677A1
公开(公告)日:2017-06-01
申请号:US15351550
申请日:2016-11-15
申请人: BONGSOON LIM , JUNG-YUN YUN , JI-SUK KIM , SANG-WON PARK
发明人: BONGSOON LIM , JUNG-YUN YUN , JI-SUK KIM , SANG-WON PARK
CPC分类号: G11C16/10 , G11C7/1063 , G11C11/5628 , G11C16/0483 , G11C16/08 , G11C16/26 , G11C16/3459 , G11C2211/5621
摘要: A storage device includes a nonvolatile memory device and a controller. The controller provides the nonvolatile memory device with first data, an address, and a program start command and provides the nonvolatile memory device with second data after the program start command is provided the nonvolatile memory device. The nonvolatile memory device is configured to initiate a program operation, which is based on the first data, in response to the program start command and to continue to perform, based on the first data and the second data, the program operation when the second data is provided to the nonvolatile memory device. The nonvolatile memory device is configured to perform a program and a verification read of a first program loop based on the first data, the verification read of the first program loop being performed using one verification voltage.
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公开(公告)号:US20170154685A1
公开(公告)日:2017-06-01
申请号:US15360661
申请日:2016-11-23
申请人: JI-SUK KIM , JUNG-YUN YUN , BONGSOON LIM
发明人: JI-SUK KIM , JUNG-YUN YUN , BONGSOON LIM
CPC分类号: G06F3/0679 , G11C11/5628 , G11C16/08 , G11C16/10 , G11C16/32 , G11C16/3459
摘要: A storage device includes a nonvolatile memory device and a controller configured to send first data, an address, and a first command to the nonvolatile memory device. The controller also sends at least one data to the nonvolatile memory device after sending the first command. The nonvolatile memory device is configured to initiate a program operation, which is based on the first data, in response to the first command. When receiving the at least one data from the controller, the nonvolatile memory device is configured to continue to perform the program operation based on the first data and the at least one data.
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公开(公告)号:US20130051146A1
公开(公告)日:2013-02-28
申请号:US13584847
申请日:2012-08-14
申请人: JUNG-YUN YUN , JONG-YEOL PARK , CHI-WEON YOON , SUNG-WON YUN , SU-YONG KIM
发明人: JUNG-YUN YUN , JONG-YEOL PARK , CHI-WEON YOON , SUNG-WON YUN , SU-YONG KIM
CPC分类号: H01L27/11582 , G11C16/0483
摘要: A three-dimensional (3D) semiconductor memory device comprises memory cell strings each comprising at least one selection transistor and at least one memory cell, a first pass transistor group sharing a first well region and comprising a first selection line pass transistor connected to the selection transistor and a first world line pass transistor connected to the memory cell, a second pass transistor group sharing a second well region and comprising a second selection line pass transistor connected to the selection transistor, and a controller that controls the first pass transistor group and the second pass transistor group. The controller applies selected voltages to the first and second well regions during read operation.
摘要翻译: 三维(3D)半导体存储器件包括存储单元串,每个存储单元串包括至少一个选择晶体管和至少一个存储单元,共享第一阱区的第一级晶体管组,并且包括连接到选择的第一选择线传输晶体管 晶体管和连接到存储单元的第一世界线传输晶体管,第二传输晶体管组共享第二阱区并且包括连接到选择晶体管的第二选择线传输晶体管,以及控制器,其控制第一传输晶体管组和 二级晶体管组。 控制器在读取操作期间将选择的电压施加到第一和第二阱区。
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