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    Robust and high performance instructions for system call
    1.
    发明授权
    Robust and high performance instructions for system call 有权
    强大而高性能的系统调用指令

    公开(公告)号：US09207940B2

    公开(公告)日：2015-12-08

    申请号：US13837878

    申请日：2013-03-15

    申请人： Baiju V. Patel ,  James B. Crossland ,  Atul A. Khare ,  Toby Opferman

    发明人： Baiju V. Patel ,  James B. Crossland ,  Atul A. Khare ,  Toby Opferman

    IPC分类号： G06F9/30 ,  G06F9/00

    CPC分类号： G06F9/30145 ,  G06F9/30054 ,  G06F9/52 ,  G06F9/54 ,  G06F2209/521

    摘要： Robust system call and system return instructions are executed by a processor to transfer control between a requester and an operating system kernel. The processor includes execution circuitry and registers that store pointers to data structures in memory. The execution circuitry receives a system call instruction from a requester to transfer control from a first privilege level of the requester to a second privilege level of an operating system kernel. In response, the execution circuitry swaps the data structures that are pointed to by the registers between the requester and the operating system kernel in one atomic transition.

    摘要翻译： 强大的系统调用和系统返回指令由处理器执行，以在请求者和操作系统内核之间传输控制。 处理器包括执行电路和寄存器，其存储指向存储器中的数据结构的指针。 执行电路从请求者接收系统调用指令，以将控制从请求者的第一特权级别转移到操作系统内核的第二特权级别。 作为响应，执行电路在一个原子转换中交换请求者和操作系统内核之间的寄存器所指向的数据结构。

    Robust and High Performance Instructions for System Call
    2.
    发明申请
    Robust and High Performance Instructions for System Call 有权
    强大的高性能系统呼叫指令

    公开(公告)号：US20140281437A1

    公开(公告)日：2014-09-18

    申请号：US13837878

    申请日：2013-03-15

    申请人： Baiju V. Patel ,  James B. Crossland ,  Atul A. Khare ,  Toby Opferman

    发明人： Baiju V. Patel ,  James B. Crossland ,  Atul A. Khare ,  Toby Opferman

    IPC分类号： G06F9/30

    CPC分类号： G06F9/30145 ,  G06F9/30054 ,  G06F9/52 ,  G06F9/54 ,  G06F2209/521

    摘要： Robust system call and system return instructions are executed by a processor to transfer control between a requester and an operating system kernel. The processor includes execution circuitry and registers that store pointers to data structures in memory. The execution circuitry receives a system call instruction from a requester to transfer control from a first privilege level of the requester to a second privilege level of an operating system kernel. In response, the execution circuitry swaps the data structures that are pointed to by the registers between the requester and the operating system kernel in one atomic transition.

    摘要翻译： 强大的系统调用和系统返回指令由处理器执行，以在请求者和操作系统内核之间传输控制。 处理器包括执行电路和寄存器，其存储指向存储器中的数据结构的指针。 执行电路从请求者接收系统调用指令，以将控制从请求者的第一特权级别转移到操作系统内核的第二特权级别。 作为响应，执行电路在一个原子转换中交换请求者和操作系统内核之间的寄存器指向的数据结构。

    SYSTEM, APPARATUS, AND METHOD FOR SEGMENT REGISTER READ AND WRITE REGARDLESS OF PRIVILEGE LEVEL
    4.
    发明申请
    SYSTEM, APPARATUS, AND METHOD FOR SEGMENT REGISTER READ AND WRITE REGARDLESS OF PRIVILEGE LEVEL 有权
    系统，设备和分段注册读取和写入权限的优先权级别

    公开(公告)号：US20120166767A1

    公开(公告)日：2012-06-28

    申请号：US12976981

    申请日：2010-12-22

    申请人： Baiju V. Patel ,  Gilbert Neiger ,  Martin G. Dixon ,  James S. Coke ,  James B. Crossland

    发明人： Baiju V. Patel ,  Gilbert Neiger ,  Martin G. Dixon ,  James S. Coke ,  James B. Crossland

    IPC分类号： G06F9/312

    CPC分类号： G06F9/30032 ,  G06F9/30101 ,  G06F9/342

    摘要： Embodiments of systems, apparatuses, and methods for performing privilege agnostic segment base register read or write instruction are described. An exemplary method may include fetching the privilege agnostic segment base register write instruction, wherein the privilege agnostic write instruction includes a 64-bit data source operand, decoding the fetched privilege agnostic segment base register write instruction, and executing the decoded privilege agnostic segment base register write instruction to write the 64-bit data of the source operand into the segment base register identified by the opcode of the privilege agnostic segment base register write instruction.

    摘要翻译： 描述用于执行特权不可知段段基址寄存器读或写指令的系统，装置和方法的实施例。 一种示例性方法可以包括获取特权不可知段基址寄存器写指令，其中特权不可知写指令包括64位数据源操作数，对获取的特权不可知段基址寄存器写指令进行解码，以及执行解码的特权不可知段基址寄存器 写指令将源操作数的64位数据写入由特权不可知段基址寄存器写指令的操作码标识的段基寄存器中。

    System, apparatus, and method for segment register read and write regardless of privilege level
    6.
    发明授权
    System, apparatus, and method for segment register read and write regardless of privilege level 有权
    用于段寄存器读写的系统，设备和方法，无论权限级别如何

    公开(公告)号：US08938606B2

    公开(公告)日：2015-01-20

    申请号：US12976981

    申请日：2010-12-22

    申请人： Baiju V. Patel ,  Gilbert Neiger ,  Martin G. Dixon ,  James S. Coke ,  James B. Crossland

    发明人： Baiju V. Patel ,  Gilbert Neiger ,  Martin G. Dixon ,  James S. Coke ,  James B. Crossland

    IPC分类号： G06F9/30 ,  G06F9/34

    CPC分类号： G06F9/30032 ,  G06F9/30101 ,  G06F9/342

    摘要： Embodiments of systems, apparatuses, and methods for performing privilege agnostic segment base register read or write instruction are described. An exemplary method may include fetching the privilege agnostic segment base register write instruction, wherein the privilege agnostic write instruction includes a 64-bit data source operand, decoding the fetched privilege agnostic segment base register write instruction, and executing the decoded privilege agnostic segment base register write instruction to write the 64-bit data of the source operand into the segment base register identified by the opcode of the privilege agnostic segment base register write instruction.

    摘要翻译： 描述用于执行特权不可知段段基址寄存器读或写指令的系统，装置和方法的实施例。 一种示例性方法可以包括获取特权不可知段基址寄存器写指令，其中特权不可知写指令包括64位数据源操作数，对获取的特权不可知段基址寄存器写指令进行解码，以及执行解码的特权不可知段基址寄存器 写指令将源操作数的64位数据写入由特权不可知段基址寄存器写指令的操作码标识的段基寄存器中。