公开(公告)号：US07659610B2

公开(公告)日：2010-02-09

申请号：US12181721

申请日：2008-07-29

申请人： Ben Wei Chen ,  David Hong-Dien Chen ,  Jason Japen Chen

发明人： Ben Wei Chen ,  David Hong-Dien Chen ,  Jason Japen Chen

IPC分类号： H01L23/02

CPC分类号： H01L25/18 ,  H01L23/5387 ,  H01L23/5388 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/05553 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49175 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06575 ,  H01L2225/06579 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/15173 ,  H01L2924/15192 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A Flash memory card is disclosed comprising a substrate, a Flash memory die on top of the substrate, a controller die on top of the Flash memory die, and an interposer coupled to with the controller die and on top of the Flash memory die wherein the interposer results in substantial reduced wire bonding to the substrate. The interposer can surround or be placed side by side with the controller die. A system and method in accordance with the present invention achieves the following objectives: (1) takes advantage of as large of a Flash memory die as possible, to increase the density of the Flash card by reducing the number of wire bond pads on the substrate and enabling insertion of the largest die possible that can fit inside a given card interior boundary; (2) more efficiently stacks Flash memory dies to increase density of the Flash card; and (3) has a substantially less number of bonding wires to the substrate as possible, to improve production yield.

摘要翻译： 公开了一种闪存卡，其包括衬底，在衬底顶部的闪存存储器管芯，在闪存存储器管芯的顶部上的控制器管芯，以及与控制器管芯连接并且在闪存管芯的顶部上的插入器，其中， 插入器导致大大减少了与基板的引线接合。 插入器可以围绕或与控制器管芯并排放置。 根据本发明的系统和方法实现了以下目的：（1）尽可能地利用尽可能大的闪存存储器管芯，通过减少衬底上的引线接合焊盘的数量来增加闪存卡的密度 并且能够插入可以装配在给定卡内部边界内的最大的模具; （2）更有效地堆叠闪存芯片以增加闪存卡的密度; 和（3）尽可能少的与基板的接合线数量，以提高产量。

公开(公告)号：US08040749B2

公开(公告)日：2011-10-18

申请号：US12824754

申请日：2010-06-28

申请人： Ben Wei Chen ,  David Hong-Dien Chen ,  David Sun

发明人： Ben Wei Chen ,  David Hong-Dien Chen ,  David Sun

IPC分类号： G11C5/14

CPC分类号： G11C16/30 ,  G11C16/20

摘要： A Flash memory controller is disclosed. The Flash memory controller comprises a host interface, a Flash memory interface, controller logic coupled between the host interface, the controller logic handling a plurality of voltages. The controller also includes a mechanism for allowing a multiple voltage host to interface with a high voltage or a multiple voltage Flash memory. A multiple voltage Flash memory controller in accordance with the present invention provides the following advantages over conventional Flash memory controllers: (1) a voltage host is allowed to interface with multiple Flash memory components that operate at different voltages in any combination; (2) power consumption efficiency is improved by integrating the programmable voltage regulator, and voltage comparator mechanism with the Flash memory controller; (3) External jumper selection is eliminated for power source configuration; and (4) Flash memory controller power source interface pin-outs are simplified.

摘要翻译： 公开了一种闪存控制器。 闪存控制器包括主机接口，闪存接口，耦合在主机接口之间的控制器逻辑，处理多个电压的控制器逻辑。 控制器还包括允许多电压主机与高电压或多电压闪存接口的机构。 根据本发明的多电压闪速存储器控制器提供了比传统闪存控制器以下的优点：（1）允许电压主机与在任何组合中以不同电压工作的多个闪存组件进行接口; （2）通过将可编程稳压器和电压比较器机构与闪存控制器集成来提高功耗效率; （3）电源配置消除外部跳线选择; 和（4）闪存控制器电源接口引脚简化。

公开(公告)号：US07411293B2

公开(公告)日：2008-08-12

申请号：US11452805

申请日：2006-06-14

申请人： Ben Wei Chen ,  David Hong-Dien Chen ,  Jason Jajen Chen

发明人： Ben Wei Chen ,  David Hong-Dien Chen ,  Jason Jajen Chen

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L25/18 ,  H01L23/5387 ,  H01L23/5388 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/05553 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49175 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06575 ,  H01L2225/06579 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/15173 ,  H01L2924/15192 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A Flash memory card is disclosed comprising a substrate, a Flash memory die on top of the substrate, a controller die on top of the Flash memory die, and an interposer coupled to with the controller die and on top of the Flash memory die wherein the interposer results in substantial reduced wire bonding to the substrate. The interposer can surround or be placed side by side with the controller die. A system and method in accordance with the present invention achieves the following objectives: (1) takes advantage of as large of a Flash memory die as possible, to increase the density of the Flash card by reducing the number of wire bond pads on the substrate and enabling insertion of the largest die possible that can fit inside a given card interior boundary; (2) more efficiently stacks Flash memory dies to increase density of the Flash card; and (3) has a substantially less number of bonding wires to the substrate as possible, to improve production yield.

摘要翻译： 公开了一种闪存卡，其包括衬底，在衬底顶部的闪存存储器管芯，在闪存存储器管芯的顶部上的控制器管芯，以及与控制器管芯连接并在闪存管芯的顶部上的插入器，其中， 插入器导致大大减少了与基板的引线接合。 插入器可以围绕或与控制器管芯并排放置。 根据本发明的系统和方法实现了以下目的：（1）尽可能地利用尽可能大的闪存存储器管芯，通过减少衬底上的引线接合焊盘的数量来增加闪存卡的密度 并且能够插入可以装配在给定卡内部边界内的最大的模具; （2）更有效地堆叠闪存芯片，增加闪存卡的密度; 和（3）尽可能少的与基板的接合线数量，以提高产量。

公开(公告)号：US07989268B2

公开(公告)日：2011-08-02

申请号：US12507771

申请日：2009-07-22

申请人： Ben Wei Chen ,  Jin S. Wang ,  David Hong-Dien Chen

发明人： Ben Wei Chen ,  Jin S. Wang ,  David Hong-Dien Chen

IPC分类号： H01L21/50 ,  H01L21/48 ,  H01L21/44 ,  H01L23/02 ,  H01L23/34 ,  H01L29/68

CPC分类号： B29C45/14647 ,  B29C45/14655 ,  B29C45/14836 ,  B29C45/2708 ,  H01L21/565 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K1/117 ,  H05K3/284 ,  H05K2201/10159 ,  H05K2201/10689 ,  H05K2201/10734 ,  H05K2203/1311 ,  H05K2203/1316 ,  H05K2203/304 ,  H01L2924/00014 ,  H01L2924/00

摘要： A shape-molding structure of a memory card comprises a circuit substrate, at least one chip, and an encapsulant covering. The upper and lower surfaces of the circuit substrate have a circuit layer and a plurality of electric contacts, respectively. The chip is located on the upper surface of the circuit substrate and electrically connected with the circuit layer. The encapsulant covering is formed by using a mold to press encapsulant entering at least one encapsulant inlet provided on at least one side surface of the circuit substrate. The encapsulant covering encapsulates all the above components with only the electric contacts exposed. A trace mark of the encapsulant inlet remaining on the encapsulant covering is then cut to obtain a shape-molding structure of memory card with an smooth and intact outer appearance.

摘要翻译： 存储卡的形状模制结构包括电路基板，至少一个芯片和密封剂覆盖物。 电路基板的上表面和下表面分别具有电路层和多个电触点。 芯片位于电路基板的上表面并与电路层电连接。 密封剂覆盖物通过使用模具来挤压进入设置在电路基板的至少一个侧表面上的至少一个密封剂入口的密封剂而形成。 密封剂覆盖物仅将电触头暴露在外，将所有上述组件封装起来。 然后切割保留在密封剂覆盖物上的密封剂入口的痕迹，以获得具有平滑和完整外观的存储卡的形状模制结构。

公开(公告)号：US20100268873A1

公开(公告)日：2010-10-21

申请号：US12824754

申请日：2010-06-28

申请人： Ben Wei Chen ,  David Hong-Dien Chen ,  David Sun

发明人： Ben Wei Chen ,  David Hong-Dien Chen ,  David Sun

IPC分类号： G06F12/02

CPC分类号： G11C16/30 ,  G11C16/20

摘要： A Flash memory controller is disclosed. The Flash memory controller comprises a host interface, a Flash memory interface, controller logic coupled between the host interface, the controller logic handling a plurality of voltages. The controller also includes a mechanism for allowing a multiple voltage host to interface with a high voltage or a multiple voltage Flash memory. A multiple voltage Flash memory controller in accordance with the present invention provides the following advantages over conventional Flash memory controllers: (1) a voltage host is allowed to interface with multiple Flash memory components that operate at different voltages in any combination; (2) power consumption efficiency is improved by integrating the programmable voltage regulator, and voltage comparator mechanism with the Flash memory controller; (3) External jumper selection is eliminated for power source configuration; and (4) Flash memory controller power source interface pin-outs are simplified.

摘要翻译： 公开了一种闪存控制器。 闪存控制器包括主机接口，闪存接口，耦合在主机接口之间的控制器逻辑，处理多个电压的控制器逻辑。 控制器还包括允许多电压主机与高电压或多电压闪存接口的机构。 根据本发明的多电压闪速存储器控制器提供了比传统闪存控制器以下的优点：（1）允许电压主机与在任何组合中以不同电压工作的多个闪存组件进行接口; （2）通过将可编程稳压器和电压比较器机构与闪存控制器集成来提高功耗效率; （3）电源配置消除外部跳线选择; 和（4）闪存控制器电源接口引脚简化。

公开(公告)号：US07760574B2

公开(公告)日：2010-07-20

申请号：US11937451

申请日：2007-11-08

申请人： Ben Wei Chen ,  David Hong-Dien Chen ,  David Sun

发明人： Ben Wei Chen ,  David Hong-Dien Chen ,  David Sun

IPC分类号： G11C5/14

CPC分类号： G11C16/30 ,  G11C16/20

摘要： A Flash memory controller is disclosed. The Flash memory controller comprises a host interface, a Flash memory interface, controller logic coupled between the host interface the controller logic handling a plurality of voltages. The controller also includes a mechanism for allowing a multiple voltage host to interface with a high voltage or a multiple voltage Flash memory. A multiple voltage Flash memory controller in accordance with the present invention provides the following advantages over conventional Flash memory controllers: (1) a voltage host is allowed to interface with multiple Flash memory components that operate at different voltages in any combination; (2) power consumption efficiency is improved by integrating the programmable voltage regulator, and voltage comparator mechanism with the Flash memory controller; (3) External jumper selection is eliminated for power source configuration; and (4) Flash memory controller power source interface pin-outs are simplified.

摘要翻译： 公开了一种闪存控制器。 闪存控制器包括主机接口，闪存接口，耦合在主机接口之间的控制器逻辑，控制器逻辑处理多个电压。 控制器还包括允许多电压主机与高电压或多电压闪存接口的机构。 根据本发明的多电压闪速存储器控制器提供了比传统闪存控制器以下的优点：（1）允许电压主机与在任何组合中以不同电压工作的多个闪存组件进行接口; （2）通过将可编程稳压器和电压比较器机构与闪存控制器集成来提高功耗效率; （3）电源配置消除外部跳线选择; 和（4）闪存控制器电源接口引脚简化。

公开(公告)号：US08097957B2

公开(公告)日：2012-01-17

申请号：US12702207

申请日：2010-02-08

申请人： Ben Wei Chen ,  David Hong-Dien Chen ,  Jason Jajen Chen

发明人： Ben Wei Chen ,  David Hong-Dien Chen ,  Jason Jajen Chen

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L25/18 ,  H01L23/5387 ,  H01L23/5388 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/05553 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49175 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06575 ,  H01L2225/06579 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/15173 ,  H01L2924/15192 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A Flash memory card is disclosed comprising a substrate, a Flash memory die on top of the substrate, a controller die on top of the Flash memory die, and an interposer coupled to with the controller die and on top of the Flash memory die wherein the interposer results in substantial reduced wire bonding to the substrate. The interposer can surround or be placed side by side with the controller die. A system and method in accordance with the present invention achieves the following objectives: (1) takes advantage of as large of a Flash memory die as possible, to increase the density of the Flash card by reducing the number of wire bond pads on the substrate and enabling insertion of the largest die possible that can fit inside a given card interior boundary; (2) more efficiently stacks Flash memory dies to increase density of the Flash card; and (3) has a substantially less number of bonding wires to the substrate as possible, to improve production yield.

摘要翻译： 公开了一种闪存卡，其包括衬底，在衬底顶部的闪存存储器管芯，在闪存存储器管芯的顶部上的控制器管芯，以及与控制器管芯连接并在闪存管芯的顶部上的插入器，其中， 插入器导致大大减少了与基板的引线接合。 插入器可以围绕或与控制器管芯并排放置。 根据本发明的系统和方法实现了以下目的：（1）尽可能地利用尽可能大的闪存存储器管芯，通过减少衬底上的引线接合焊盘的数量来增加闪存卡的密度 并且能够插入可以装配在给定卡内部边界内的最大的模具; （2）更有效地堆叠闪存芯片，增加闪存卡的密度; 和（3）尽可能少的与基板的接合线数量，以提高产量。

公开(公告)号：US07601563B2

公开(公告)日：2009-10-13

申请号：US11624615

申请日：2007-01-18

申请人： Ben Wei Chen ,  Jin S. Wang ,  David Hong-Dien Chen

发明人： Ben Wei Chen ,  Jin S. Wang ,  David Hong-Dien Chen

IPC分类号： H01L21/50 ,  H01L21/48 ,  H01L21/44 ,  H01L23/02 ,  H01L23/34 ,  H01L29/68

CPC分类号： B29C45/14647 ,  B29C45/14655 ,  B29C45/14836 ,  B29C45/2708 ,  H01L21/565 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K1/117 ,  H05K3/284 ,  H05K2201/10159 ,  H05K2201/10689 ,  H05K2201/10734 ,  H05K2203/1311 ,  H05K2203/1316 ,  H05K2203/304 ,  H01L2924/00014 ,  H01L2924/00

摘要： A shape-molding structure of a memory card comprises a circuit substrate, at least one chip, and an encapsulant covering. The upper and lower surfaces of the circuit substrate have a circuit layer and a plurality of electric contacts, respectively. The chip is located on the upper surface of the circuit substrate and electrically connected with the circuit layer. The encapsulant covering is formed by using a mold to press encapsulant entering at least one encapsulant inlet provided on at least one side surface of the circuit substrate. The encapsulant covering encapsulates all the above components with only the electric contacts exposed. A trace mark of the encapsulant inlet remaining on the encapsulant covering is then cut to obtain a shape-molding structure of memory card with an smooth and intact outer appearance.

摘要翻译： 存储卡的形状模制结构包括电路基板，至少一个芯片和密封剂覆盖物。 电路基板的上表面和下表面分别具有电路层和多个电触点。 芯片位于电路基板的上表面并与电路层电连接。 密封剂覆盖物通过使用模具来挤压进入设置在电路基板的至少一个侧表面上的至少一个密封剂入口的密封剂而形成。 密封剂覆盖物仅将电触头暴露在外，将所有上述组件封装起来。 然后切割保留在密封剂覆盖物上的密封剂入口的痕迹，以获得具有平滑和完整外观的存储卡的形状模制结构。

公开(公告)号：US07864615B2

公开(公告)日：2011-01-04

申请号：US11067095

申请日：2005-02-25

申请人： Ben Wei Chen ,  David Hong-Dien Chen ,  David Sun

发明人： Ben Wei Chen ,  David Hong-Dien Chen ,  David Sun

IPC分类号： G11C5/14

CPC分类号： G11C16/30 ,  G11C16/20

摘要： A Flash memory controller includes a host interface, a Flash memory interface, controller logic coupled between the host interface, the controller logic handling a plurality of voltages. The controller also includes a mechanism for allowing a multiple voltage host to interface with a high voltage or multiple voltage Flash memory. A multiple voltage Flash memory controller in accordance with the present invention provides the following advantages over conventional Flash memory controllers: (1) a voltage host is allowed to interface with multiple Flash memory components that operate at different voltages in any combination; (2) power consumption efficiency is improved by integrating the programmable voltage regulator, and voltage comparator mechanism with the Flash memory controller; (3) External jumper selection is eliminated for power source configuration; and (4) Flash memory controller power source interface pin-outs are simplified.

摘要翻译： 闪存控制器包括主机接口，闪存接口，耦合在主机接口之间的控制器逻辑，处理多个电压的控制器逻辑。 控制器还包括允许多电压主机与高电压或多电压闪存接口的机构。 根据本发明的多电压闪速存储器控制器提供了比传统闪存控制器以下的优点：（1）允许电压主机与在任何组合中以不同电压工作的多个闪存组件进行接口; （2）通过将可编程稳压器和电压比较器机构与闪存控制器集成来提高功耗效率; （3）电源配置消除外部跳线选择; 和（4）闪存控制器电源接口引脚简化。

公开(公告)号：US07411292B2

公开(公告)日：2008-08-12

申请号：US11237283

申请日：2005-09-27

申请人： Ben Wei Chen ,  Wei Koh ,  David Hong-Dien Chen

发明人： Ben Wei Chen ,  Wei Koh ,  David Hong-Dien Chen

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L25/0657 ,  H01L23/5388 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06575 ,  H01L2225/06579 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/15173 ,  H01L2924/15192 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： A memory card comprising a substrate, a memory die on top of the memory die, a controller die on top of the memory die; and a interposer surrounding the controller die and on top of the memory die wherein the interposer allows for wire bonding to the substrate to be minimized. A system and method in accordance with the present invention achieves the following objectives: (1) increase the density of the Flash card by reducing the number of wire bond pads on the substrate and enabling insertion of the largest die possible that can fit inside a given card interior boundary; (2) more efficiently stacks Flash memory dies when stacking is necessary, to increase density of the Flash card; (3) has only a few necessary signal I/O bonding wires to the substrate to improve production yield.

摘要翻译： 一种存储卡，包括基板，位于存储芯片顶部的存储器管芯，位于存储器管芯顶部的控制器管芯; 以及围绕所述控制器管芯并且在所述存储器管芯的顶部上的插入器，其中所述插入器允许将引线键合到所述衬底以被最小化。 根据本发明的系统和方法实现了以下目的：（1）通过减少衬底上的引线接合焊盘的数量来增加闪存卡的密度，并且能够插入可以适合于给定的 卡片内部边界; （2）更有效地堆叠闪存存储器模块，当堆叠是必要的，以增加闪存卡的密度; （3）只有少量必要的信号I / O键合到基片上以提高产量。