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公开(公告)号：US08344924B2
公开(公告)日：2013-01-01
申请号：US13095188
申请日：2011-04-27
IPC分类号： H03M1/12
CPC分类号： G06J1/00
摘要： An approach to converting an analog value based on a partition of an input range produces probabilities that the input is found within each of the regions based, for example, on a noisy version of the input. In some examples, iterative and/or pipelined application of comparison circuitry is used to accumulate a set of analog representations of the output probabilities. The circuitry can be adapted or configured according to the characteristics of the degradation (e.g., according to the variance of an additive noise) and/or prior information about the distribution of the clean input (e.g., a distribution over a discrete set of exemplar values, uniformly distributed etc.).
摘要翻译： 基于输入范围的分区来转换模拟值的方法产生在例如基于输入的噪声版本的情况下在每个区域内发现输入的概率。 在一些示例中，使用比较电路的迭代和/或流水线应用来累积输出概率的一组模拟表示。 电路可以根据劣化的特性进行调整或配置（例如，根据加性噪声的变化）和/或关于干净输入分布的先前信息（例如，在离散的一组样本值上的分布 ，均匀分布等）。
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公开(公告)号：US09036420B2
公开(公告)日：2015-05-19
申请号：US13471816
申请日：2012-05-15
申请人： Benjamin Vigoda , Jeffrey Bernstein , Jeffrey Venuti , Alexander Alexeyev , Eric Nestler , David Reynolds , William Bradley , Vladimir Zlatkovic
发明人： Benjamin Vigoda , Jeffrey Bernstein , Jeffrey Venuti , Alexander Alexeyev , Eric Nestler , David Reynolds , William Bradley , Vladimir Zlatkovic
CPC分类号： G11C7/00 , G11C7/1006 , G11C7/16 , G11C11/24 , G11C11/5642 , G11C16/04 , G11C27/005 , G11C29/00
摘要： A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
摘要翻译： 存储装置包括具有一组存储元件的存储阵列。 每个存储元件可以写入一组离散的物理状态。 读取电路选择一个或多个存储元件，并为每个选定的存储元件生成表示所选存储元件的物理状态的模拟信号。 信号处理电路处理模拟信号以产生多个输出，其中每个输出表示所选择的存储元件与离散的物理状态集合中的一个或多个的不同子集的关联程度。
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公开(公告)号：US08792602B2
公开(公告)日：2014-07-29
申请号：US13032520
申请日：2011-02-22
CPC分类号： H03M13/6597 , H03M13/1111
摘要： A processor implements a network of functional nodes and communication paths between the nodes. The processor includes a plurality of circuit implementations of the functional nodes of the processor; and a plurality of signal paths implementing the communication paths linking the circuit implementations of the nodes. At least some of the signal paths are configured to pass signal values represented according to temporal patterns of signal levels on the signal paths. The processor also includes a plurality of circuit components for conversion between a signal value represented as a signal level (e.g., voltage or current level) and a signal value represented as a temporal pattern.
摘要翻译： 处理器实现节点之间的功能节点和通信路径的网络。 处理器包括处理器的功能节点的多个电路实现; 以及实现链接节点的电路实现的通信路径的多个信号路径。 至少一些信号路径被配置为传递根据信号路径上的信号电平的时间模式表示的信号值。 处理器还包括用于在表示为信号电平（例如，电压或电流电平）的信号值和表示为时间模式的信号值之间进行转换的多个电路部件。
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公开(公告)号：US20130094298A1
公开(公告)日：2013-04-18
申请号：US13471816
申请日：2012-05-15
申请人： Benjamin Vigoda , Eric Nestler , Jeffrey Bernstein , David Reynolds , Alexander Alexeyev , Jeffrey Venuti , William Bradley , Vladimir Ziatkovic
发明人： Benjamin Vigoda , Eric Nestler , Jeffrey Bernstein , David Reynolds , Alexander Alexeyev , Jeffrey Venuti , William Bradley , Vladimir Ziatkovic
CPC分类号： G11C7/00 , G11C7/1006 , G11C7/16 , G11C11/24 , G11C11/5642 , G11C16/04 , G11C27/005 , G11C29/00
摘要： A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
摘要翻译： 存储装置包括具有一组存储元件的存储阵列。 每个存储元件可以写入一组离散的物理状态。 读取电路选择一个或多个存储元件，并为每个选定的存储元件生成表示所选存储元件的物理状态的模拟信号。 信号处理电路处理模拟信号以产生多个输出，其中每个输出表示所选择的存储元件与离散的物理状态集合中的一个或多个的不同子集的关联程度。
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公开(公告)号：US20100246289A1
公开(公告)日：2010-09-30
申请号：US12537081
申请日：2009-08-06
IPC分类号： G11C7/00
CPC分类号： G11C7/00 , G11C7/1006 , G11C7/16 , G11C11/24 , G11C11/5642 , G11C16/04 , G11C27/005 , G11C29/00
摘要： A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
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公开(公告)号：US08179731B2
公开(公告)日：2012-05-15
申请号：US12537045
申请日：2009-08-06
申请人： Benjamin Vigoda , Eric Nestler , Jeffrey Bernstein , David Reynolds , Alexander Alexeyev , Jeffrey Venuti , William Bradley , Vladimir Zlatkovic
发明人： Benjamin Vigoda , Eric Nestler , Jeffrey Bernstein , David Reynolds , Alexander Alexeyev , Jeffrey Venuti , William Bradley , Vladimir Zlatkovic
IPC分类号： G11C7/00
CPC分类号： G11C7/00 , G11C7/1006 , G11C7/16 , G11C11/24 , G11C11/5642 , G11C16/04 , G11C27/005 , G11C29/00
摘要： A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
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公开(公告)号：US08107306B2
公开(公告)日：2012-01-31
申请号：US12537081
申请日：2009-08-06
申请人： Benjamin Vigoda , Eric Nestler , Jeffrey Bernstein , David Reynolds , Alexander Alexeyev , Jeffrey Venuti , William Bradley , Vladimir Zlatkovic
发明人： Benjamin Vigoda , Eric Nestler , Jeffrey Bernstein , David Reynolds , Alexander Alexeyev , Jeffrey Venuti , William Bradley , Vladimir Zlatkovic
IPC分类号： G11C7/00
CPC分类号： G11C7/00 , G11C7/1006 , G11C7/16 , G11C11/24 , G11C11/5642 , G11C16/04 , G11C27/005 , G11C29/00
摘要： A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
摘要翻译： 存储装置包括具有一组存储元件的存储阵列。 每个存储元件可以写入一组离散的物理状态。 读取电路选择一个或多个存储元件，并为每个选定的存储元件生成表示所选存储元件的物理状态的模拟信号。 信号处理电路处理模拟信号以产生多个输出，其中每个输出表示所选择的存储元件与离散的物理状态集合中的一个或多个的不同子集的关联程度。
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公开(公告)号：US20110255612A1
公开(公告)日：2011-10-20
申请号：US13032520
申请日：2011-02-22
IPC分类号： H04L27/00
CPC分类号： H03M13/6597 , H03M13/1111
摘要： A processor implements a network of functional nodes and communication paths between the nodes. The processor includes a plurality of circuit implementations of the functional nodes of the processor; and a plurality of signal paths implementing the communication paths linking the circuit implementations of the nodes. At least some of the signal paths are configured to pass signal values represented according to temporal patterns of signal levels on the signal paths. The processor also includes a plurality of circuit components for conversion between a signal value represented as a signal level (e.g., voltage or current level) and a signal value represented as a temporal pattern.
摘要翻译： 处理器实现节点之间的功能节点和通信路径的网络。 处理器包括处理器的功能节点的多个电路实现; 以及实现链接节点的电路实现的通信路径的多个信号路径。 至少一些信号路径被配置为传递根据信号路径上的信号电平的时间模式表示的信号值。 处理器还包括用于在表示为信号电平（例如，电压或电流电平）的信号值和表示为时间模式的信号值之间进行转换的多个电路部件。
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公开(公告)号：US20100246287A1
公开(公告)日：2010-09-30
申请号：US12537045
申请日：2009-08-06
CPC分类号： G11C7/00 , G11C7/1006 , G11C7/16 , G11C11/24 , G11C11/5642 , G11C16/04 , G11C27/005 , G11C29/00
摘要： A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
摘要翻译： 存储装置包括具有一组存储元件的存储阵列。 每个存储元件可以写入一组离散的物理状态。 读取电路选择一个或多个存储元件，并为每个选定的存储元件生成表示所选存储元件的物理状态的模拟信号。 信号处理电路处理模拟信号以产生多个输出，其中每个输出表示所选择的存储元件与离散的物理状态集合中的一个或多个的不同子集的关联程度。
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公开(公告)号：US08572144B2
公开(公告)日：2013-10-29
申请号：US12716113
申请日：2010-03-02
摘要： A circuit includes a signal processing circuit for accepting an input and for generating a set of outputs. The input is provided in an input range that has a set of representative values, and each output represents a measure of an association of the input with one or more of the representative values. The signal processing circuit includes a group of output sections, each output section being responsive to the input of the signal processing circuit. Each output section includes one or more sigmoid generators. Each sigmoid generator is responsive to an input of the output section to generate an output that represents a sigmoid function of the input of the output section. Each output section also includes a circuitry for combining the outputs of the one or more sigmoid generators to form one of the set of outputs of the signal processing circuit. An input transformation circuit is coupled to the plurality of output sections. The input transformation circuit is configurable to transform the input of the signal processing circuit for controlling a mapping characteristic from the input to the set of outputs.
摘要翻译： 电路包括用于接受输入并产生一组输出的信号处理电路。 在具有一组代表值的输入范围中提供输入，并且每个输出表示输入与一个或多个代表值的关联度量。 信号处理电路包括一组输出部分，每个输出部分响应信号处理电路的输入。 每个输出部分包括一个或多个S形发生器。 每个S形发生器响应于输出部分的输入以产生表示输出部分的输入的S形功能的输出。 每个输出部分还包括用于组合一个或多个S形发生器的输出以形成信号处理电路的一组输出的电路。 输入变换电路耦合到多个输出部分。 输入变换电路可配置为变换信号处理电路的输入，用于控制从输入到输出组的映射特性。
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