Dual layer patterning scheme to make dual damascene
    1.
    发明授权
    Dual layer patterning scheme to make dual damascene 失效
    双层图案方案制作双镶嵌

    公开(公告)号:US07078348B1

    公开(公告)日:2006-07-18

    申请号:US09893188

    申请日:2001-06-27

    IPC分类号: H01L21/302 H01L21/3065

    摘要: One aspect of the present invention relates to a method for making a dual damascene pattern in an insulative layer in a single etch process involving providing a wafer having at least one insulative layer formed thereon; depositing a first photoresist layer over the at least one insulative layer; patterning a first image into the first photoresist layer; curing the first patterned photoresist layer; depositing a second photoresist layer over the first patterned photoresist layer; patterning a second image into the second photoresist layer; and etching the at least one insulative layer through the first patterned photoresist layer and the second patterned photoresist layer simultaneously in the single etch process.

    摘要翻译: 本发明的一个方面涉及在单一蚀刻工艺中在绝缘层中制造双镶嵌图案的方法,该方法包括提供其上形成有至少一个绝缘层的晶片; 在所述至少一个绝缘层上沉积第一光致抗蚀剂层; 将第一图像图案化成第一光致抗蚀剂层; 固化第一图案化光致抗蚀剂层; 在所述第一图案化光致抗蚀剂层上沉积第二光致抗蚀剂层; 将第二图像图案化成第二光致抗蚀剂层; 以及在单次蚀刻工艺中同时蚀刻通过第一图案化光致抗蚀剂层和第二图案化光致抗蚀剂层的至少一个绝缘层。

    Use of surface coupling agent to improve adhesion
    2.
    发明授权
    Use of surface coupling agent to improve adhesion 有权
    使用表面偶联剂改善附着力

    公开(公告)号:US06746822B1

    公开(公告)日:2004-06-08

    申请号:US10050484

    申请日:2002-01-16

    IPC分类号: G03F720

    摘要: Disclosed are methods of processing a semiconductor structure, involving the steps of depositing a light-degradable surface coupling agent on a semiconductor substrate; depositing a resist over the light-degradable surface coupling agent; irradiating portions of the resist, wherein the light-degradable surface coupling agent under the irradiated portions of the resist at least partially decomposes; and developing the resist.

    摘要翻译: 公开了处理半导体结构的方法,包括在半导体衬底上沉积可光降解的表面偶联剂的步骤; 在光可降解表面偶联剂上沉积抗蚀剂; 照射抗蚀剂的部分,其中抗蚀剂照射部分下的可光降解表面偶联剂至少部分分解; 并开发抗蚀剂。

    Active control of developer time and temperature
    3.
    发明授权
    Active control of developer time and temperature 失效
    主动控制显影时间和温度

    公开(公告)号:US06629786B1

    公开(公告)日:2003-10-07

    申请号:US09845232

    申请日:2001-04-30

    IPC分类号: G03D500

    CPC分类号: G03D5/00

    摘要: A system for regulating the time and temperature of a development process is provided. The system includes one or more light sources, each light source directing light to one or more gratings being developed on a wafer. Light reflected from the gratings is collected by a measuring system, which processes the collected light. Light passing through the gratings may similarly be collected by the measuring system, which processes the collected light. The collected light is indicative of the progress of development of the respective portions of the wafer. The measuring system provides progress of development related data to a processor that determines the progress of development of the respective portions of the wafer. The system also includes a plurality of heating devices, each heating device corresponds to a respective portion of the developer and provides for the heating thereof. The processor selectively controls the heating devices so as to regulate temperature of the respective portions of the wafer.

    摘要翻译: 提供了一种用于调节开发过程的时间和温度的系统。 该系统包括一个或多个光源,每个光源将光引导到在晶片上显影的一个或多个光栅。 从光栅反射的光被测量系统收集,该系统处理收集的光。 通过光栅的光可以类似地由处理所收集的光的测量系统收集。 所收集的光表示晶片的各个部分的显影进展。 该测量系统提供开发相关数据的进展到处理器,该处理器确定晶片的相应部分的开发进度。 该系统还包括多个加热装置,每个加热装置对应于显影剂的相应部分并提供其加热。 处理器选择性地控制加热装置,以调节晶片各部分的温度。

    Scattered signal collection using strobed technique
    4.
    发明授权
    Scattered signal collection using strobed technique 有权
    使用频闪技术分散信号采集

    公开(公告)号:US06556303B1

    公开(公告)日:2003-04-29

    申请号:US09902366

    申请日:2001-07-10

    IPC分类号: G01B1114

    摘要: The present invention is directed to a system and a method for controlling a thin film formation on a moving substrate as part of a process for manufacturing an integrated circuit. The invention involves the use of scatterometry to control the thin film formation process by analyzing the thin film on the moving substrate in a periodic manner. A registration feature associated with the moving substrate can be utilized in conjunction with a signaling system to determine a position of the moving substrate, whereby a repeatable analysis of a corresponding location on the moving substrate can be performed. Scatterometry permits in-situ measurements of thin film formation progress, whereby thin film formation process conditions can be controlled in a feedback loop to obtain a targeted result. Scatterometry can also be facilitated by providing a grating pattern on a non-production portion of the substrate.

    摘要翻译: 本发明涉及一种用于控制移动衬底上的薄膜形成的系统和方法,作为用于制造集成电路的工艺的一部分。 本发明涉及使用散射法来以周期性方式分析移动基片上的薄膜来控制薄膜形成过程。 与移动基板相关联的配准特征可以与信号系统结合使用,以确定移动基板的位置,由此可以执行移动基板上对应位置的可重复分析。 散射测量允许原位测量薄膜形成进程,由此可以在反馈回路中控制薄膜形成工艺条件以获得目标结果。 也可以通过在基板的非生产部分上提供光栅图案来促进散射测量。

    Use of RTA furnace for photoresist baking
    6.
    发明授权
    Use of RTA furnace for photoresist baking 有权
    使用RTA炉进行光刻胶烘烤

    公开(公告)号:US06335152B1

    公开(公告)日:2002-01-01

    申请号:US09564408

    申请日:2000-05-01

    IPC分类号: G03F738

    CPC分类号: G03F7/38

    摘要: In one embodiment, the present invention relates to a method of processing an irradiated photoresist involving the steps of placing a substrate having the irradiated photoresist thereon at a first temperature in a rapid thermal anneal furnace; heating the substrate having the irradiated photoresist thereon to a second temperature within about 0.1 seconds to about 10 seconds; cooling the substrate having the irradiated photoresist thereon to a third temperature in a rapid thermal annealing furnace within about 0.1 seconds to about 10 seconds; and developing the irradiated photoresist, wherein the second temperature is higher than the first temperature and the third temperature. In another embodiment, the present invention relates to a system of processing a photoresist, containing a source of actinic radiation and a mask for selectively irradiating a photoresist; a rapid thermal annealing furnace for rapidly heating and rapidly cooling a selectively irradiated photoresist, wherein the rapid heating and rapid cooling are independently conducted within about 0.1 seconds to about 10 seconds; and a developer for developing a rapid thermal annealing furnace heated and selectively irradiated photoresist into a patterned photoresist.

    摘要翻译: 在一个实施方案中,本发明涉及一种处理被照射的光致抗蚀剂的方法,包括以下步骤:在快速热退火炉中将具有照射光致抗蚀剂的基底在第一温度下放置; 将其上具有照射的光致抗蚀剂的基板加热至约0.1秒至约10秒的第二温度; 将快速热退火炉中具有照射光致抗蚀剂的基板冷却至约0.1秒至约10秒的第三温度; 并且显影所述被照射的光致抗蚀剂,其中所述第二温度高于所述第一温度和所述第三温度。 在另一个实施方案中,本发明涉及一种处理含有光化辐射源的光致抗蚀剂的系统和用于选择性地照射光致抗蚀剂的掩模; 快速热退火炉,用于快速加热和快速冷却选择性照射的光致抗蚀剂,其中快速加热和快速冷却在约0.1秒至约10秒内独立进行; 以及用于将快速热退火炉加热并选择性地照射光致抗蚀剂的显影剂加工成图案化的光致抗蚀剂。

    Active control of temperature in scanning probe lithography and maskless lithograpy
    8.
    发明授权
    Active control of temperature in scanning probe lithography and maskless lithograpy 有权
    扫描探针光刻和无掩模光刻中主动控制温度

    公开(公告)号:US06238830B1

    公开(公告)日:2001-05-29

    申请号:US09429994

    申请日:1999-10-29

    IPC分类号: G03F900

    摘要: A system for monitoring and regulating a photoresist temperature in a maskless lithography pattern transfer process is disclosed. The system includes a photoresist layer overlying a substrate and a material associated with the photoresist layer, wherein the material exhibits a transformation over variations in temperature. The system also includes a detection system for detecting the transformation in the material and a processor operatively coupled to the detection system. The processor receives information associated with the detected transformation and uses the information to control a tool being used for the pattern transfer, thereby reducing variations in temperature in the resist during pattern transfer. In addition, a method of monitoring and regulating a photoresist temperature in a maskless lithography pattern transfer process is disclosed. The method includes associating a material having a characteristic which varies over variations in temperature with a photoresist layer which overlies a substrate and detecting the characteristic during the pattern transfer process. Once detected a temperature of a portion of the photoresist layer is determined using the detected characteristic and an operation of a writing tool which performs the pattern transfer process in response to the photoresist layer temperature is controlled in response thereto.

    摘要翻译: 公开了一种用于在无掩模光刻图案转印工艺中监测和调节光刻胶温度的系统。 该系统包括覆盖衬底的光致抗蚀剂层和与光致抗蚀剂层相关联的材料,其中材料表现出与温度变化的转变。 该系统还包括用于检测材料中的变换的检测系统和可操作地耦合到检测系统的处理器。 处理器接收与检测到的变换相关联的信息,并使用该信息来控制用于图案转印的工具,由此减少图案转印期间抗蚀剂的温度变化。 此外,公开了一种在无掩模光刻图案转印工艺中监测和调节光刻胶温度的方法。 该方法包括将具有随温度变化变化的特性的材料与覆盖在衬底上的光致抗蚀剂层相关联,并且在图案转移过程期间检测特性。 一旦检测到,使用检测到的特性确定光刻胶层的一部分的温度,并响应于光致抗蚀剂层温度来控制执行图案转印处理的写入工具的操作。

    Interlayer dielectric void detection
    9.
    发明授权
    Interlayer dielectric void detection 失效
    层间电介质空隙检测

    公开(公告)号:US06774989B1

    公开(公告)日:2004-08-10

    申请号:US10050453

    申请日:2002-01-16

    IPC分类号: G01N2100

    CPC分类号: G01N21/956 G01N21/47

    摘要: A system for detecting voids in an ILD layer is provided. The system includes one or more light sources, each light source directing light to respective portions of the ILD layer. Light reflected from the respective portions is collected by a measuring system that processes the collected light. The collected light is indicative of the presence of voids in the respective portions of the ILD layer. The measuring system provides ILD layer void related data to a processor that determines whether voids exist in the respective portions of the ILD layer. The processor selectively marks the ILD layer portions to facilitate further processing and/or destruction of the IC with the ILD layer voids.

    摘要翻译: 提供一种用于检测ILD层中的空隙的系统。 该系统包括一个或多个光源,每个光源将光引导到ILD层的相应部分。 通过处理收集的光的测量系统收集从各个部分反射的光。 收集的光指示在ILD层的各个部分中存在空隙。 测量系统向处理器提供ILD层空隙相关数据,该处理器确定在ILD层的相应部分中是否存在空隙。 处理器选择性地标记ILD层部分以促进具有ILD层空隙的IC的进一步处理和/或破坏。