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公开(公告)号：US08698541B2
公开(公告)日：2014-04-15
申请号：US13029469
申请日：2011-02-17
申请人： Bo-Ting Chen , Guang-Cheng Wang
发明人： Bo-Ting Chen , Guang-Cheng Wang
IPC分类号： H03L5/00
CPC分类号： H03K19/018521
摘要： A threshold voltage detection apparatus comprises a voltage level up-shifter and a voltage level down-shifter. The threshold voltage detection apparatus is placed at a circuit fabricated in a low voltage semiconductor process. The threshold voltage detection apparatus receives an input signal having a wide range and generates output signals comprising the logic of the input signal, but having a voltage range suitable for the low voltage circuit. The threshold voltage detection apparatus ensures that the low voltage circuit operates in a range to which the low voltage semiconductor process is specified.
摘要翻译： 阈值电压检测装置包括电压升高移位器和电压电平降档器。 阈值电压检测装置放置在以低电压半导体工艺制造的电路上。 阈值电压检测装置接收宽范围的输入信号，并产生包括输入信号的逻辑但具有适于低电压电路的电压范围的输出信号。 阈值电压检测装置确保低电压电路在指定低电压半导体处理的范围内工作。
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公开(公告)号：US20120212279A1
公开(公告)日：2012-08-23
申请号：US13029469
申请日：2011-02-17
申请人： Bo-Ting Chen , Guang-Cheng Wang
发明人： Bo-Ting Chen , Guang-Cheng Wang
IPC分类号： H03L5/00
CPC分类号： H03K19/018521
摘要： A threshold voltage detection apparatus comprises a voltage level up-shifter and a voltage level down-shifter. The threshold voltage detection apparatus is placed at a circuit fabricated in a low voltage semiconductor process. The threshold voltage detection apparatus receives an input signal having a wide range and generates output signals comprising the logic of the input signal, but having a voltage range suitable for the low voltage circuit. The threshold voltage detection apparatus ensures that the low voltage circuit operates in a range to which the low voltage semiconductor process is specified.
摘要翻译： 阈值电压检测装置包括电压升高移位器和电压电平降档器。 阈值电压检测装置放置在以低电压半导体工艺制造的电路上。 阈值电压检测装置接收宽范围的输入信号，并产生包括输入信号的逻辑但具有适于低电压电路的电压范围的输出信号。 阈值电压检测装置确保低电压电路在指定低电压半导体处理的范围内工作。
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公开(公告)号：US20130050885A1
公开(公告)日：2013-02-28
申请号：US13217533
申请日：2011-08-25
申请人： Bo-Ting Chen , Tzu-Heng Chang
发明人： Bo-Ting Chen , Tzu-Heng Chang
IPC分类号： H02H9/04
摘要： Some embodiments relate to an electrostatic discharge (ESD) protection device to protect a circuit that is electrically connected to first and second circuit nodes from an ESD event. The ESD protection device includes a first electrical path extending between the first and second circuit nodes and including first and second ESD detection elements arranged thereon. The ESD protection device also includes first and second voltage bias elements having respective inputs electrically connected to respective outputs of the first and second ESD detection elements. A second electrical path extends between the first and second circuit nodes and is in parallel with the first electrical path. The second electrical path includes a voltage controlled shunt network having at least two control terminals electrically connected to respective outputs of the first and second voltage bias elements. Other embodiments are also disclosed.
摘要翻译： 一些实施例涉及用于保护电连接到第一和第二电路节点的电路与ESD事件的静电放电（ESD）保护装置。 ESD保护装置包括在第一和第二电路节点之间延伸并且包括布置在其上的第一和第二ESD检测元件的第一电路径。 ESD保护装置还包括具有电连接到第一和第二ESD检测元件的相应输出的相应输入的第一和第二电压偏置元件。 第二电路在第一和第二电路节点之间延伸并与第一电路平行。 第二电路包括电压控制并联网络，其具有电连接到第一和第二电压偏置元件的相应输出的至少两个控制端子。 还公开了其他实施例。
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公开(公告)号：US07411430B2
公开(公告)日：2008-08-12
申请号：US11306813
申请日：2006-01-12
IPC分类号： H03K3/00
CPC分类号： G09G3/3685 , G09G3/20 , G09G2310/0291 , G09G2310/08 , G09G2320/02
摘要： An analog output buffer circuit for a flat panel display is provided for improving an output signal distortion. The circuit includes a transistor, a current source, an input capacitor, an upper switch, a lower switch, a first switch, a second switch and a third switch. In which, the transistor and the current source are electrically connected in series between a first power supply and a second power supply. The current source provides a compensatory current for the transistor when a leakage current occurs. The upper switch and the first switch are turned on during the first period, and the lower switch and the second switch are turn on during the second period, in which the second period is after the first period. Those switches eliminate the drawback of different voltage levels between the input signal and the output signal obtained from the output buffer circuit inputted by the input signal.
摘要翻译： 提供了一种用于平板显示器的模拟输出缓冲电路，用于改善输出信号失真。 电路包括晶体管，电流源，输入电容器，上开关，下开关，第一开关，第二开关和第三开关。 其中，晶体管和电流源串联电连接在第一电源和第二电源之间。 当发生漏电流时，电流源为晶体管提供补偿电流。 上部开关和第一开关在第一时段期间导通，并且下部开关和第二开关在第二时段期间接通，其中第二周期在第一周期之后。 这些开关消除了输入信号和从输入信号输入的输出缓冲电路获得的输出信号之间的不同电压电平的缺点。
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公开(公告)号：US20070159442A1
公开(公告)日：2007-07-12
申请号：US11306813
申请日：2006-01-12
IPC分类号： G09G3/36
CPC分类号： G09G3/3685 , G09G3/20 , G09G2310/0291 , G09G2310/08 , G09G2320/02
摘要： An analog output buffer circuit for a flat panel display is provided for improving an output signal distortion. The circuit includes a transistor, a current source, an input capacitor, an upper switch, a lower switch, a first switch, a second switch and a third switch. In which, the transistor and the current source are electrically connected in series between a first power supply and a second power supply. The current source provides a compensatory current for the transistor when a leakage current occurs. The upper switch and the first switch are turned on during the first period, and the lower switch and the second switch are turn on during the second period, in which the second period is after the first period. Those switches eliminate the drawback of different voltage levels between the input signal and the output signal obtained from the output buffer circuit inputted by the input signal.
摘要翻译： 提供了一种用于平板显示器的模拟输出缓冲电路，用于改善输出信号失真。 电路包括晶体管，电流源，输入电容器，上开关，下开关，第一开关，第二开关和第三开关。 其中，晶体管和电流源串联电连接在第一电源和第二电源之间。 当发生漏电流时，电流源为晶体管提供补偿电流。 上部开关和第一开关在第一时段期间导通，并且下部开关和第二开关在第二时段期间接通，其中第二周期在第一周期之后。 这些开关消除了输入信号与从输入信号输入的输出缓冲电路获得的输出信号之间的不同电压电平的缺点。
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公开(公告)号：US09069924B2
公开(公告)日：2015-06-30
申请号：US13339410
申请日：2011-12-29
申请人： Bo-Ting Chen
发明人： Bo-Ting Chen
CPC分类号： H01L27/0296 , G06F17/5068 , G06F2217/12 , H01L23/50 , H01L27/0248 , H01L27/0255 , H01L27/0266 , H01L2924/0002 , Y02P90/265 , H01L2924/00
摘要： A protection cell for a cell library. The protection cell defines a protection circuit for an IC having a driving device with a first supply voltage Vdd1 and an output, and a driven device having an input and a second supply voltage Vdd2. The protection circuit includes a first device from the group consisting of a P-diode and a gate-Vdd PMOS. The first device is coupled between a first power bus connected to Vdd2 and the input of the driven device. The input of the driven device is coupled by way of a resistor to the output of the driving device. A second device corresponding to the first device is provided, from the group consisting of an N-diode and a grounded gate NMOS. The second device is coupled between the input of the driven device and a ground bus.
摘要翻译： 用于细胞库的保护细胞。 保护单元为具有第一电源电压Vdd1和输出的驱动装置的IC以及具有输入和第二电源电压Vdd2的从动装置定义了保护电路。 保护电路包括由P二极管和栅极-Vdd PMOS构成的组的第一器件。 第一设备耦合在连接到Vdd2的第一电源总线和从动设备的输入之间。 被驱动装置的输入通过电阻器耦合到驱动装置的输出。 从由N二极管和接地栅极NMOS组成的组中提供对应于第一器件的第二器件。 第二装置耦合在被驱动装置的输入端和接地总线之间。
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公开(公告)号：US08867183B2
公开(公告)日：2014-10-21
申请号：US13217533
申请日：2011-08-25
申请人： Bo-Ting Chen , Tzu-Heng Chang
发明人： Bo-Ting Chen , Tzu-Heng Chang
IPC分类号： H02H9/04
摘要： Some embodiments relate to an electrostatic discharge (ESD) protection device to protect a circuit that is electrically connected to first and second circuit nodes from an ESD event. The ESD protection device includes a first electrical path extending between the first and second circuit nodes and including first and second ESD detection elements arranged thereon. The ESD protection device also includes first and second voltage bias elements having respective inputs electrically connected to respective outputs of the first and second ESD detection elements. A second electrical path extends between the first and second circuit nodes and is in parallel with the first electrical path. The second electrical path includes a voltage controlled shunt network having at least two control terminals electrically connected to respective outputs of the first and second voltage bias elements. Other embodiments are also disclosed.
摘要翻译： 一些实施例涉及用于保护电连接到第一和第二电路节点的电路与ESD事件的静电放电（ESD）保护装置。 ESD保护装置包括在第一和第二电路节点之间延伸并且包括布置在其上的第一和第二ESD检测元件的第一电路径。 ESD保护装置还包括具有电连接到第一和第二ESD检测元件的相应输出的相应输入的第一和第二电压偏置元件。 第二电路在第一和第二电路节点之间延伸并与第一电路平行。 第二电路包括电压控制并联网络，其具有电连接到第一和第二电压偏置元件的相应输出的至少两个控制端子。 还公开了其他实施例。
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公开(公告)号：US20130139712A1
公开(公告)日：2013-06-06
申请号：US13484561
申请日：2012-05-31
申请人： Yeeu-Chang Lee , Tso-Hsiang Wu , Bo-Ting Chen
发明人： Yeeu-Chang Lee , Tso-Hsiang Wu , Bo-Ting Chen
IPC分类号： B41F3/02
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00
摘要： A roller-based imprinting system includes a roller module, a transmission module, a fixing module, a solidification module, and a controlling module. The roller-based imprinting system imprints and transfers a pattern located on the surface of a soft mold to the substrate through the pressing force of the roller.
摘要翻译： 辊式压印系统包括辊模块，传动模块，固定模块，凝固模块和控制模块。 辊式压印系统通过辊的压力将位于软模表面上的图案印刷并转印到基材上。
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公开(公告)号：US08405442B2
公开(公告)日：2013-03-26
申请号：US12872079
申请日：2010-08-31
申请人： Bo-Ting Chen
发明人： Bo-Ting Chen
IPC分类号： H03L5/00
CPC分类号： H03K19/017509 , H03K3/356113 , H03K19/20
摘要： An integrated circuit includes a level shifter configured to receive a first voltage signal that swings between a first voltage level and a second voltage level, outputting a second voltage signal that swings between the first voltage level and a third voltage level. The third voltage level is higher than the second voltage level. An inverter is coupled with the level shifter. The inverter can receive the second voltage, outputting a third voltage signal that swings between the third voltage level and a fourth voltage level. The fourth voltage level is lower than the third voltage level and higher than the first voltage level.
摘要翻译： 集成电路包括电平移位器，其被配置为接收在第一电压电平和第二电压电平之间摆动的第一电压信号，输出在第一电压电平和第三电压电平之间摆动的第二电压信号。 第三电压电平高于第二电压电平。 逆变器与电平转换器耦合。 逆变器可以接收第二电压，输出在第三电压电平和第四电压电平之间摆动的第三电压信号。 第四电压电平低于第三电压电平并高于第一电压电平。
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