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    Data Path Controller With Integrated Power Management to Manage Power Consumption of a Computing Device and its Components
    1.
    发明申请
    Data Path Controller With Integrated Power Management to Manage Power Consumption of a Computing Device and its Components 有权
    数据路径控制器，集成电源管理，用于管理计算设备及其组件的功耗

    公开(公告)号：US20090150689A1

    公开(公告)日：2009-06-11

    申请号：US12342865

    申请日：2008-12-23

    申请人： Brad W. Simeral ,  David C. Reed ,  Dmitry Vyshetsky ,  Roman Surgutchick ,  Robert William Chapman ,  Joshua Titus ,  Anand Srinivasan ,  Hari U. Krishnan

    发明人： Brad W. Simeral ,  David C. Reed ,  Dmitry Vyshetsky ,  Roman Surgutchick ,  Robert William Chapman ,  Joshua Titus ,  Anand Srinivasan ,  Hari U. Krishnan

    IPC分类号： G06F1/32

    CPC分类号： G06F1/28 ,  G06F1/3203 ,  G06F1/3287 ,  Y02D10/171

    摘要： A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component. It also includes a controller for adjusting operational characteristics of the component for modifying the power consumed by the component to comply with a performance profile, which generally specifies permissible power consumption levels for the component.

    摘要翻译： 公开了一种数据路径控制器，计算机设备，装置和方法，用于将电源管理功能集成到数据路径控制器中，以管理由处理器和外围设备消耗的功率。 通过在数据路径控制器内部嵌入电源管理，数据路径控制器可以有利地在现场修改其标准，使得其能够根据处理器和外围设备的变化来适应其功率管理动作。 此外，数据路径控制器包括功率管理接口，其提供用于监视和/或量化各种组件的功耗的功率监控端口。 在一个实施例中，数据路径控制器包括用于可选地监视组件的功率的功率监视接口。 它还包括用于调整部件的操作特性的控制器，用于修改部件消耗的功率以符合性能曲线，其通常指定部件的允许功率消耗水平。

    Data path controller with integrated power management to manage power consumption of a computing device and its components
    2.
    发明授权
    Data path controller with integrated power management to manage power consumption of a computing device and its components 有权
    具有集成电源管理功能的数据路径控制器，用于管理计算设备及其组件的功耗

    公开(公告)号：US07487371B2

    公开(公告)日：2009-02-03

    申请号：US11305816

    申请日：2005-12-16

    申请人： Brad W. Simeral ,  David G. Reed ,  Dmitry Vyshetsky ,  Roman Surgutchick ,  Robert William Chapman ,  Joshua Titus ,  Anand Srinivasan ,  Hari U. Krishnan

    发明人： Brad W. Simeral ,  David G. Reed ,  Dmitry Vyshetsky ,  Roman Surgutchick ,  Robert William Chapman ,  Joshua Titus ,  Anand Srinivasan ,  Hari U. Krishnan

    IPC分类号： G06F1/32

    CPC分类号： G06F1/28 ,  G06F1/3203 ,  G06F1/3287 ,  Y02D10/171

    摘要： A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component. It also includes a controller for adjusting operational characteristics of the component for modifying the power consumed by the component to comply with a performance profile, which generally specifies permissible power consumption levels for the component.

    摘要翻译： 公开了一种数据路径控制器，计算机设备，装置和方法，用于将电源管理功能集成到数据路径控制器中，以管理由处理器和外围设备消耗的功率。 通过在数据路径控制器内部嵌入电源管理，数据路径控制器可以有利地在现场修改其标准，使得其能够根据处理器和外围设备的变化来适应其功率管理动作。 此外，数据路径控制器包括功率管理接口，其提供用于监视和/或量化各种组件的功耗的功率监控端口。 在一个实施例中，数据路径控制器包括用于可选地监视组件的功率的功率监视接口。 它还包括用于调整部件的操作特性的控制器，用于修改部件消耗的功率以符合性能曲线，其通常指定部件的允许功率消耗水平。

    Data path controller with integrated power management to manage power consumption of a computing device and its components
    3.
    发明授权
    Data path controller with integrated power management to manage power consumption of a computing device and its components 有权
    具有集成电源管理功能的数据路径控制器，用于管理计算设备及其组件的功耗

    公开(公告)号：US08069355B2

    公开(公告)日：2011-11-29

    申请号：US12342865

    申请日：2008-12-23

    申请人： Brad W. Simeral ,  David G. Reed ,  Dmitry Vyshetsky ,  Roman Surgutchik ,  Robert William Chapman ,  Joshua Titus ,  Anand Srinivasan ,  Hari U. Krishnan

    发明人： Brad W. Simeral ,  David G. Reed ,  Dmitry Vyshetsky ,  Roman Surgutchik ,  Robert William Chapman ,  Joshua Titus ,  Anand Srinivasan ,  Hari U. Krishnan

    IPC分类号： G06F1/32

    CPC分类号： G06F1/28 ,  G06F1/3203 ,  G06F1/3287 ,  Y02D10/171

    摘要： A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component. It also includes a controller for adjusting operational characteristics of the component for modifying the power consumed by the component to comply with a performance profile, which generally specifies permissible power consumption levels for the component.

    摘要翻译： 公开了一种数据路径控制器，计算机设备，装置和方法，用于将电源管理功能集成到数据路径控制器中，以管理由处理器和外围设备消耗的功率。 通过在数据路径控制器内部嵌入电源管理，数据路径控制器可以有利地在现场修改其标准，使得其能够根据处理器和外围设备的变化来适应其功率管理动作。 此外，数据路径控制器包括功率管理接口，其提供用于监视和/或量化各种组件的功耗的功率监控端口。 在一个实施例中，数据路径控制器包括用于可选地监视组件的功率的功率监视接口。 它还包括用于调整部件的操作特性的控制器，用于修改部件消耗的功率以符合性能曲线，其通常指定部件的允许功率消耗水平。

    Apparatus, system, and method for fast read request transfer through clock domains
    5.
    发明授权
    Apparatus, system, and method for fast read request transfer through clock domains 有权
    用于通过时钟域传输快速读请求的装置，系统和方法

    公开(公告)号：US07966468B1

    公开(公告)日：2011-06-21

    申请号：US11012034

    申请日：2004-12-13

    申请人： Brad W. Simeral ,  Roman Surgutchik ,  Joshua Titus ,  Anand Srinivasan ,  Edward M. Veeser ,  James P. Reilley

    发明人： Brad W. Simeral ,  Roman Surgutchik ,  Joshua Titus ,  Anand Srinivasan ,  Edward M. Veeser ,  James P. Reilley

    IPC分类号： G06F1/00 ,  G06F1/12 ,  G06F13/42

    CPC分类号： G06F5/06 ,  G06F13/405

    摘要： A speculative transfer mechanism transfers a source synchronous read request from a first clock domain to a second clock domain. The address portion having address information is transferred to the second clock domain in response to detecting a source synchronous address strobe latching signal. A pointer is generated in response to detecting the address strobe latching signal and passed into the second clock domain. In one embodiment, a pointer is retimed to be stable for a timing window for which a crossover of the address portion may be performed in the second clock domain. Request logic in the second clock domain generates a read command based on the address portion and the pointer.

    摘要翻译： 推测转移机制将源同步读请求从第一时钟域传送到第二时钟域。 响应于检测到源同步地址选通锁存信号，具有地址信息的地址部分被传送到第二时钟域。 响应于检测到地址选通锁存信号并且被传入第二时钟域而产生指针。 在一个实施例中，指针被重定时以对于可以在第二时钟域中执行地址部分的交叉的定时窗口来稳定。 第二时钟域中的请求逻辑基于地址部分和指针生成读命令。

    System, apparatus and method for performing look-ahead lookup on predictive information in a cache memory
    6.
    发明授权
    System, apparatus and method for performing look-ahead lookup on predictive information in a cache memory 有权
    用于对高速缓冲存储器中的预测信息进行预先查找的系统，装置和方法

    公开(公告)号：US07260686B2

    公开(公告)日：2007-08-21

    申请号：US10920995

    申请日：2004-08-17

    申请人： Ziyad S. Hakura ,  Radoslav Danilak ,  Brad W. Simeral ,  Brian Keith Langendorf ,  Stefano A. Pescador ,  Dmitry Vyshetsky

    发明人： Ziyad S. Hakura ,  Radoslav Danilak ,  Brad W. Simeral ,  Brian Keith Langendorf ,  Stefano A. Pescador ,  Dmitry Vyshetsky

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0862

    摘要： A system, apparatus, and method are disclosed for storing predictions as well as examining and using one or more caches for anticipating accesses to a memory. In one embodiment, an exemplary apparatus is a prefetcher for managing predictive accesses with a memory. The prefetcher can include a speculator to generate a range of predictions, and multiple caches. For example, the prefetcher can include a first cache and a second cache to store predictions. An entry of the first cache is addressable by a first representation of an address from the range of predictions, whereas an entry of the second cache is addressable by a second representation of the address. The first and the second representations are compared in parallel against the stored predictions of either the first cache and the second cache, or both.

    摘要翻译： 公开了用于存储预测以及检查和使用一个或多个高速缓存以预测对存储器的访问的系统，装置和方法。 在一个实施例中，示例性装置是用于管理具有存储器的预测访问的预取器。 预取器可以包括一个投机者来生成一系列预测，以及多个高速缓存。 例如，预取器可以包括第一缓存和第二高速缓存来存储预测。 第一高速缓存的条目可由来自预测范围的地址的第一表示来寻址，而第二高速缓存的条目可由地址的第二表示寻址。 将第一和第二表示与第一高速缓存和第二高速缓存或两者的存储的预测并行地进行比较。