公开(公告)号：US08069355B2

公开(公告)日：2011-11-29

申请号：US12342865

申请日：2008-12-23

申请人： Brad W. Simeral ,  David G. Reed ,  Dmitry Vyshetsky ,  Roman Surgutchik ,  Robert William Chapman ,  Joshua Titus ,  Anand Srinivasan ,  Hari U. Krishnan

发明人： Brad W. Simeral ,  David G. Reed ,  Dmitry Vyshetsky ,  Roman Surgutchik ,  Robert William Chapman ,  Joshua Titus ,  Anand Srinivasan ,  Hari U. Krishnan

IPC分类号： G06F1/32

CPC分类号： G06F1/28 ,  G06F1/3203 ,  G06F1/3287 ,  Y02D10/171

摘要： A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component. It also includes a controller for adjusting operational characteristics of the component for modifying the power consumed by the component to comply with a performance profile, which generally specifies permissible power consumption levels for the component.

摘要翻译： 公开了一种数据路径控制器，计算机设备，装置和方法，用于将电源管理功能集成到数据路径控制器中，以管理由处理器和外围设备消耗的功率。 通过在数据路径控制器内部嵌入电源管理，数据路径控制器可以有利地在现场修改其标准，使得其能够根据处理器和外围设备的变化来适应其功率管理动作。 此外，数据路径控制器包括功率管理接口，其提供用于监视和/或量化各种组件的功耗的功率监控端口。 在一个实施例中，数据路径控制器包括用于可选地监视组件的功率的功率监视接口。 它还包括用于调整部件的操作特性的控制器，用于修改部件消耗的功率以符合性能曲线，其通常指定部件的允许功率消耗水平。

公开(公告)号：US07487371B2

公开(公告)日：2009-02-03

申请号：US11305816

申请日：2005-12-16

申请人： Brad W. Simeral ,  David G. Reed ,  Dmitry Vyshetsky ,  Roman Surgutchick ,  Robert William Chapman ,  Joshua Titus ,  Anand Srinivasan ,  Hari U. Krishnan

发明人： Brad W. Simeral ,  David G. Reed ,  Dmitry Vyshetsky ,  Roman Surgutchick ,  Robert William Chapman ,  Joshua Titus ,  Anand Srinivasan ,  Hari U. Krishnan

IPC分类号： G06F1/32

CPC分类号： G06F1/28 ,  G06F1/3203 ,  G06F1/3287 ,  Y02D10/171

摘要： A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component. It also includes a controller for adjusting operational characteristics of the component for modifying the power consumed by the component to comply with a performance profile, which generally specifies permissible power consumption levels for the component.

摘要翻译： 公开了一种数据路径控制器，计算机设备，装置和方法，用于将电源管理功能集成到数据路径控制器中，以管理由处理器和外围设备消耗的功率。 通过在数据路径控制器内部嵌入电源管理，数据路径控制器可以有利地在现场修改其标准，使得其能够根据处理器和外围设备的变化来适应其功率管理动作。 此外，数据路径控制器包括功率管理接口，其提供用于监视和/或量化各种组件的功耗的功率监控端口。 在一个实施例中，数据路径控制器包括用于可选地监视组件的功率的功率监视接口。 它还包括用于调整部件的操作特性的控制器，用于修改部件消耗的功率以符合性能曲线，其通常指定部件的允许功率消耗水平。

公开(公告)号：US20090150689A1

公开(公告)日：2009-06-11

申请号：US12342865

申请日：2008-12-23

申请人： Brad W. Simeral ,  David C. Reed ,  Dmitry Vyshetsky ,  Roman Surgutchick ,  Robert William Chapman ,  Joshua Titus ,  Anand Srinivasan ,  Hari U. Krishnan

发明人： Brad W. Simeral ,  David C. Reed ,  Dmitry Vyshetsky ,  Roman Surgutchick ,  Robert William Chapman ,  Joshua Titus ,  Anand Srinivasan ,  Hari U. Krishnan

IPC分类号： G06F1/32

CPC分类号： G06F1/28 ,  G06F1/3203 ,  G06F1/3287 ,  Y02D10/171

摘要： A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component. It also includes a controller for adjusting operational characteristics of the component for modifying the power consumed by the component to comply with a performance profile, which generally specifies permissible power consumption levels for the component.

摘要翻译： 公开了一种数据路径控制器，计算机设备，装置和方法，用于将电源管理功能集成到数据路径控制器中，以管理由处理器和外围设备消耗的功率。 通过在数据路径控制器内部嵌入电源管理，数据路径控制器可以有利地在现场修改其标准，使得其能够根据处理器和外围设备的变化来适应其功率管理动作。 此外，数据路径控制器包括功率管理接口，其提供用于监视和/或量化各种组件的功耗的功率监控端口。 在一个实施例中，数据路径控制器包括用于可选地监视组件的功率的功率监视接口。 它还包括用于调整部件的操作特性的控制器，用于修改部件消耗的功率以符合性能曲线，其通常指定部件的允许功率消耗水平。

公开(公告)号：US07495985B1

公开(公告)日：2009-02-24

申请号：US10973519

申请日：2004-10-25

申请人： David G. Reed ,  Brad W. Simeral ,  Roman Surgutchik ,  Joshua Titus

发明人： David G. Reed ,  Brad W. Simeral ,  Roman Surgutchik ,  Joshua Titus

IPC分类号： G11C7/04

CPC分类号： G11C7/1051 ,  G11C7/04 ,  G11C7/1057 ,  G11C7/1078 ,  G11C7/109

摘要： Memory component temperature information is used to implement a method for ODT (on die termination) thermal load management. A respective temperature of a plurality of memory components are accessed, and based on this temperature, an ODT cycle is directed to a first of the memory components to avoid imposing a thermal load from the ODT cycle on a second of the memory components.

公开(公告)号：US07966468B1

公开(公告)日：2011-06-21

申请号：US11012034

申请日：2004-12-13

申请人： Brad W. Simeral ,  Roman Surgutchik ,  Joshua Titus ,  Anand Srinivasan ,  Edward M. Veeser ,  James P. Reilley

发明人： Brad W. Simeral ,  Roman Surgutchik ,  Joshua Titus ,  Anand Srinivasan ,  Edward M. Veeser ,  James P. Reilley

IPC分类号： G06F1/00 ,  G06F1/12 ,  G06F13/42

CPC分类号： G06F5/06 ,  G06F13/405

摘要： A speculative transfer mechanism transfers a source synchronous read request from a first clock domain to a second clock domain. The address portion having address information is transferred to the second clock domain in response to detecting a source synchronous address strobe latching signal. A pointer is generated in response to detecting the address strobe latching signal and passed into the second clock domain. In one embodiment, a pointer is retimed to be stable for a timing window for which a crossover of the address portion may be performed in the second clock domain. Request logic in the second clock domain generates a read command based on the address portion and the pointer.

摘要翻译： 推测转移机制将源同步读请求从第一时钟域传送到第二时钟域。 响应于检测到源同步地址选通锁存信号，具有地址信息的地址部分被传送到第二时钟域。 响应于检测到地址选通锁存信号并且被传入第二时钟域而产生指针。 在一个实施例中，指针被重定时以对于可以在第二时钟域中执行地址部分的交叉的定时窗口来稳定。 第二时钟域中的请求逻辑基于地址部分和指针生成读命令。

公开(公告)号：US07813204B2

公开(公告)日：2010-10-12

申请号：US12005968

申请日：2007-12-28

申请人： David G. Reed ,  Brad W. Simeral ,  Roman Surgutchik ,  Joshua Titus

发明人： David G. Reed ,  Brad W. Simeral ,  Roman Surgutchik ,  Joshua Titus

IPC分类号： G11C7/04

CPC分类号： G11C7/1051 ,  G11C7/04 ,  G11C7/1057 ,  G11C7/1078 ,  G11C7/109

摘要： Memory component temperature information is used to implement a method for ODT (on die termination) thermal load management. A respective temperature of a plurality of memory components are accessed, and based on this temperature, an ODT cycle is directed to a first of the memory components to avoid imposing a thermal load from the ODT cycle on a second of the memory components.

摘要翻译： 内存组件温度信息用于实现用于ODT（终端）热负载管理的方法。 访问多个存储器组件的相应温度，并且基于该温度，ODT周期针对第一存储器组件以避免在第二存储器组件上施加来自ODT周期的热负载。

公开(公告)号：US07191088B1

公开(公告)日：2007-03-13

申请号：US10973333

申请日：2004-10-25

申请人： David G. Reed ,  Brad W. Simeral ,  Roman Surgutchik ,  Joshua Titus

发明人： David G. Reed ,  Brad W. Simeral ,  Roman Surgutchik ,  Joshua Titus

IPC分类号： G01K1/00 ,  G01K3/00 ,  G01K5/00 ,  G01K7/00 ,  G01K9/00

CPC分类号： G01K7/425

摘要： A method and system for memory temperature measurement. The method includes the step of monitoring a plurality of accesses to a memory component. A number of accesses occurring to the memory component over a time period is determined. A temperature of the memory component is determined based on the number of accesses occurring over the time period.

摘要翻译： 一种用于存储器温度测量的方法和系统。 该方法包括监视对存储器组件的多个访问的步骤。 确定在一段时间内发生到存储器组件的多个访问。 基于在该时间段内发生的访问次数来确定存储器组件的温度。

公开(公告)号：US07849342B2

公开(公告)日：2010-12-07

申请号：US11743099

申请日：2007-05-01

申请人： Roman Surgutchik ,  Robert William Chapman ,  David G. Reed ,  Brad W. Simeral

发明人： Roman Surgutchik ,  Robert William Chapman ,  David G. Reed ,  Brad W. Simeral

IPC分类号： G06F1/00 ,  G06F1/26

CPC分类号： G06F1/3203 ,  G06F1/3275 ,  G06F13/161 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D50/20

摘要： A method and system for implementing a generalized system stutter are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of blocking a first request received from a first of a plurality of bus masters during a low power state of a computing device for as long as permissible by the timing requirements of the computing device, wherein the first request is capable of triggering the computing device to transition out of the low power state, and during an active state of the computing device, servicing the first request along with other pending requests from the rest of the plurality of bus masters before the computing device transitions back to the low power state.

摘要翻译： 公开了一种用于实现广义系统口吃的方法和系统。 具体地，本发明的一个实施例提出了一种方法，其包括以下步骤：在计算设备的低功率状态期间阻止从多个总线主机中的第一个接收的第一请求，只要可以通过定时要求 其中所述第一请求能够触发所述计算设备转换出所述低功率状态，并且在所述计算设备的活动状态期间，对所述第一请求以及来自所述多个其余的其余部分的其他未决请求进行服务 在计算设备转换回低功率状态之前的总线主控器。

公开(公告)号：US20090083506A1

公开(公告)日：2009-03-26

申请号：US12005968

申请日：2007-12-28

申请人： David G. Reed ,  Brad W. Simeral ,  Roman Surgutchik ,  Joshua Titus

发明人： David G. Reed ,  Brad W. Simeral ,  Roman Surgutchik ,  Joshua Titus

IPC分类号： G06F12/16 ,  G11C99/00

CPC分类号： G11C7/1051 ,  G11C7/04 ,  G11C7/1057 ,  G11C7/1078 ,  G11C7/109

摘要： Memory component temperature information is used to implement a method for ODT (on die termination) thermal load management. A respective temperature of a plurality of memory components are accessed, and based on this temperature, an ODT cycle is directed to a first of the memory components to avoid imposing a thermal load from the ODT cycle on a second of the memory components.

摘要翻译： 内存组件温度信息用于实现用于ODT（终端）热负载管理的方法。 访问多个存储器组件的相应温度，并且基于该温度，ODT周期针对第一存储器组件以避免在第二存储器组件上施加来自ODT周期的热负载。

公开(公告)号：US20080276108A1

公开(公告)日：2008-11-06

申请号：US11743099

申请日：2007-05-01

申请人： Roman Surgutchik ,  Robert William Chapman ,  David G. Reed ,  Brad W. Simeral

发明人： Roman Surgutchik ,  Robert William Chapman ,  David G. Reed ,  Brad W. Simeral

IPC分类号： G06F1/00

CPC分类号： G06F1/3203 ,  G06F1/3275 ,  G06F13/161 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D50/20

摘要： A method and system for implementing a generalized system stutter are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of blocking a first request received from a first of a plurality of bus masters during a low power state of a computing device for as long as permissible by the timing requirements of the computing device, wherein the first request is capable of triggering the computing device to transition out of the low power state, and during an active state of the computing device, servicing the first request along with other pending requests from the rest of the plurality of bus masters before the computing device transitions back to the low power state.

摘要翻译： 公开了一种用于实现广义系统口吃的方法和系统。 具体地，本发明的一个实施例提出了一种方法，其包括以下步骤：在计算设备的低功率状态期间阻止从多个总线主机中的第一个接收的第一请求，只要可以通过定时要求 其中所述第一请求能够触发所述计算设备转换出所述低功率状态，并且在所述计算设备的活动状态期间，对所述第一请求以及来自所述多个其余的其余部分的其他未决请求进行服务 在计算设备转换回低功率状态之前的总线主控器。