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    SEMICONDUCTOR TRANSISTORS WITH EXPANDED TOP PORTIONS OF GATES
    1.
    发明申请
    SEMICONDUCTOR TRANSISTORS WITH EXPANDED TOP PORTIONS OF GATES 有权
    具有膨胀的顶部顶部的半导体晶体管

    公开(公告)号：US20070158763A1

    公开(公告)日：2007-07-12

    申请号：US11275514

    申请日：2006-01-11

    申请人： Brent Anderson ,  Victor Chan ,  Edward Nowak

    发明人： Brent Anderson ,  Victor Chan ,  Edward Nowak

    IPC分类号： H01L29/76 ,  H01L21/3205

    CPC分类号： H01L29/66477 ,  H01L21/26506 ,  H01L21/28052 ,  H01L21/28114 ,  H01L21/28518 ,  H01L29/1083 ,  H01L29/42376 ,  H01L29/66507 ,  H01L29/6659 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78654

    摘要： A semiconductor transistor with an expanded top portion of a gate and a method for forming the same. The semiconductor transistor with an expanded top portion of a gate includes (a) a semiconductor region which includes a channel region and first and second source/drain regions; the channel region is disposed between the first and second source/drain regions, (b) a gate dielectric region in direct physical contact with the channel region, and (c) a gate electrode region which includes a top portion and a bottom portion. The bottom portion is in direct physical contact with the gate dielectric region. A first width of the top portion is greater than a second width of the bottom portion. The gate electrode region is electrically insulated from the channel region by the gate dielectric region.

    摘要翻译： 具有扩大的栅极顶部的半导体晶体管及其形成方法。 具有扩大的栅极顶部的半导体晶体管包括：（a）包括沟道区和第一和第二源极/漏极区的半导体区; 沟道区域设置在第一和第二源极/漏极区域之间，（b）与沟道区域直接物理接触的栅极电介质区域，以及（c）包括顶部和底部的栅电极区域。 底部部分与栅介质区域直接物理接触。 顶部的第一宽度大于底部的第二宽度。 栅电极区域通过栅极电介质区域与沟道区域电绝缘。

    DUAL TRENCH ISOLATION FOR CMOS WITH HYBRID ORIENTATIONS
    3.
    发明申请
    DUAL TRENCH ISOLATION FOR CMOS WITH HYBRID ORIENTATIONS 有权
    CMOS混合方向的双路隔离

    公开(公告)号：US20120104511A1

    公开(公告)日：2012-05-03

    申请号：US13349203

    申请日：2012-01-12

    申请人： Victor Chan ,  Meikei Ieong ,  Rajesh Rengarajan ,  Alexander Reznicek ,  Chun-yung Sung ,  Min Yang

    发明人： Victor Chan ,  Meikei Ieong ,  Rajesh Rengarajan ,  Alexander Reznicek ,  Chun-yung Sung ,  Min Yang

    IPC分类号： H01L27/092

    CPC分类号： H01L21/76229

    摘要： The present invention provides a semiconductor structure in which different types of devices are located upon a specific crystal orientation of a hybrid substrate that enhances the performance of each type of device. In the semiconductor structure of the present invention, a dual trench isolation scheme is employed whereby a first trench isolation region of a first depth isolates devices of different polarity from each other, while second trench isolation regions of a second depth, which is shallower than the first depth, are used to isolate devices of the same polarity from each other. The present invention further provides a dual trench semiconductor structure in which pFETs are located on a (110) crystallographic plane, while nFETs are located on a (100) crystallographic plane. In accordance with the present invention, the devices of different polarity, i.e., nFETs and pFETs, are bulk-like devices.

    摘要翻译： 本发明提供了一种半导体结构，其中不同类型的器件位于混合衬底的特定晶体取向上，这增强了每种器件的性能。 在本发明的半导体结构中，采用双沟槽隔离方案，由此第一深度的第一沟槽隔离区将彼此不同极性的器件隔离，而第二深度的第二沟槽隔离区比第 第一深度用于隔离相同极性的设备。 本发明还提供一种双沟槽半导体结构，其中pFET位于（110）结晶平面上，而nFET位于（100）晶面上。 根据本发明，不同极性的器件，即nFET和pFETs是大块状器件。

    Database schema for content managed data
    5.
    发明授权
    Database schema for content managed data 有权
    内容管理数据的数据库模式

    公开(公告)号：US07505993B2

    公开(公告)日：2009-03-17

    申请号：US11304015

    申请日：2005-12-14

    申请人： Victor Chan ,  Darl Andrew Crick ,  Miu-To Brenda Lam ,  Wan Ngai Wayne Lee ,  Jacob Vandergoot ,  Tony Chung Keung Woo

    发明人： Victor Chan ,  Darl Andrew Crick ,  Miu-To Brenda Lam ,  Wan Ngai Wayne Lee ,  Jacob Vandergoot ,  Tony Chung Keung Woo

    IPC分类号： G06F7/00 ,  G06F17/00

    CPC分类号： G06F17/30595 ,  Y10S707/99943 ,  Y10S707/99944

    摘要： Embodiments of the present invention is directed to a data structure in conformance with a database schema for accessing and managing content managed data and to a system, a method and a computer program product for creating the database schema. According to one embodiment of the invention, a method for creating a database schema for accessing and managing content managed data comprising the steps of: creating a base schema; creating a write schema; and creating a read schema; the database schema used by a business logic application to access and manipulate the content managed data in the database. Embodiment of the present invention manages changes to the data using the write schema and the read schema rather than by using a modified base schema.

    摘要翻译： 本发明的实施例涉及一种符合用于访问和管理内容管理数据的数据库模式的数据结构以及用于创建数据库模式的系统，方法和计算机程序产品。 根据本发明的一个实施例，一种用于创建用于访问和管理内容管理数据的数据库模式的方法，包括以下步骤：创建基本模式; 创建一个写入模式; 并创建一个读模式; 业务逻辑应用程序使用的数据库模式来访问和操纵数据库中的内容管理数据。 本发明的实施例使用写模式和读模式管理对数据的改变，而不是使用经修改的基本模式。

    DUAL TRENCH ISOLATION FOR CMOS WITH HYBRID ORIENTATIONS
    6.
    发明申请
    DUAL TRENCH ISOLATION FOR CMOS WITH HYBRID ORIENTATIONS 有权
    CMOS混合方向的双路隔离

    公开(公告)号：US20080290379A1

    公开(公告)日：2008-11-27

    申请号：US12169991

    申请日：2008-07-09

    申请人： Victor Chan ,  Meikei Ieong ,  Rajesh Rengarajan ,  Alexander Reznicek ,  Chun-yung Sung ,  Min Yang

    发明人： Victor Chan ,  Meikei Ieong ,  Rajesh Rengarajan ,  Alexander Reznicek ,  Chun-yung Sung ,  Min Yang

    IPC分类号： H01L21/8234 ,  H01L29/04

    CPC分类号： H01L21/76229

    摘要： The present invention provides a semiconductor structure in which different types of devices are located upon a specific crystal orientation of a hybrid substrate that enhances the performance of each type of device. In the semiconductor structure of the present invention, a dual trench isolation scheme is employed whereby a first trench isolation region of a first depth isolates devices of different polarity from each other, while second trench isolation regions of a second depth, which is shallower than the first depth, are used to isolate devices of the same polarity from each other. The present invention further provides a dual trench semiconductor structure in which pFETs are located on a (110) crystallographic plane, while nFETs are located on a (100) crystallographic plane. In accordance with the present invention, the devices of different polarity, i.e., nFETs and pFETs, are bulk-like devices.

    摘要翻译： 本发明提供了一种半导体结构，其中不同类型的器件位于混合衬底的特定晶体取向上，这增强了每种器件的性能。 在本发明的半导体结构中，采用双沟槽隔离方案，由此第一深度的第一沟槽隔离区将彼此不同极性的器件隔离，而第二深度的第二沟槽隔离区比第 第一深度用于隔离相同极性的设备。 本发明还提供一种双沟槽半导体结构，其中pFET位于（110）结晶平面上，而nFET位于（100）晶面上。 根据本发明，不同极性的器件，即nFET和pFETs是大块状器件。

    INTEGRATED CIRCUIT SYSTEM EMPLOYING STRESS-ENGINEERED SPACERS
    7.
    发明申请
    INTEGRATED CIRCUIT SYSTEM EMPLOYING STRESS-ENGINEERED SPACERS 有权
    集成电路系统应用于工程应用的空间

    公开(公告)号：US20080173934A1

    公开(公告)日：2008-07-24

    申请号：US12048994

    申请日：2008-03-14

    申请人： Jae Gon Lee ,  Jong Ho Yang ,  Victor Chan ,  Jun Jung Kim

    发明人： Jae Gon Lee ,  Jong Ho Yang ,  Victor Chan ,  Jun Jung Kim

    IPC分类号： H01L27/092

    CPC分类号： H01L29/7833 ,  H01L21/823807 ,  H01L21/823864 ,  H01L27/0629 ,  H01L27/092 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7843 ,  H01L29/7848

    摘要： An integrated circuit system that includes: providing a substrate including a first region with a first device and a second device and a second region with a resistance device; configuring the first device, the second device, and the resistance device to include a first spacer and a second spacer; forming a stress inducing layer over the first region and the second region; processing at least a portion of the stress inducing layer formed over the first region to alter the stress within the stress inducing layer; and forming a third spacer adjacent the second spacer of the first device and the second device from the stress inducing layer.

    摘要翻译： 一种集成电路系统，包括：提供包括具有第一装置的第一区域的基板和具有电阻装置的第二区域; 配置第一装置，第二装置和电阻装置以包括第一间隔件和第二间隔件; 在所述第一区域和所述第二区域上形成应力诱导层; 处理形成在第一区域上的应力诱导层的至少一部分，以改变应力诱导层内的应力; 以及从所述应力诱导层形成邻近所述第一器件和所述第二器件的第二间隔物的第三间隔物。

    Method and system for composing a query for a database and traversing the database
    8.
    发明授权
    Method and system for composing a query for a database and traversing the database 有权
    用于组合数据库查询并遍历数据库的方法和系统

    公开(公告)号：US07401095B2

    公开(公告)日：2008-07-15

    申请号：US11246341

    申请日：2005-10-07

    申请人： Victor Chan ,  Fen Wang ,  Mark W. Hubbard

    发明人： Victor Chan ,  Fen Wang ,  Mark W. Hubbard

    IPC分类号： G06F17/00

    CPC分类号： G06F17/30433 ,  G06F17/30477 ,  Y10S706/922 ,  Y10S707/99933 ,  Y10S707/99934 ,  Y10S707/99935 ,  Y10S707/99936 ,  Y10S707/99943 ,  Y10S707/99945

    摘要： A system and method of composing a query object for application against a database is provided. The method composes a selection clause for the query. Next, a criteria clause for the query is generated, with the criteria clause comprising input criteria related to the query, additional criteria specified against the query, and generated criteria based on a joint relationship. Next a source clause utilizing elements in the database accessed by the query is generated. A database traversal system and method is provided. The method identifies all tables directly accessible by each table and creates a data structure comprising an entry for each table. The entry comprises an identification field for each table and a link field identifying all tables directly accessible by each table. The data structure is traversed and an optimum path of the traversal paths utilizing data obtained from traversing the data structure is identified.

    摘要翻译： 提供了一种组合用于数据库应用的查询对象的系统和方法。 该方法为查询组成一个选择子句。 接下来，生成查询的条件子句，其中条件子句包括与查询相关的输入条件，针对查询指定的附加条件以及基于联合关系生成的条件。 接下来，生成一个使用查询访问的数据库中的元素的源子句。 提供了数据库遍历系统和方法。 该方法识别每个表可以直接访问的所有表，并创建一个包含每个表的条目的数据结构。 条目包括每个表的标识字段和标识由每个表可直接访问的所有表的链接字段。 遍历数据结构，并且识别遍历数据结构获得的数据的遍历路径的最佳路径。

    Business context sensitive attribute override
    10.
    发明申请
    Business context sensitive attribute override 审中-公开
    业务上下文敏感属性覆盖

    公开(公告)号：US20070174098A1

    公开(公告)日：2007-07-26

    申请号：US11336249

    申请日：2006-01-20

    申请人： Lev Mirtas ,  Victor Chan ,  Aalim Lakhani

    发明人： Lev Mirtas ,  Victor Chan ,  Aalim Lakhani

    IPC分类号： G06F17/50

    CPC分类号： G06Q10/06 ,  G06Q20/108

    摘要： A context sensitive object attribute override method includes retrieving an object attribute responsive to a request for the object attribute in a transaction in a commerce system, determining whether a context for the transaction is associated with an overridden form of the object attribute, and overriding the object attribute with the overridden form if the context for the transaction is associated with the overridden form of the object attribute.

    摘要翻译： 上下文敏感对象属性覆盖方法包括响应于在商务系统中的事务中的对象属性的请求来检索对象属性，确定事务的上下文是否与对象属性的重写形式相关联，并且覆盖对象 如果事务的上下文与对象属性的覆盖形式相关联，则使用重写形式的属性。