公开(公告)号：US07541225B2

公开(公告)日：2009-06-02

申请号：US11332076

申请日：2006-01-13

申请人： Bum-Ki Baek ,  Hyuk-Jin Kim

发明人： Bum-Ki Baek ,  Hyuk-Jin Kim

IPC分类号： H01L21/84

CPC分类号： H01L27/1288 ,  H01L27/1214

摘要： A method of manufacturing a thin film transistor array panel is provided, the method including forming a thin film transistor having a gate electrode, a source electrode, and a drain electrode on a substrate, forming a passivation layer on the source electrode and the drain electrode, forming a photoresist film on the passivation layer, selectively etching the passivation layer using the photoresist film as a mask, forming a conductive film, and removing the photoresist film along with the conductive film disposed on the photoresist film using a CMP (chemical mechanical polishing) process to form a pixel electrode being connected to the drain electrode.

摘要翻译： 提供一种制造薄膜晶体管阵列面板的方法，该方法包括在衬底上形成具有栅电极，源电极和漏电极的薄膜晶体管，在源电极和漏电极上形成钝化层 在钝化层上形成光致抗蚀剂膜，使用光致抗蚀剂膜作为掩模选择性地蚀刻钝化层，形成导电膜，以及使用CMP（化学机械抛光）与设置在光致抗蚀剂膜上的导电膜一起除去光致抗蚀剂膜 ）处理以形成连接到漏电极的像素电极。

公开(公告)号：US20060194376A1

公开(公告)日：2006-08-31

申请号：US11332076

申请日：2006-01-13

申请人： Bum-Ki Baek ,  Hyuk-Jin Kim

发明人： Bum-Ki Baek ,  Hyuk-Jin Kim

IPC分类号： H01L21/84 ,  H01L31/113

CPC分类号： H01L27/1288 ,  H01L27/1214

摘要： A method of manufacturing a thin film transistor array panel is provided, the method including forming a thin film transistor having a gate electrode, a source electrode, and a drain electrode on a substrate, forming a passivation layer on the source electrode and the drain electrode, forming a photoresist film on the passivation layer, selectively etching the passivation layer using the photoresist film as a mask, forming a conductive film, and removing the photoresist film along with the conductive film disposed on the photoresist film using a CMP (chemical mechanical polishing) process to form a pixel electrode being connected to the drain electrode.

摘要翻译： 提供一种制造薄膜晶体管阵列面板的方法，该方法包括在衬底上形成具有栅电极，源电极和漏电极的薄膜晶体管，在源电极和漏电极上形成钝化层 在钝化层上形成光致抗蚀剂膜，使用光致抗蚀剂膜作为掩模选择性地蚀刻钝化层，形成导电膜，以及使用CMP（化学机械抛光）与设置在光致抗蚀剂膜上的导电膜一起除去光致抗蚀剂膜 ）处理以形成连接到漏电极的像素电极。

公开(公告)号：US20090167733A1

公开(公告)日：2009-07-02

申请号：US12332213

申请日：2008-12-10

申请人： Bong-Jun Lee ,  Byeong-Jae Ahn ,  Yeo-Geon Yoon ,  Hong-Woo Lee ,  Hyuk-Jin Kim ,  Jong-Oh Kim ,  Gyu-Tae Kim

发明人： Bong-Jun Lee ,  Byeong-Jae Ahn ,  Yeo-Geon Yoon ,  Hong-Woo Lee ,  Hyuk-Jin Kim ,  Jong-Oh Kim ,  Gyu-Tae Kim

IPC分类号： G09G5/00

CPC分类号： H01L27/124 ,  H01L27/1288

摘要： A display substrate includes a base substrate, a first line, a second line, a bridge line, a thin-film transistor (TFT), a storage line, and a pixel electrode. The first line extends in a first direction on the base substrate. The second line extends in a second direction on the base substrate and is divided into two portions with respect to the first line. The bridge line makes contact with the two portions of the second line in first and second bridge contact regions. The TFT includes a source electrode making contact with one of the first and second lines in a data contact region. The storage line is formed on the one of the first and second lines. The pixel electrode is formed on the storage line and is electrically connected to the TFT. The display substrate reduces formation of parasitic capacitance between pixel electrode and data line.

摘要翻译： 显示基板包括基底基板，第一线，第二线，桥接线，薄膜晶体管（TFT），存储线和像素电极。 第一线在基底基板上沿第一方向延伸。 第二线在基底基板上沿第二方向延伸，并且相对于第一线分成两部分。 桥接线与第一和第二桥接触区域中的第二线路的两个部分接触。 TFT包括与数据接触区域中的第一和第二线路之一接触的源电极。 存储线形成在第一和第二线之一上。 像素电极形成在存储线上并与TFT电连接。 显示基板减少像素电极和数据线之间的寄生电容的形成。

公开(公告)号：US20070026586A1

公开(公告)日：2007-02-01

申请号：US11494085

申请日：2006-07-26

申请人： Hyuk-Jin Kim ,  Min-Wook Park ,  In-Woo Kim

发明人： Hyuk-Jin Kim ,  Min-Wook Park ,  In-Woo Kim

IPC分类号： H01L21/84

CPC分类号： H01L27/1288 ,  G02F2001/13625 ,  G03F1/00 ,  G03F7/0007 ,  G03F7/70791 ,  H01L27/1214

摘要： A mask for forming a display substrate capable of improving color reproducibility by avoiding color spots and color shifts is presented. The mask includes a first sub-mask, a second sub-mask, a first overlapping portion and a second overlapping portion. The first sub-mask includes color reticles to form color pixels in a first active region of a display substrate. The second sub-mask includes color reticles to form color pixels in a second active region of the display substrate. The first overlapping portion is on a portion of the first sub-mask that overlaps the second sub-mask. The color reticles in the first overlapping portion are arranged at a different density from the rest of the first sub-mask. The second overlapping portion is on a portion of the second sub-mask that overlaps the first sub-mask. The color reticles in the second overlapping portion are arranged at a substantially same density as the first overlapping portion. Therefore, image display quality is improved.

摘要翻译： 提出了一种用于形成能够通过避免颜色斑点和颜色偏移而改善颜色再现性的显示基板的掩模。 掩模包括第一子掩模，第二子掩模，第一重叠部分和第二重叠部分。 第一子掩模包括在显示基板的第一有源区域中形成彩色像素的彩色掩模版。 第二子掩模包括在显示基板的第二有源区域中形成彩色像素的色标线。 第一重叠部分在与第二子掩模重叠的第一子掩模的一部分上。 第一重叠部分中的着色掩模版布置成与第一子掩模的其余部分不同的密度。 第二重叠部分在与第一子掩模重叠的第二子掩模的一部分上。 第二重叠部分中的着色掩模版以与第一重叠部分基本相同的密度排列。 因此，图像显示质量得到改善。

公开(公告)号：US08482688B2

公开(公告)日：2013-07-09

申请号：US11469974

申请日：2006-09-05

申请人： Hyuk-Jin Kim ,  Kyung-Wook Kim ,  Dong-Wuuk Seo

发明人： Hyuk-Jin Kim ,  Kyung-Wook Kim ,  Dong-Wuuk Seo

IPC分类号： G02F1/1343 ,  G02F1/1345 ,  G09G3/18 ,  G09G3/36 ,  H01L29/04 ,  H01L29/10 ,  H01L31/00 ,  H01L27/14 ,  H01L29/15 ,  H01L31/036

CPC分类号： G02F1/13306 ,  G02F1/1345 ,  G02F1/136213 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2320/0223

摘要： An array substrate includes a base substrate, a plurality of storage voltage lines, a plurality of connecting lines, and a common voltage applying section. Pixels are formed in regions defined by a plurality of gate lines extending along a first direction and data lines extending along a second direction. The connecting lines are connected to the storage voltage lines that are formed on adjacent pixels of pixels arranged in the second direction. The common voltage applying section applies a common voltage to the storage voltage lines that are formed in a portion of the pixels arranged in the first direction. Thus, a substantially uniform current may be applied to the display area to decrease the distortion of the common voltage, thereby increasing a liquid crystal display device's display quality.

摘要翻译： 阵列基板包括基底基板，多个存储电压线，多个连接线以及公共电压施加部。 像素形成在由沿着第一方向延伸的多个栅极线和沿着第二方向延伸的数据线限定的区域中。 连接线连接到形成在沿第二方向布置的像素的相邻像素上的存储电压线。 公共电压施加部分对形成在沿第一方向布置的像素的一部分中的存储电压线施加公共电压。 因此，可以向显示区域施加大致均匀的电流，以减小公共电压的失真，从而增加液晶显示装置的显示质量。

公开(公告)号：US08223283B2

公开(公告)日：2012-07-17

申请号：US12332213

申请日：2008-12-10

申请人： Bong-Jun Lee ,  Byeong-Jae Ahn ,  Yeo-Geon Yoon ,  Hong-Woo Lee ,  Hyuk-Jin Kim ,  Jong-Oh Kim ,  Gyu-Tae Kim

发明人： Bong-Jun Lee ,  Byeong-Jae Ahn ,  Yeo-Geon Yoon ,  Hong-Woo Lee ,  Hyuk-Jin Kim ,  Jong-Oh Kim ,  Gyu-Tae Kim

IPC分类号： G02F1/1343

CPC分类号： H01L27/124 ,  H01L27/1288

摘要： A display substrate includes a base substrate, a first line, a second line, a bridge line, a thin-film transistor (TFT), a storage line, and a pixel electrode. The first line extends in a first direction on the base substrate. The second line extends in a second direction on the base substrate and is divided into two portions with respect to the first line. The bridge line makes contact with the two portions of the second line in first and second bridge contact regions. The TFT includes a source electrode making contact with one of the first and second lines in a data contact region. The storage line is formed on the one of the first and second lines. The pixel electrode is formed on the storage line and is electrically connected to the TFT. The display substrate reduces formation of parasitic capacitance between pixel electrode and data line.

摘要翻译： 显示基板包括基底基板，第一线，第二线，桥接线，薄膜晶体管（TFT），存储线和像素电极。 第一线在基底基板上沿第一方向延伸。 第二线在基底基板上沿第二方向延伸，并且相对于第一线分成两部分。 桥接线与第一和第二桥接触区域中的第二线路的两个部分接触。 TFT包括与数据接触区域中的第一和第二线路之一接触的源电极。 存储线形成在第一和第二线之一上。 像素电极形成在存储线上并与TFT电连接。 显示基板减少像素电极和数据线之间的寄生电容的形成。

公开(公告)号：US20120081640A1

公开(公告)日：2012-04-05

申请号：US13045400

申请日：2011-03-10

申请人： Hyuk-Jin Kim ,  Hyo-Taek Lim ,  Kweon-Sam Hong ,  Hyun Park ,  Tae-Hyeong Kim

发明人： Hyuk-Jin Kim ,  Hyo-Taek Lim ,  Kweon-Sam Hong ,  Hyun Park ,  Tae-Hyeong Kim

IPC分类号： G02F1/1335 ,  G02F1/1339

CPC分类号： G02F1/133514 ,  G02F1/13394 ,  G02F2001/133388 ,  G02F2001/13396

摘要： A display substrate and a display device including the same are provided. The display substrate includes a first substrate which is divided into a display portion including pixel regions and a non-display portion including a region other than the display portion. Color filters are formed in the pixel regions of the substrate to respective thicknesses. At least one stepped pattern is formed on the non-display portion of the substrate and from the same material as used to form at least one of the color filters. The stepped patterns are formed at an area occupancy density of 20% or more of the non-display portion. A minimum distance is maintained between the stepped patterns and the pixel regions.

摘要翻译： 提供了显示基板和包括该显示基板的显示装置。 显示基板包括被分成包括像素区域的显示部分和包括除了显示部分之外的区域的非显示部分的第一基板。 在基板的像素区域中形成各个厚度的滤色器。 在基板的非显示部分上形成至少一个阶梯图案，并且与用于形成至少一个滤色器的相同材料形成。 阶梯图案形成在非显示部分的占有密度为20％以上的区域。 在阶梯图案和像素区域之间保持最小距离。

公开(公告)号：US09122324B2

公开(公告)日：2015-09-01

申请号：US13527393

申请日：2012-06-19

申请人： Duk-Sung Kim ,  Hyuk-Jin Kim ,  Young Jae Tak

发明人： Duk-Sung Kim ,  Hyuk-Jin Kim ,  Young Jae Tak

IPC分类号： G02F1/1345 ,  G06F3/038 ,  H01L27/12 ,  H01L29/40

CPC分类号： G06F3/038 ,  G02F1/1345 ,  G02F1/136286 ,  H01L27/124

摘要： A thin film transistor display panel capable of minimizing a bezel and a manufacturing method thereof are provided. The thin film transistor display panel includes: a substrate; a plurality of gate lines and data lines that cross each other on the substrate; a thin film transistor connected to the gate line and the data line; a pixel electrode connected to the thin film transistor; and a plurality of gate voltage supply lines arranged in a parallel direction with the data lines and connected to the plurality of gate lines, respectively, in which one pixel area is defined by two adjacent gate lines and two adjacent data lines, two pixel electrodes are formed in one pixel area, and the gate voltage supply lines pass between the two pixel electrodes formed in the same pixel area.

摘要翻译： 提供了能够最小化边框的薄膜晶体管显示面板及其制造方法。 薄膜晶体管显示面板包括：基板; 在基板上交叉的多条栅极线和数据线; 连接到栅线和数据线的薄膜晶体管; 连接到薄膜晶体管的像素电极; 以及分别与数据线并联布置并连接到多个栅极线的多个栅极电压供给线，其中一个像素区域由两个相邻的栅极线和两个相邻的数据线限定，两个像素电极是 形成在一个像素区域中，并且栅极电压供给线在形成在相同像素区域中的两个像素电极之间通过。

公开(公告)号：US20130087793A1

公开(公告)日：2013-04-11

申请号：US13553090

申请日：2012-07-19

申请人： Jang-Il Kim ,  Jae-Jin Song ,  Sung-Hee Hong ,  Hyuk-Jin Kim ,  Kee-Bum Park ,  Byoung-Sun Na

发明人： Jang-Il Kim ,  Jae-Jin Song ,  Sung-Hee Hong ,  Hyuk-Jin Kim ,  Kee-Bum Park ,  Byoung-Sun Na

IPC分类号： H01L33/08 ,  H01L33/58

CPC分类号： G02F1/13458 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0286

摘要： An array substrate includes a base substrate and a contact part. The contact part is disposed on the base substrate. The contact part includes a first metal pattern, a disconnection control pattern and a connecting pattern. The second metal pattern is disposed on a layer different from the first metal pattern, the disconnection control pattern overlaps a side surface of the second metal pattern and a connecting pattern is formed on the first and second metal patterns and the disconnection control pattern and connects the first metal pattern with the second metal pattern.

摘要翻译： 阵列基板包括基底基板和接触部件。 接触部分设置在基底基板上。 接触部分包括第一金属图案，断开控制图案和连接图案。 第二金属图案设置在与第一金属图案不同的层上，断开控制图案与第二金属图案的侧表面重叠，并且在第一和第二金属图案和断开控制图案上形成连接图案，并将 第一金属图案与第二金属图案。

公开(公告)号：US08350268B2

公开(公告)日：2013-01-08

申请号：US13043267

申请日：2011-03-08

申请人： Hyuk-Jin Kim ,  Kyung-wook Kim

发明人： Hyuk-Jin Kim ,  Kyung-wook Kim

IPC分类号： H01L29/04

CPC分类号： H01L29/78669 ,  G02F1/136213 ,  G02F1/136227 ,  G02F1/1368 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/78678

摘要： A thin film transistor substrate including a thin film transistor having a drain electrode with an electrode portion, which overlaps with a semiconductor layer, and an extended portion, which extends from the electrode portion and has a portion overlapping with a storage electrode or storage electrode line. A passivation layer is arranged on the drain electrode, and it has a contact hole that partially exposes the extended portion of the drain electrode without exposing a step in the extended portion caused by the storage electrode or storage electrode line. A pixel electrode is arranged on the passivation layer and is electrically connected with the extended portion of the drain electrode through the contact hole.

摘要翻译： 一种薄膜晶体管基板，包括具有与半导体层重叠的具有电极部分的漏电极的薄膜晶体管和从电极部分延伸并具有与存储电极或存储电极线重叠的部分的延伸部分 。 钝化层布置在漏电极上，并且具有部分地暴露漏电极的延伸部分的接触孔，而不会暴露由存储电极或存储电极线引起的延伸部分中的台阶。 像素电极设置在钝化层上，并通过接触孔与漏电极的延伸部分电连接。