VOLTAGE GENERATION CIRCUIT AND NONVOLATILE MEMORY DEVICE USING THE SAME
    1.
    发明申请
    VOLTAGE GENERATION CIRCUIT AND NONVOLATILE MEMORY DEVICE USING THE SAME 失效
    使用该电路的电压发生电路和非易失性存储器件

    公开(公告)号:US20100302881A1

    公开(公告)日:2010-12-02

    申请号:US12650639

    申请日:2009-12-31

    IPC分类号: G11C7/22 H03K5/003

    摘要: A voltage generation circuit comprises a voltage generation control unit configured to output one of a first voltage level determination signal having a fixed data value and a second voltage level determination signal having a varying data value in response to a selection signal, and a voltage generation unit configured to generate a voltage having a single pulse form or a voltage having a pulse form whose rising edge portion rises in incremental voltage steps in response to the voltage level determination signal outputted from the voltage generation control unit.

    摘要翻译: 电压产生电路包括:电压产生控制单元,被配置为响应于选择信号输出具有固定数据值的第一电压电平确定信号和具有变化的数据值的第二电压电平确定信号;以及电压产生单元 被配置为响应于从电压产生控制单元输出的电压电平确定信号产生具有单脉冲形式的电压或具有脉冲形式的电压,其上升沿部分以增量电压步长上升。

    Voltage generation circuit and nonvolatile memory device using the same
    2.
    发明授权
    Voltage generation circuit and nonvolatile memory device using the same 失效
    电压产生电路和使用其的非易失性存储器件

    公开(公告)号:US08422309B2

    公开(公告)日:2013-04-16

    申请号:US12650639

    申请日:2009-12-31

    IPC分类号: G11C11/34 G11C16/06

    摘要: A voltage generation circuit comprises a voltage generation control unit configured to output one of a first voltage level determination signal having a fixed data value and a second voltage level determination signal having a varying data value in response to a selection signal, and a voltage generation unit configured to generate a voltage having a single pulse form or a voltage having a pulse form whose rising edge portion rises in incremental voltage steps in response to the voltage level determination signal outputted from the voltage generation control unit.

    摘要翻译: 电压产生电路包括:电压产生控制单元,被配置为响应于选择信号输出具有固定数据值的第一电压电平确定信号和具有变化的数据值的第二电压电平确定信号;以及电压产生单元 被配置为响应于从电压产生控制单元输出的电压电平确定信号产生具有单脉冲形式的电压或具有脉冲形式的电压,其上升沿部分以增量电压步长上升。

    Method of operating nonvolatile memory device
    3.
    发明授权
    Method of operating nonvolatile memory device 有权
    操作非易失性存储器件的方法

    公开(公告)号:US08036042B2

    公开(公告)日:2011-10-11

    申请号:US12650740

    申请日:2009-12-31

    IPC分类号: G11C16/06

    CPC分类号: G11C16/3404 G11C16/04

    摘要: A method of operating a nonvolatile memory device includes performing a reset operation for setting a level of a program voltage to a first level, performing a program operation and a verification operation on memory cells included in a first page of a first memory block while raising the program voltage from the first level, storing a level of the program voltage, supplied to the first page when memory cells programmed to have threshold voltages with at least a verification voltage are detected during the verification operation, as a second level, while raising the program voltage from the second level, performing the program operation and the verification operation on each of second to last pages of the first memory block, and after completing the program operation for the first memory block, performing the reset operation for setting the level of the program voltage to the first level.

    摘要翻译: 一种操作非易失性存储器件的方法包括执行用于将程序电压的电平设置为第一电平的复位操作,对包括在第一存储块的第一页中的存储器单元执行编程操作和验证操作,同时提高 当在验证操作期间检测到被编程为具有至少具有验证电压的阈值电压的存储单元时,提供给第一页的程序电压电平作为第二电平,同时提高程序 电压从第二电平开始,对第一存储块的第二至第二页中的每一个执行编程操作和验证操作,并且在完成第一存储器块的编程操作之后,执行用于设置程序电平的复位操作 电压到第一级。

    METHOD OF OPERATING NONVOLATILE MEMORY DEVICE
    4.
    发明申请
    METHOD OF OPERATING NONVOLATILE MEMORY DEVICE 有权
    操作非易失性存储器件的方法

    公开(公告)号:US20100302864A1

    公开(公告)日:2010-12-02

    申请号:US12650740

    申请日:2009-12-31

    IPC分类号: G11C16/06 G11C16/04

    CPC分类号: G11C16/3404 G11C16/04

    摘要: A method of operating a nonvolatile memory device includes performing a reset operation for setting a level of a program voltage to a first level, performing a program operation and a verification operation on memory cells included in a first page of a first memory block while raising the program voltage from the first level, storing a level of the program voltage, supplied to the first page when memory cells programmed to have threshold voltages with at least a verification voltage are detected during the verification operation, as a second level, while raising the program voltage from the second level, performing the program operation and the verification operation on each of second to last pages of the first memory block, and after completing the program operation for the first memory block, performing the reset operation for setting the level of the program voltage to the first level.

    摘要翻译: 一种操作非易失性存储器件的方法包括执行用于将程序电压的电平设置为第一电平的复位操作,对包括在第一存储块的第一页中的存储器单元执行编程操作和验证操作,同时提高 当在验证操作期间检测到被编程为具有至少具有验证电压的阈值电压的存储单元时,提供给第一页的程序电压电平作为第二电平,同时提高程序 电压从第二电平开始,对第一存储块的第二至第二页中的每一个执行编程操作和验证操作,并且在完成第一存储器块的编程操作之后,执行用于设置程序电平的复位操作 电压到第一级。

    Method of determining a flag state of a non-volatile memory device
    5.
    发明授权
    Method of determining a flag state of a non-volatile memory device 有权
    确定非易失性存储器件的标志状态的方法

    公开(公告)号:US07715232B2

    公开(公告)日:2010-05-11

    申请号:US12138287

    申请日:2008-06-12

    IPC分类号: G11C11/34

    CPC分类号: G11C16/26

    摘要: In a method of determining a flag state of a non-volatile memory device, an arithmetic logic unit of a microcontroller is employed without an additional circuit. The method includes providing n flag state information about n flag cells, resetting an entire flag state information value, sequentially reading first to n flag state information, increasing the entire flag state information value depending on a read result of the first to n flag state information, and determining a flag state by comparing the entire flag state information value and a critical value.

    摘要翻译: 在确定非易失性存储器件的标志状态的方法中,使用微控制器的算术逻辑单元而没有附加电路。 该方法包括提供关于n个标志单元的n个标志状态信息,重置整个标志状态信息值,依次读取n个标志状态信息,根据第一至第n标志状态信息的读取结果增加整个标志状态信息值 并且通过比较整个标志状态信息值和临界值来确定标志状态。

    Semiconductor memory device and program methods thereof
    6.
    发明授权
    Semiconductor memory device and program methods thereof 失效
    半导体存储器件及其编程方法

    公开(公告)号:US08611155B2

    公开(公告)日:2013-12-17

    申请号:US13341382

    申请日:2011-12-30

    IPC分类号: G11C11/34

    摘要: Programming a semiconductor memory device includes: performing a program loop using a blind program operation until the selected cell threshold voltages reach a first verification level; upon detecting a cell having the threshold voltage reaching the first verification level, verifying whether a cell having the threshold voltage reached a second verification level higher than the first verification level; upon verifying a cell having the threshold voltage reaching the second verification level, continuously performing program loops on cells having the first verification level as a target level and on cells having the second verification level as a target level; and upon verifying no cell having the threshold voltage reaching the second verification level, performing a program loop on memory cells having a target level higher than the first verification level, after programming the memory cells having the first verification level as the target level.

    摘要翻译: 编程半导体存储器件包括:使用盲目程序操作执行程序循环,直到所选择的单元阈值电压达到第一验证水平; 一旦检测到阈值电压达到第一验证电平的单元,则验证具有阈值电压的单元是否达到高于第一验证电平的第二验证电平; 在验证具有阈值电压达到第二验证电平的单元的情况下,对具有第一验证电平的单元作为目标电平,以及具有第二验证电平的单元作为目标电平连续执行程序循环; 并且在验证没有阈值电压达到第二验证电平的单元时,在将具有第一验证电平的存储单元编程为目标电平之后,对具有高于第一验证电平的目标电平的存储单元执行程序循环。

    METHOD OF DETERMINING A FLAG STATE OF A NON-VOLATILE MEMORY DEVICE
    7.
    发明申请
    METHOD OF DETERMINING A FLAG STATE OF A NON-VOLATILE MEMORY DEVICE 有权
    确定非易失性存储器件的标志状态的方法

    公开(公告)号:US20090161425A1

    公开(公告)日:2009-06-25

    申请号:US12138287

    申请日:2008-06-12

    IPC分类号: G11C16/06

    CPC分类号: G11C16/26

    摘要: In a method of determining a flag state of a non-volatile memory device, an arithmetic logic unit of a microcontroller is employed without an additional circuit. The method includes providing n flag state information about n flag cells, resetting an entire flag state information value, sequentially reading first to n flag state information, increasing the entire flag state information value depending on a read result of the first to n flag state information, and determining a flag state by comparing the entire flag state information value and a critical value.

    摘要翻译: 在确定非易失性存储器件的标志状态的方法中,使用微控制器的算术逻辑单元而没有附加电路。 该方法包括提供关于n个标志单元的n个标志状态信息,重置整个标志状态信息值,依次读取n个标志状态信息,根据第一至第n标志状态信息的读取结果增加整个标志状态信息值 并且通过比较整个标志状态信息值和临界值来确定标志状态。

    Method of programming nonvolatile memory device
    8.
    发明授权
    Method of programming nonvolatile memory device 有权
    非易失性存储器件编程方法

    公开(公告)号:US08050103B2

    公开(公告)日:2011-11-01

    申请号:US12361195

    申请日:2009-01-28

    IPC分类号: G11C16/04

    摘要: In one aspect of the method of programming a nonvolatile memory device, memory cells selected for a program are determined to belong to a first memory cell group or a second memory cell group based on address information and a program command. According to this determination, to-be-programmed data are input based on information about the number of set data bits, and programming and verification are performed.

    摘要翻译: 在非易失性存储器件编程方法的一个方面中,基于地址信息和程序命令,将为程序选择的存储单元确定为属于第一存储单元组或第二存储单元组。 根据该判断,根据关于设定数据位数的信息来输入被编程数据,进行编程和验证。

    FLASH MEMORY DEVICE AND PROGRAM METHOD THEREOF
    9.
    发明申请
    FLASH MEMORY DEVICE AND PROGRAM METHOD THEREOF 有权
    闪存存储器件及其程序方法

    公开(公告)号:US20090031080A1

    公开(公告)日:2009-01-29

    申请号:US11950303

    申请日:2007-12-04

    IPC分类号: G06F12/00

    CPC分类号: G11C16/10 G11C2216/14

    摘要: A flash memory device includes a memory cell array, a peri circuit unit, an I/O controller, and a controller. The memory cell array includes a plurality of memory cells respectively connected to a plurality of bit line pairs and a plurality word lines. The peri circuit unit is configured to program data into the memory cell array or read data stored in the memory cell array in response to a command input through a control bus. The I/O controller is configured to receive data for programming and supply the data to the peri circuit unit in response to a command provided through a data input/output (I/O) bus. The controller is configured to control the I/O controller to perform a voltage setup operation for a program while the data for program is received.

    摘要翻译: 闪存器件包括存储单元阵列,周边电路单元,I / O控制器和控制器。 存储单元阵列包括分别连接到多个位线对和多个字线的多个存储单元。 周边电路单元被配置为响应于通过控制总线输入的命令,将数据编程到存储单元阵列中或读取存储在存储单元阵列中的数据。 I / O控制器被配置为接收用于编程的数据,并响应于通过数据输入/输出(I / O)总线提供的命令将数据提供给周边电路单元。 控制器被配置为控制I / O控制器,以便在接收到用于节目的数据时对节目执行电压设置操作。

    Method of performing read operation in flash memory device
    10.
    发明授权
    Method of performing read operation in flash memory device 有权
    在闪存设备中执行读取操作的方法

    公开(公告)号:US08199583B2

    公开(公告)日:2012-06-12

    申请号:US12702213

    申请日:2010-02-08

    IPC分类号: G11C16/06

    CPC分类号: G11C16/10 G11C11/5642

    摘要: A method of performing a read operation in a flash memory device is disclosed. The flash memory has a memory cell array including at least one block, the block having a plurality of pages. The method comprises receiving a read command to read data from a selected page in the block; determining whether or not the block has any page that has not been programmed; performing a dummy data program operation on at least one page that is determined not to have been programmed; and executing the read command to read the data of the selected page after the dummy data program operation is completed.

    摘要翻译: 公开了一种在闪速存储器件中执行读取操作的方法。 闪速存储器具有包括至少一个块的存储单元阵列,该块具有多个页。 该方法包括接收读取命令以从块中的所选页面读取数据; 确定块是否具有尚未被编程的任何页面; 在确定不被编程的至少一个页面上执行伪数据程序操作; 并且在完成虚拟数据编程操作之后执行读取命令以读取所选择的页面的数据。