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1.发明授权Method and apparatus for direct writing of semiconductor die using microcolumn array 失效使用微柱阵列直接写入半导体管芯的方法和装置
公开(公告)号：US6145438A
公开(公告)日：2000-11-14
申请号：US45490
申请日：1998-03-20
IPC分类号： G03F7/20 , H01J37/305 , H01J37/317 , H01L21/027 , B41C1/05 , G03C5/00 , H01J37/304
CPC分类号： B82Y10/00 , B82Y40/00 , G03F7/2065 , H01J37/3177
摘要： In electron beam lithography, a lithography system uses multiple microcolumns in an array to increase throughput for direct writing of semiconductor wafers. The mismatch between the microcolumn array and the semiconductor die periodicity is resolved by using only one microcolumn to scan each individual die. This is accomplished by assuring that the stage carrying the semiconductor wafer moves a total distance in each of the X and Y directions which is greater than the pitch between adjacent die. Hence each die is scanned by only a single microcolumn although at possibly different times during the total stage motion.
摘要翻译： 在电子束光刻中，光刻系统使用阵列中的多个微柱来增加用于直接写入半导体晶片的生产量。 通过仅使用一个微柱来扫描每个单独的管芯来解决微柱阵列与半导体管芯周期性之间的不匹配。 这是通过确保携带半导体晶片的载台在X和Y方向中的每一个上移动大于相邻模具之间的间距的总距离来实现的。 因此，尽管在整个阶段运动期间可能不同的时间，每个管芯仅由单个微柱扫描。
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2.发明授权Gated photocathode for controlled single and multiple electron beam emission 失效用于受控单电子束和多电子束发射的门控光电阴极公开(公告)号：US06376985B2
公开(公告)日：2002-04-23
申请号：US09052903
申请日：1998-03-31
IPC分类号： H01J4006
CPC分类号： H01J37/3174 , B82Y10/00 , B82Y40/00 , G03F7/70375 , H01J1/34 , H01J37/073 , H01J2237/31779
摘要： A photocathode having a gate electrode so that modulation of the resulting electron beam is accomplished independently of the laser beam. The photocathode includes a transparent substrate, a photoemitter, and an electrically separate gate electrode surrounding an emission region of the photoemitter. The electron beam emission from the emission region is modulated by voltages supplied to the gate electrode. In addition, the gate electrode may have multiple segments that are capable of shaping the electron beam in response to voltages supplied individually to each of the multiple segments.
摘要翻译： 具有栅极的光电阴极，使得所得电子束的调制独立于激光束而实现。 光电阴极包括透明基板，光电发射器和围绕发光体的发射区域的电分离的栅电极。 来自发射区域的电子束发射由供给栅电极的电压调制。 此外，栅电极可以具有多个段，其能够响应于单独提供给多个段中的每一个的电压而使电子束成形。
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3.发明授权Method of forming gated photocathode for controlled single and multiple electron beam emission 失效形成用于受控单电子束和多电子束发射的门控光电阴极的方法公开(公告)号：US06220914B1
公开(公告)日：2001-04-24
申请号：US09449201
申请日：1999-11-24
IPC分类号： H01J902
CPC分类号： H01J37/3174 , B82Y10/00 , B82Y40/00 , G03F7/70375 , H01J1/34 , H01J37/073 , H01J2237/31779
摘要： A photocathode having a gate electrode so that modulation of the resulting electron beam is accomplished independently of the laser beam. The photocathode includes a transparent substrate, a photoemitter, and an electrically separate gate electrode surrounding an emission region of the photoemitter. The electron beam emission from the emission region is modulated by voltages supplied to the gate electrode. In addition, the gate electrode may have multiple segments that are capable of shaping the electron beam in response to voltages supplied individually to each of the multiple segments.
摘要翻译： 具有栅极的光电阴极，使得所得电子束的调制独立于激光束而实现。 光电阴极包括透明基板，光电发射器和围绕发光体的发射区域的电分离的栅电极。 来自发射区域的电子束发射由供给栅电极的电压调制。 此外，栅电极可以具有多个段，其能够响应于单独提供给多个段中的每一个的电压而使电子束成形。
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4.发明授权Automated system for extracting design and layout information from an integrated circuit 失效用于从集成电路中提取设计和布局信息的自动化系统
公开(公告)号：US5086477A
公开(公告)日：1992-02-04
申请号：US564175
申请日：1990-08-07
申请人： Kenneth K. Yu , C. Neil Berglund
发明人： Kenneth K. Yu , C. Neil Berglund
CPC分类号： G06K9/00 , G06F17/5068 , H01L27/0203
摘要： A system for extracting design information from a semiconductor integrated circuit (IC) is disclosed. The system includes a microscope and camera for capturing a composite image of the IC in the form of a video signal. Image capture occurs on a section-by-section basis in which a "snapshot" of each section is taken, the die-holding table stepped to a new section, and a snapshot of the new section obtained. This image capture operation continues until a composite image of the IC is obtained by successive capture of contiguous or partially overlapping images covering all of the different sections of the die. An image processor receives the video signal from the optical means and generates an abstract representation of the die in the form of lists of identifying features such as the size, type and relative location of all transistors, and the width, length and relative location of all of the metal interconnects to the IC. These lists are subsequently compared with reference library circuits by a computer to recognize individual circuit cells. Once all of the ciruit cells on the die have been recognized, the computer then generates a schematic netlist of the IC.
摘要翻译： 公开了一种从半导体集成电路（IC）提取设计信息的系统。 该系统包括用于以视频信号的形式捕获IC的合成图像的显微镜和相机。 图像捕获发生在逐个部分的基础上，其中采取每个部分的“快照”，模具保持表步进新的部分，并获取新部分的快照。 该图像捕获操作继续进行，直到通过连续捕获覆盖芯片的所有不同部分的连续或部分重叠的图像来获得IC的合成图像。 图像处理器从光学装置接收视频信号，并以所有晶体管的尺寸，类型和相对位置以及所有晶体管的宽度，长度和相对位置等识别特征的列表的形式产生裸片的抽象表示 的金属互连到IC。 这些列表随后通过计算机与参考库电路进行比较以识别各个电路单元。 一旦芯片上的所有电路单元已被识别，计算机然后生成IC的示意网表。
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公开(公告)号：US06803582B2
公开(公告)日：2004-10-12
申请号：US10428869
申请日：2003-05-02
申请人： C. Neil Berglund
发明人： C. Neil Berglund
IPC分类号： H01J3708
CPC分类号： B82Y10/00 , B82Y40/00 , H01J37/045 , H01J37/3177 , H01J2237/31761 , H01J2237/31762 , H01J2237/31766
摘要： A beam array includes a base plate, a plurality of conductor pads, and a ground plate. The conductor pads are arranged in a one-dimensional array on the base plate. The ground plate is coupled to the base plate over the plurality of conductor pads with a gap between the base plate and the ground plate. Each of the plurality of conductor pads forms a beam blanker across the gap with the ground plate.
摘要翻译： 光束消隐器阵列包括基板，多个导体焊盘和接地板。 导体焊盘在基板上以一维阵列布置。 接地板在基板和接地板之间具有间隙地连接在多个导体焊盘上的基板上。 多个导体焊盘中的每一个形成与接地板跨越间隙的光束消除器。
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公开(公告)号：US5393987A
公开(公告)日：1995-02-28
申请号：US69222
申请日：1993-05-28
IPC分类号： H01J37/305 , H01J37/302 , H01J37/317 , H01L21/027
CPC分类号： B82Y10/00 , B82Y40/00 , H01J37/302 , H01J37/3174 , H01J2237/30488
摘要： A raster scan lithography system is modified so that the duration of illumination (dose modulation) for particular pixels is varied to lie between the full on and full off normally used. For instance, three levels of pixel intensity are provided, 100%, 70% and 30% (in addition to off which is 0%). The 30% and 70% pixels are used along the edge of a feature so as to locate the edge when written in between the lines of the cartesian raster scan grid. Thus the edges of the feature are moved off the grid, without the need for multiple passes. This pixel dose modulation uses three preset delay lines determining dwell times for each pixel on a pixel-by-pixel basis, as defined by a two (or more) bit deep memory file associated with the pattern to be written. Additionally, the pixel center locations are directly moved off the grid by deflecting the beam as it scans certain pixels located along feature edges. The amount of deflection is controllably variable to achieve various edge locations. This deflection is used by itself or in combination with dose modulation, and is implemented by an electrostatic deflector in the beam lens for an E-beam system.
摘要翻译： 修改光栅扫描光刻系统，使特定像素的照明持续时间（剂量调制）变化，以处于正常使用的全开和关闭之间。 例如，提供三个等级的像素强度，100％，70％和30％（除了0％之外）。 沿着特征的边缘使用30％和70％的像素，以便在写入笛卡尔光栅扫描网格的线之间时定位边缘。 因此，特征的边缘从网格移开，而不需要多遍。 该像素剂量调制使用三个预设延迟线来确定每个像素在逐个像素的基础上的停留时间，如由要写入的图案相关联的两个（或多个）位深存储器文件所定义的。 此外，像素中心位置通过在扫描沿着特征边缘定位的某些像素时偏转光束而直接从网格移开。 偏转量可控地变化以实现各种边缘位置。 该偏转本身或与剂量调制结合使用，并且由电子束系统的束透镜中的静电偏转器实现。
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公开(公告)号：US5103101A
公开(公告)日：1992-04-07
申请号：US664066
申请日：1991-03-04
申请人： C. Neil Berglund , John R. Thomas , John T. Poreda
发明人： C. Neil Berglund , John R. Thomas , John T. Poreda
IPC分类号： G03F7/20 , H01J37/302
CPC分类号： H01J37/3174 , B82Y10/00 , B82Y40/00 , G03F7/704 , H01J37/3026 , H01J2237/31762
摘要： A method for a raster scan particle or light beam lithography system for writing in multiple passes interleaved in such a manner as to achieve a composite result nearly identical to normal single pass raster scan writing with overlapped spots. Multiple pass writing, achieved with little or no degradation or throughput or lithography quality, provides an ideal platform for implementation of known image averaging techniques to improve lithography quality. This technique is combined with the known writing technique of "Virtual Addressing" to improve resolution with little or no degradation of throughput.
摘要翻译： 一种光栅扫描粒子或光束光刻系统的方法，用于以多个遍的方式进行写入，以便实现与具有重叠点的正常单遍光栅扫描写入几乎相同的复合结果。 实现了很少或没有劣化或吞吐量或光刻质量的多遍写入为实现已知的图像平均技术提供了理想的平台，以提高光刻质量。 该技术与“虚拟寻址”的已知写入技术相结合，以提高分辨率，几乎不降低吞吐量。
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公开(公告)号：US4409259A
公开(公告)日：1983-10-11
申请号：US403116
申请日：1982-07-29
IPC分类号： G11C5/00 , G11C11/404 , H01L23/556 , H01L27/108 , H01L29/78 , B05D5/12 , H01L27/02
CPC分类号： H01L27/10805 , G11C11/404 , G11C5/005 , H01L23/556 , H01L2924/0002
摘要： A high density CMOS dynamic RAM cell comprising a transistor and capacitance means formed in an n-well is disclosed. The capacitance means includes a polysilicon plate member disposed above a p-type region formed in the n-well. A buried contact, extending from the plate member, pierces the p-type region and contacts the well. In addition to the capacitance associated with the plate member, p-type region and well, capacitance is obtained between the side walls of the n-type regions and p-type regions.
摘要翻译： 公开了一种包括形成在n阱中的晶体管和电容装置的高密度CMOS动态RAM单元。 电容装置包括设置在形成在n阱中的p型区域上方的多晶硅板构件。 从板构件延伸的埋入触头刺穿p型区域并与阱接触。 除了与板构件，p型区域和阱相关联的电容之外，在n型区域和p型区域的侧壁之间获得电容。
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