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1.发明申请公开(公告)号：US20150301454A1
公开(公告)日：2015-10-22
申请号：US14681350
申请日：2015-04-08
IPC分类号： G03F7/20 , H01L27/146
CPC分类号： H01L27/1463 , G03F7/0035 , G03F7/40 , H01L21/26513 , H01L27/1461 , H01L27/14643 , H01L27/14689
摘要： A method for manufacturing a semiconductor device comprising, forming a first photoresist pattern by exposing and then developing a first photoresist film formed on a substrate, irradiating the first photoresist pattern with UV light to cure its surface, forming a second photoresist film so as to cover the substrate and the first photoresist pattern, forming a second photoresist pattern and performing ion implantation in the substrate using the second photoresist pattern. The second photoresist pattern is not subjected to UV irradiation after the second photoresist film has been developed and before the ion implantation is performed, or is irradiated with the UV light, after the second photoresist film has been developed and before the ion implantation is performed, under a reduced condition relative to that for the first photoresist pattern.
摘要翻译： 一种半导体器件的制造方法，其特征在于，包括：通过使形成在基板上的第一光致抗蚀剂膜曝光然后显影而形成第一光致抗蚀剂图案，用紫外光照射第一光致抗蚀剂图案以固化其表面，形成第二光致抗蚀剂膜以覆盖 所述基板和所述第一光致抗蚀剂图案形成第二光致抗蚀剂图案，并使用所述第二光致抗蚀剂图案在所述基板中进行离子注入。 第二光致抗蚀剂图案在第二光致抗蚀剂膜已经被显影之后并且在进行离子注入之前或在被UV照射之后不经受UV照射，在第二光致抗蚀剂膜已被显影之后并且在离子注入之前， 在相对于第一光致抗蚀剂图案的条件下降低。
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公开(公告)号：US20130224637A1
公开(公告)日：2013-08-29
申请号：US13770012
申请日：2013-02-19
发明人： Satoshi Hirayama , Atsushi Kanome
CPC分类号： G03F1/00 , G03F1/50 , G03F7/20 , G03F7/2022
摘要： A photomask for exposing a region on a substrate, with a mask pattern, including a first line pattern, a second line pattern, a first connection pattern for a peripheral portion of the region and a second connection pattern for the peripheral portion, wherein the first connection pattern is wider than the first line pattern and the second connection pattern is wider than the second line pattern, a distance from a virtual line between the first line pattern and the second line pattern to a center line of the first connection pattern is larger than a distance from the virtual line to a center line of the first line pattern and a distance from the virtual line to a center line of the second connection pattern is larger than a distance from the virtual line to a center line of the second line pattern.
摘要翻译： 一种光掩模，用于将具有掩模图案的掩模图案暴露在基板上，该掩模图案包括第一线图案，第二线图案，用于该区域的周边部分的第一连接图案和用于周边部分的第二连接图案，其中第一 连接图案比第一线图案宽，第二连接图案宽于第二线图案，从第一线图案和第二线图案之间的假想线到第一连接图案的中心线的距离大于 从虚拟线到第一线图案的中心线的距离以及从虚拟线到第二连接图案的中心线的距离大于从虚线到第二线图案的中心线的距离。
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公开(公告)号：US20160336369A1
公开(公告)日：2016-11-17
申请号：US15149767
申请日：2016-05-09
IPC分类号： H01L27/146 , H04N9/04
CPC分类号： H01L27/14685 , H01L27/14609 , H01L27/1462 , H01L27/14627 , H01L27/14636
摘要： A solid-state imaging device has a first area in which a plurality of pixels are provided, a second area provided on an outer side with respect to the first area, and a third area provided on the outer side with respect to the second area. An inner-lens layer provided over the first to third areas has an opening. An insulating film provided below the inner-lens layer also has an opening.
摘要翻译： 固态成像装置具有设置有多个像素的第一区域，相对于第一区域设置在外侧的第二区域和设置在第二区域的外侧的第三区域。 设置在第一至第三区域上的内透镜层具有开口。 设置在内透镜层下方的绝缘膜也具有开口。
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公开(公告)号：US08852830B2
公开(公告)日：2014-10-07
申请号：US13770012
申请日：2013-02-19
发明人： Satoshi Hirayama , Atsushi Kanome
CPC分类号： G03F1/00 , G03F1/50 , G03F7/20 , G03F7/2022
摘要： A photomask for exposing a region on a substrate, with a mask pattern, including a first line pattern, a second line pattern, a first connection pattern for a peripheral portion of the region and a second connection pattern for the peripheral portion, wherein the first connection pattern is wider than the first line pattern and the second connection pattern is wider than the second line pattern, a distance from a virtual line between the first line pattern and the second line pattern to a center line of the first connection pattern is larger than a distance from the virtual line to a center line of the first line pattern and a distance from the virtual line to a center line of the second connection pattern is larger than a distance from the virtual line to a center line of the second line pattern.
摘要翻译： 一种光掩模，用于将具有掩模图案的掩模图案暴露在基板上，该掩模图案包括第一线图案，第二线图案，用于该区域的周边部分的第一连接图案和用于周边部分的第二连接图案，其中第一 连接图案比第一线图案宽，第二连接图案宽于第二线图案，从第一线图案和第二线图案之间的假想线到第一连接图案的中心线的距离大于 从虚拟线到第一线图案的中心线的距离以及从虚拟线到第二连接图案的中心线的距离大于从虚线到第二线图案的中心线的距离。
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公开(公告)号：US20210305324A1
公开(公告)日：2021-09-30
申请号：US17205170
申请日：2021-03-18
发明人： Yoshihisa Kawamura , Hideki Ina , Yuto Nozaki , Yusuke Todo , Atsushi Kanome , Norihiko Nakata , Toru Eto
摘要： A color filter array is provided. The array comprises a first color filter, a second color filter, and a third color filter that are arranged on a base member and respectively have different colors. The first color filter and the third color filter are arranged adjacent to each other, the second color filter includes a portion placed between an end portion of the third color filter and the base member, and the end portion of the third color filter and the portion of the second color filter are in contact with the first color filter.
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公开(公告)号：US20210265411A1
公开(公告)日：2021-08-26
申请号：US17176959
申请日：2021-02-16
发明人： Junya Tamaki , Takafumi Miki , Ryo Yoshida , Atsushi Kanome , Kosuke Asano , Takehiro Toyoda , Masaki Masaki
IPC分类号： H01L27/146
摘要： A semiconductor device includes a plurality of wirings each having a damascene structure on a semiconductor layer, wherein the plurality of wirings includes a first wiring and a second wiring adjacent to each other, wherein the first wiring includes, along a direction in which the first wiring extends, a first portion, a second portion, and a third portion located between the first portion and the second portion, and wherein a width of the third portion is larger than each of a width of the first portion and a width of the second portion.
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公开(公告)号：US20140349440A1
公开(公告)日：2014-11-27
申请号：US14277225
申请日：2014-05-14
发明人： Atsushi Kanome
IPC分类号： H01L27/146
CPC分类号： H01L27/14683
摘要： A method of planarizing a member is provided. The method includes forming the member and polishing a top face of the member. The forming the member includes forming a resist layer which varies in thickness and performing an etch-back process. The etch-back process removes the resist layer and adjusts amounts to be removed by the polishing from respective locations of the member.
摘要翻译： 提供了一种平面化构件的方法。 该方法包括形成构件并抛光构件的顶面。 形成该构件包括形成厚度变化并执行回蚀工艺的抗蚀剂层。 回蚀处理去除抗蚀剂层并且调整通过抛光从成员的各个位置去除的量。
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公开(公告)号：US09837463B2
公开(公告)日：2017-12-05
申请号：US15149767
申请日：2016-05-09
IPC分类号： H01L27/14 , H01L27/146
CPC分类号： H01L27/14685 , H01L27/14609 , H01L27/1462 , H01L27/14627 , H01L27/14636
摘要： A solid-state imaging device has a first area in which a plurality of pixels are provided, a second area provided on an outer side with respect to the first area, and a third area provided on the outer side with respect to the second area. An inner-lens layer provided over the first to third areas has an opening. An insulating film provided below the inner-lens layer also has an opening.
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公开(公告)号：US09461086B2
公开(公告)日：2016-10-04
申请号：US14995397
申请日：2016-01-14
发明人： Atsushi Kanome , Takashi Usui
IPC分类号： H01L21/4763 , H01L27/146 , H01L21/3065 , H01L21/768
CPC分类号： H01L27/14636 , H01L21/3065 , H01L21/31116 , H01L21/76804 , H01L21/76816 , H01L23/544 , H01L27/14623 , H01L27/14643 , H01L27/14685 , H01L27/14689 , H01L2223/5442 , H01L2223/54426 , H01L2223/54453
摘要： A method of manufacturing a semiconductor device, comprising forming an insulating member on a structure having a height difference, and forming openings in the insulating member, the forming openings including first etching under a condition with a microloading phenomenon and second etching under a condition with a reverse microloading phenomenon, wherein the first etching is stopped before an upper face of the structure is exposed and then the second etching is started.
摘要翻译： 一种制造半导体器件的方法，包括在具有高度差的结构上形成绝缘构件，并且在所述绝缘构件中形成开口，所述成形开口包括在具有微加载现象的状态下的第一蚀刻和在具有 反向微加载现象，其中在结构的上表面暴露之前停止第一蚀刻，然后开始第二蚀刻。
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10.发明授权公开(公告)号：US09437637B2
公开(公告)日：2016-09-06
申请号：US14681350
申请日：2015-04-08
IPC分类号： H01L21/266 , H01L27/146 , G03F7/00 , G03F7/40
CPC分类号： H01L27/1463 , G03F7/0035 , G03F7/40 , H01L21/26513 , H01L27/1461 , H01L27/14643 , H01L27/14689
摘要： A method for manufacturing a semiconductor device comprising, forming a first photoresist pattern by exposing and then developing a first photoresist film formed on a substrate, irradiating the first photoresist pattern with UV light to cure its surface, forming a second photoresist film so as to cover the substrate and the first photoresist pattern, forming a second photoresist pattern and performing ion implantation in the substrate using the second photoresist pattern. The second photoresist pattern is not subjected to UV irradiation after the second photoresist film has been developed and before the ion implantation is performed, or is irradiated with the UV light, after the second photoresist film has been developed and before the ion implantation is performed, under a reduced condition relative to that for the first photoresist pattern.
摘要翻译： 一种半导体器件的制造方法，其特征在于，包括：通过使形成在基板上的第一光致抗蚀剂膜曝光然后显影而形成第一光致抗蚀剂图案，用紫外光照射第一光致抗蚀剂图案以固化其表面，形成第二光致抗蚀剂膜以覆盖 所述基板和所述第一光致抗蚀剂图案形成第二光致抗蚀剂图案，并使用所述第二光致抗蚀剂图案在所述基板中进行离子注入。 第二光致抗蚀剂图案在第二光致抗蚀剂膜已经被显影之后并且在进行离子注入之前或在被UV照射之后不经受UV照射，在第二光致抗蚀剂膜已被显影之后并且在离子注入之前， 在相对于第一光致抗蚀剂图案的条件下降低。
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