公开(公告)号：US06549038B1

公开(公告)日：2003-04-15

申请号：US09662101

申请日：2000-09-14

申请人： Carl Sechen ,  Larry McMurchie ,  Tyler Thorp ,  Gin Yee

发明人： Carl Sechen ,  Larry McMurchie ,  Tyler Thorp ,  Gin Yee

IPC分类号： H03K1900

CPC分类号： H03K19/01728 ,  H03K19/0963

摘要： A method for improving the speed of conventional CMOS logic families is disclosed. When applied to static CMOS, OPL retains the restoring character of the logic family, including its high noise margins. Speedups of 2× to 3× over (optimized) conventional static CMOS are demonstrated for a variety of circuits, ranging from chains of gates, to datapath circuits, and to random logic benchmarks. Such speedups are obtained using identical netlists without remapping. When applied to pseudo-nMOS and dynamic families, in combination with remapping to wide-input NORs, OPL yields speedups of 4× to 5× over static CMOS. Since OPL applied to static CMOS is faster than conventional domino logic, and since it has higher noise margins than domino logic, we believe it will scale much better than domino with future processing technologies.

摘要翻译： 公开了一种用于提高传统CMOS逻辑系列的速度的方法。 当应用于静态CMOS时，OPL保留了逻辑系列的恢复特性，包括其高噪声容限。 针对从栅极链到数据路径电路和随机逻辑基准测试的各种电路，展示了2x至3x（优化的）常规静态CMOS的加速。 这种加速是使用相同的网表来获得的，而不重映射。 当应用于伪nMOS和动态族时，与重新映射到宽输入NOR相结合，OPL比静态CMOS产生4倍至5倍的加速。 由于OPL应用于静态CMOS比传统的多米诺逻辑更快，并且由于它具有比多米诺逻辑更高的噪声容限，我们相信它将比未来处理技术的多米诺骨牌更好。

公开(公告)号：US20110051506A1

公开(公告)日：2011-03-03

申请号：US12551553

申请日：2009-08-31

申请人： Tyler Thorp ,  Roy E. Scheuerlein

发明人： Tyler Thorp ,  Roy E. Scheuerlein

IPC分类号： G11C11/00 ,  G11C7/00

CPC分类号： G11C13/0004 ,  G11C13/0069 ,  G11C2013/0076 ,  G11C2013/0092

摘要： Methods and apparatus are provided that include reading a plurality of sets of program pulse tuning instructions from a memory page, the memory page including a plurality of memory cells; and creating a plurality of program pulses in accordance with the plurality of sets of program pulses to program the plurality of memory cells. The plurality of sets of program pulse tuning instructions may be different from one another in at least one respect.

摘要翻译： 提供了包括从存储器页面读取多组编程脉冲调整指令的方法和装置，所述存储器页面包括多个存储器单元; 以及根据所述多组编程脉冲创建多个编程脉冲，以对所述多个存储单元进行编程。 多组编程脉冲调谐指令在至少一个方面可以彼此不同。

公开(公告)号：US07870472B2

公开(公告)日：2011-01-11

申请号：US11669918

申请日：2007-01-31

申请人： Tyler Thorp ,  Brent Haukness

发明人： Tyler Thorp ,  Brent Haukness

IPC分类号： G06F11/18 ,  G06F11/24

CPC分类号： G06F11/183 ,  G11C16/20

摘要： Systems, methods and apparatus are disclosed for employing redundant arrays to configure non-volatile memory. The present invention may include a substrate including a plurality of memory arrays, wherein the memory arrays include a data array and at least three redundant configuration arrays. The configuration arrays may each be adapted to be programmed with identical configuration information associated with operation of the data array. Majority voting logic with an output coupled to configuration inputs of the data array and inputs coupled to each of the redundant configuration arrays may be employed. The majority voting logic may be adapted to determine a configuration for the data array based upon an outcome of a majority vote function applied to the configuration information stored in the configuration arrays. Numerous other aspects are disclosed.

摘要翻译： 公开了采用冗余阵列来配置非易失性存储器的系统，方法和装置。 本发明可以包括包括多个存储器阵列的衬底，其中存储器阵列包括数据阵列和至少三个冗余配置阵列。 配置阵列可以各自适于用与数据阵列的操作相关联的相同配置信息进行编程。 可以采用多数投票逻辑，其输出耦合到数据阵列的配置输入和耦合到每个冗余配置阵列的输入。 多数投票逻辑可以适于基于应用于存储在配置数组中的配置信息的多数投票函数的结果来确定数据阵列的配置。 公开了许多其他方面。

公开(公告)号：US07870471B2

公开(公告)日：2011-01-11

申请号：US11669917

申请日：2007-01-31

申请人： Tyler Thorp ,  Brent Haukness

发明人： Tyler Thorp ,  Brent Haukness

IPC分类号： G06F11/18

CPC分类号： G06F11/183 ,  G11C16/20 ,  G11C29/74 ,  G11C29/802

摘要： Systems, methods and apparatus are disclosed for employing redundant arrays to configure non-volatile memory. The present invention may include a substrate including a plurality of memory arrays, wherein the memory arrays include a data array and at least three redundant configuration arrays. The configuration arrays may each be adapted to be programmed with identical configuration information associated with operation of the data array. Majority voting logic with an output coupled to configuration inputs of the data array and inputs coupled to each of the redundant configuration arrays may be employed. The majority voting logic may be adapted to determine a configuration for the data array based upon an outcome of a majority vote function applied to the configuration information stored in the configuration arrays. Numerous other aspects are disclosed.

公开(公告)号：US20100271894A1

公开(公告)日：2010-10-28

申请号：US12828846

申请日：2010-07-01

申请人： Tyler Thorp ,  Roy E. Scheuerlein

发明人： Tyler Thorp ,  Roy E. Scheuerlein

IPC分类号： G11C7/04

CPC分类号： G11C7/04 ,  G11C16/06

摘要： Apparatus and systems are provided for thermal regulation of a memory integrated circuit (“IC”). The apparatus and systems may include a thermal sensor on a memory IC, and a heating element coupled to the thermal sensor. The heating element is adapted to heat the memory IC in response to a signal from the thermal sensor. Other aspects are also provided.

摘要翻译： 提供了用于存储器集成电路（“IC”）的热调节的装置和系统。 该装置和系统可以包括存储器IC上的热传感器和耦合到热传感器的加热元件。 加热元件适于响应于来自热传感器的信号来加热存储器IC。 还提供其他方面。

公开(公告)号：US07558129B2

公开(公告)日：2009-07-07

申请号：US11694760

申请日：2007-03-30

申请人： Tyler Thorp ,  Ken So

发明人： Tyler Thorp ,  Ken So

IPC分类号： G11C5/14

CPC分类号： G11C5/145

摘要： Method and device for providing voltage generation with load-based control are disclosed. The voltage generation can be provided within an electronic device, such as a memory system that provides data storage. In one embodiment, an electrical load imposed on a generated voltage can be monitored and used to dynamically control strength of the generated voltage. For example, for greater electrical loads, the generated voltage can be provided with a greater strength, and for lesser electrical loads, the generated voltage can be provided with a lesser strength. By compensating the generated voltage for the nature of the imposed electrical load, the generated voltage can be provided in a stable manner across a significant range of loads. In the case of a memory system, stability in the generated voltage provides for reduced voltage ripple and thus improved sensing margins. The voltage generation is well suited for use in portable memory products (e.g., memory cards) to generate one or more internal voltages.

摘要翻译： 公开了用于提供基于负载的控制的电压产生的方法和装置。 可以在诸如提供数据存储的存储器系统的电子设备内提供电压产生。 在一个实施例中，施加在产生的电压上的电负载可以被监视并用于动态地控制所产生的电压的强度。 例如，对于更大的电负载，可以提供更高的强度，并且对于较小的电负载，可以以较小的强度提供产生的电压。 通过对施加的电负载的性质补偿所产生的电压，可以在显着的负载范围内以稳定的方式提供所产生的电压。 在存储系统的情况下，所产生的电压的稳定性提供降低的电压纹波，从而提高感测裕度。 电压产生非常适合用于便携式存储器产品（例如，存储卡）中以产生一个或多个内部电压。

公开(公告)号：US20080239856A1

公开(公告)日：2008-10-02

申请号：US11694798

申请日：2007-03-30

申请人： Tyler Thorp ,  Ken So

发明人： Tyler Thorp ,  Ken So

IPC分类号： G11C5/14

CPC分类号： G11C5/147 ,  G11C5/143 ,  G11C5/145

摘要： Method and device for providing voltage generation with load-based control are disclosed. The voltage generation can be provided within an electronic device, such as a memory system that provides data storage. In one embodiment, an electrical load imposed on a generated voltage can be monitored and used to dynamically control strength of the generated voltage. For example, for greater electrical loads, the generated voltage can be provided with a greater strength, and for lesser electrical loads, the generated voltage can be provided with a lesser strength. By compensating the generated voltage for the nature of the imposed electrical load, the generated voltage can be provided in a stable manner across a significant range of loads. In the case of a memory system, stability in the generated voltage provides for reduced voltage ripple and thus improved sensing margins. The voltage generation is well suited for use in portable memory products (e.g., memory cards) to generate one or more internal voltages.

摘要翻译： 公开了用于提供基于负载的控制的电压产生的方法和装置。 可以在诸如提供数据存储的存储器系统的电子设备内提供电压产生。 在一个实施例中，施加在产生的电压上的电负载可以被监视并用于动态地控制所产生的电压的强度。 例如，对于更大的电负载，可以提供更高的强度，并且对于较小的电负载，可以以较小的强度提供产生的电压。 通过对施加的电负载的性质补偿所产生的电压，可以在显着的负载范围内以稳定的方式提供所产生的电压。 在存储系统的情况下，所产生的电压的稳定性提供降低的电压纹波，从而提高感测裕度。 电压产生非常适合用于便携式存储器产品（例如，存储卡）中以产生一个或多个内部电压。

公开(公告)号：US20070216448A1

公开(公告)日：2007-09-20

申请号：US11752807

申请日：2007-05-23

申请人： Tyler Thorp ,  Mark Johnson ,  Brent Haukness

发明人： Tyler Thorp ,  Mark Johnson ,  Brent Haukness

IPC分类号： H03K17/00

CPC分类号： H03K5/153 ,  H03K17/145 ,  H03K17/223

摘要： Apparatus are described for providing an adaptive trip point detector circuit that receives an input signal at an input signal node and generates an output signal at an output signal node, the output signal changing from a first value to a second value when the input signal exceeds a trip point reference value. In particular, the trip point reference value is adjusted to compensate for variations in process or temperature.

摘要翻译： 描述了用于提供自适应跳变点检测器电路的装置，其接收输入信号节点处的输入信号并在输出信号节点处产生输出信号，当输入信号超过一个输入信号时，该输出信号从第一值变为第二值 跳点参考值。 特别地，调整跳变点参考值以补偿过程或温度的变化。

公开(公告)号：US06694493B2

公开(公告)日：2004-02-17

申请号：US09992515

申请日：2001-11-14

申请人： Sudhakar Bobba ,  Tyler Thorp

发明人： Sudhakar Bobba ,  Tyler Thorp

IPC分类号： G06F1750

CPC分类号： G06F17/5036

摘要： A method and apparatus for assigning decoupling capacitors on an integrated circuit such that leakage power is minimized is provided. Particularly, the method and apparatus use an available capacitance area of an integrated circuit, a capacitance requirement of the integrated circuit, an available thin-oxide capacitance amount, and an available thick-oxide capacitance amount to generate an assignment that indicates what percentage of the available capacitance area should be filled with thin-oxide capacitors and what percentage of the available capacitance area should be filled with thick-oxide capacitors in order to meet the capacitance requirement and minimize leakage power attributable to the thin-oxide and thick-oxide capacitors.

摘要翻译： 一种用于在集成电路上分配去耦电容器的方法和装置，使得漏电功率最小化。 特别地，该方法和装置使用集成电路的可用电容区域，集成电路的电容需求，可用的薄氧化物电容量和可用的厚氧化物电容量，以产生指示哪个百分比的 应填充薄膜电容器，用厚氧化物电容填充可用电容面积百分比，以满足电容要求，并最大限度地减少归结于薄氧化物和厚氧化物电容器的漏电功率。

公开(公告)号：US06577002B1

公开(公告)日：2003-06-10

申请号：US09997452

申请日：2001-11-29

申请人： Sudhakar Bobba ,  Tyler Thorp ,  Pradeep Trivedi

发明人： Sudhakar Bobba ,  Tyler Thorp ,  Pradeep Trivedi

IPC分类号： H01L23495

CPC分类号： H01L23/50 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/13099 ,  H01L2224/1413 ,  H01L2224/14133 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/30107 ,  H05K1/0263 ,  H05K1/111 ,  H05K3/3436 ,  H01L2924/00012

摘要： A 180 degree bump placement layout for an integrated circuit power grid is provided. This layout improves integrated circuit performance and reliability and gives an integrated circuit designer added flexibility and uniformity in designing the integrated circuit. Further, a patterned bump array for a top metal layer of an integrated circuit having a plurality of 180 degree bump placement structures is provided.

摘要翻译： 提供集成电路电网的180度凸块布置布局。 这种布局提高了集成电路的性能和可靠性，并为集成电路设计人员增加了设计集成电路的灵活性和均匀性。 此外，提供了具有多个180度凸块放置结构的集成电路的顶部金属层的图案化凸块阵列。