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公开(公告)号：US08294534B2
公开(公告)日：2012-10-23
申请号：US12888185
申请日：2010-09-22
申请人： Casper van der Avoort , Jozef Thomas Martinus Van Beek , Johannes van Wingerden , Joep Bontemps , Robert James Pascoe Lander
发明人： Casper van der Avoort , Jozef Thomas Martinus Van Beek , Johannes van Wingerden , Joep Bontemps , Robert James Pascoe Lander
CPC分类号： H03H9/02448 , H03H3/0076 , H03H9/2447 , H03H9/2473 , H03H9/2489
摘要： A resonator comprising a beam formed from a first material having a first Young's modulus and a first temperature coefficient of the first Young's modulus, and a second material having a second Young's modulus and a second temperature coefficient of the second Young's modulus, a sign of the second temperature coefficient being opposite to a sign of the first temperature coefficient at least within operating conditions of the resonator, wherein the ratio of the cross sectional area of the first material to the cross sectional area of the second material varies along the length of the beam, the cross sectional areas being measured substantially perpendicularly to the beam.
摘要翻译： 一种谐振器，包括由具有第一杨氏模量和第一杨氏模量的第一温度系数的第一材料形成的梁，以及具有第二杨氏模量和第二杨氏模量的第二温度系数的第二材料， 所述第二温度系数至少在所述谐振器的操作条件下与所述第一温度系数的符号相反，其中所述第一材料的横截面积与所述第二材料的横截面面积的比率沿着所述梁的长度变化 横截面面积基本上垂直于梁测量。
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公开(公告)号：US08283231B2
公开(公告)日：2012-10-09
申请号：US12483133
申请日：2009-06-11
IPC分类号： H01L27/088 , H01L21/336
CPC分类号： H01L27/1104 , H01L21/823418 , H01L21/823431 , H01L21/823437 , H01L27/088 , H01L27/0886 , H01L27/11 , H01L29/0847 , H01L29/6659 , H01L29/66681 , H01L29/66795 , H01L29/7817 , H01L29/7834 , H01L29/785
摘要： A method and circuit in which the drive strength of a FinFET transistor can be selectively modified, and in particular can be selectively reduced, by omitting the LDD extension formation in the source and/or in the drain of the FinFET.One application of this approach is to enable differentiation of the drive strengths of transistors in an integrated circuit by applying the technique to some, but not all, of the transistors in the integrated circuit. In particular in a SRAM cell formed from FinFET transistors the application of the technique to the pass-gate transistors, which leads to a reduction of the drive strength of the pass-gate transistors relative to the drive strength of the pull-up and pull-down transistors, results in improved SRAM cell performance.
摘要翻译： 通过省略FinFET的源极和/或漏极中的LDD延伸形成，可以选择性地修改FinFET晶体管的驱动强度，特别是可以选择性地降低其驱动强度的方法和电路。 该方法的一个应用是通过将该技术应用于集成电路中的一些但不是全部的晶体管来实现集成电路中的晶体管的驱动强度的区分。 特别是在由FinFET晶体管形成的SRAM单元中，将技术应用于栅极晶体管，这导致了通过栅极晶体管的驱动强度相对于上拉和下拉的驱动强度的降低， 降低晶体管，从而提高SRAM单元性能。
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公开(公告)号：US08390387B2
公开(公告)日：2013-03-05
申请号：US13156485
申请日：2011-06-09
CPC分类号： H03H3/0076 , H03H9/02448 , H03H9/2405 , H03H2009/02307
摘要： A crystalline semiconductor resonator device comprises two matched resonators which are aligned differently with respect to the crystal structure of the crystalline semiconductor. The resonators each comprise a portion of a material having a different temperature dependency of the Young's modulus to the temperature dependency of the Young's modulus of the crystalline semiconductor material. In this way, the suspension springs for the resonators have different properties, which influence the resonant frequency. The resonant frequency ratios between the first and second resonators at a calibration temperature and an operation temperature are measured. A frequency of one (or both) of the resonators at the operation temperature can then be derived which takes into account the temperature dependency of the one of the resonators.
摘要翻译： 晶体半导体谐振器装置包括两个匹配的谐振器，其相对于晶体半导体的晶体结构不同地排列。 谐振器各自包括具有与结晶半导体材料的杨氏模量的杨氏模量与温度依赖性不同的温度依赖性的材料的一部分。 以这种方式，用于谐振器的悬架弹簧具有不同的性质，这影响谐振频率。 在校准温度和操作温度下测量第一和第二谐振器之间的谐振频率比。 然后可以导出在操作温度下的一个（或两个）谐振器的频率，其考虑到一个谐振器的温度依赖性。
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4.发明授权Semidonductor device having stressed metal gate and methods of manufacturing same 有权具有应力金属栅的半导体器件及其制造方法公开(公告)号：US08368149B2
公开(公告)日：2013-02-05
申请号：US13525697
申请日：2012-06-18
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/785 , H01L29/66795 , H01L29/7845
摘要： The present disclosure provides various embodiments of a semiconductor device and method of fabricating the semiconductor device. An exemplary semiconductor device includes a semiconductor substrate and a gate stack disposed over the semiconductor substrate. The gate stack includes a gate dielectric layer disposed over the semiconductor substrate and a tuned, stressed metal gate layer disposed over the gate dielectric layer. The tuned, stressed metal gate layer includes a stress that distributes strain differently to portions of the semiconductor substrate having different surface characteristics. In an example, the gate stack is disposed over a portion of a fin of the semiconductor substrate, and the fin has a varying thickness, providing a fin with a roughened surface. The tuned, stressed metal gate layer includes a stress that distributes strain differently to portions of the fin having different thicknesses.
摘要翻译： 本公开提供了半导体器件的各种实施例以及制造半导体器件的方法。 示例性半导体器件包括设置在半导体衬底上的半导体衬底和栅极堆叠。 栅极堆叠包括设置在半导体衬底上的栅极电介质层和设置在栅极电介质层上方的调谐应力金属栅极层。 调谐的应力金属栅极层包括将应变分配给具有不同表面特性的半导体衬底的部分的应力。 在一个示例中，栅极堆叠设置在半导体衬底的鳍片的一部分上，并且鳍片具有变化的厚度，从而提供具有粗糙表面的翅片。 经调谐的受应力的金属栅极层包括将应变不同地分配给具有不同厚度的鳍的部分的应力。
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公开(公告)号：US08179201B2
公开(公告)日：2012-05-15
申请号：US12892672
申请日：2010-09-28
CPC分类号： H03H9/02448 , B81B3/0072 , B81B2201/0271 , B81B2203/0118 , H03H9/2447 , Y10T29/49002
摘要： A resonator having an effective spring constant (kz) and comprising a beam having a beam spring constant (kB) adapted to resonate in an oscillation direction, and extending at a non-zero angle (θ) to the oscillation direction, wherein the resonator has a predetermined geometry and is formed from one or more materials, the or each material having a coefficient of thermal expansion (CTE), the CTE of the or each material together with the predetermined geometry of the resonator causing θ to vary with temperature, such that the temperature dependence of the beam spring constant is compensated for, resulting in the effective spring constant of the resonator remaining substantially constant within an operating temperature range.
摘要翻译： 一种具有有效弹簧常数（kz）并且包括具有适于在振荡方向上谐振并且以非零角度（θ）延伸到振荡方向的光束弹簧常数（kB）的光束的谐振器，其中所述谐振器 具有预定的几何形状并且由一种或多种材料形成，所述材料或每种材料具有热膨胀系数（CTE），所述材料的每个材料的CTE以及所述谐振器的预定几何形状引起所述材料; 随着温度而变化，使得光束弹簧常数的温度依赖性被补偿，导致共振器的有效弹簧常数在工作温度范围内保持基本恒定。
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公开(公告)号：US20110079852A1
公开(公告)日：2011-04-07
申请号：US12575082
申请日：2009-10-07
IPC分类号： H01L29/06 , H01L21/762 , H01L21/336 , H01L29/78
CPC分类号： H01L29/785 , H01L29/66795 , H01L29/7845
摘要： The present disclosure provides a semiconductor device and method of fabricating a semiconductor device. In an embodiment, the semiconductor device is a finFET device. In an embodiment, the semiconductor device is a silicon on insulator (SOI) device. A method of fabricating the semiconductor device includes providing a substrate, forming an oxide layer on the substrate, forming a fin on a portion of the oxide layer, forming a high k dielectric layer on a portion of the oxide layer and on a portion of the fin, forming a tuned, stressed metal gate on the dielectric layer, and forming a poly-cap on the metal gate. The method of fabrication provided may allow use of SOI substrate or bulk silicon substrates.
摘要翻译： 本发明提供一种制造半导体器件的半导体器件和方法。 在一个实施例中，半导体器件是finFET器件。 在一个实施例中，半导体器件是绝缘体上硅（SOI）器件。 制造半导体器件的方法包括提供衬底，在衬底上形成氧化物层，在氧化物层的一部分上形成翅片，在氧化物层的一部分上形成高k电介质层， 在电介质层上形成调谐应力金属栅极，并在金属栅极上形成多晶硅盖。 提供的制造方法可以允许使用SOI衬底或体硅衬底。
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7.发明授权Method of manufacturing a semiconductor device and semiconductor device obtained by means of such a method 有权通过这种方法获得的制造半导体器件和半导体器件的方法公开(公告)号：US07157337B2
公开(公告)日：2007-01-02
申请号：US10544412
申请日：2004-01-16
IPC分类号： H01L21/8234 , H01L21/8238 , H01L21/20 , H01L21/4763
CPC分类号： H01L21/823842 , Y10S438/976
摘要： Consistent with an example embodiment according to the invention, a material for the intermediate layer is chosen which can be selectively etched with respect to the dielectric layer. Before the deposition of the first conductor layer, the intermediate layer is removed at the location of the first channel region, and after the deposition of the first conductor layer and the removal thereof outside the first channel region and before the deposition of the second conductor layer, the intermediate layer is removed at the location of the second channel region. Thus, field effect transistors (FETs) are obtained in a simple manner and without damage to their gate dielectric. Preferably, a further intermediate layer is deposited on the intermediate layer which can be selectively etched with respect thereto.
摘要翻译： 与根据本发明的示例实施例一致，选择可以相对于电介质层选择性地蚀刻用于中间层的材料。 在第一导体层的沉积之前，中间层在第一沟道区的位置处被去除，并且在第一导体层的沉积之后并将其去除在第一沟道区之外并且在第二导体层的沉积之前 ，在第二通道区域的位置处去除中间层。 因此，以简单的方式获得场效应晶体管（FET），而不损害其栅极电介质。 优选地，在中间层上沉积另外的中间层，所述中间层可以相对于其选择性地蚀刻。
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8.发明申请SEMIDONDUCTOR DEVICE HAVING STRESSED METAL GATE AND METHODS OF MANUFACTURING SAME 有权具有应力金属门的半导体器件及其制造方法公开(公告)号：US20120248536A1
公开(公告)日：2012-10-04
申请号：US13525697
申请日：2012-06-18
IPC分类号： H01L29/786
CPC分类号： H01L29/785 , H01L29/66795 , H01L29/7845
摘要： The present disclosure provides various embodiments of a semiconductor device and method of fabricating the semiconductor device. An exemplary semiconductor device includes a semiconductor substrate and a gate stack disposed over the semiconductor substrate. The gate stack includes a gate dielectric layer disposed over the semiconductor substrate and a tuned, stressed metal gate layer disposed over the gate dielectric layer. The tuned, stressed metal gate layer includes a stress that distributes strain differently to portions of the semiconductor substrate having different surface characteristics. In an example, the gate stack is disposed over a portion of a fin of the semiconductor substrate, and the fin has a varying thickness, providing a fin with a roughened surface. The tuned, stressed metal gate layer includes a stress that distributes strain differently to portions of the fin having different thicknesses.
摘要翻译： 本公开提供了半导体器件的各种实施例以及制造半导体器件的方法。 示例性半导体器件包括设置在半导体衬底上的半导体衬底和栅极堆叠。 栅极堆叠包括设置在半导体衬底上的栅极电介质层和设置在栅极电介质层上方的调谐应力金属栅极层。 调谐的应力金属栅极层包括将应变分配给具有不同表面特性的半导体衬底的部分的应力。 在一个示例中，栅极堆叠设置在半导体衬底的鳍片的一部分上，并且鳍片具有变化的厚度，从而提供具有粗糙表面的翅片。 经调谐的受应力的金属栅极层包括将应变不同地分配给具有不同厚度的鳍的部分的应力。
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公开(公告)号：US20110304405A1
公开(公告)日：2011-12-15
申请号：US13156485
申请日：2011-06-09
IPC分类号： H03B5/30
CPC分类号： H03H3/0076 , H03H9/02448 , H03H9/2405 , H03H2009/02307
摘要： A crystalline semiconductor resonator device comprises two matched resonators which are aligned differently with respect to the crystal structure of the crystalline semiconductor. The resonators each comprise a portion of a material having a different temperature dependency of the Young's modulus to the temperature dependency of the Young's modulus of the crystalline semiconductor material. In this way, the suspension springs for the resonators have different properties, which influence the resonant frequency. The resonant frequency ratios between the first and second resonators at a calibration temperature and an operation temperature are measured. A frequency of one (or both) of the resonators at the operation temperature can then be derived which takes into account the temperature dependency of the one of the resonators.
摘要翻译： 晶体半导体谐振器装置包括两个匹配的谐振器，其相对于晶体半导体的晶体结构不同地排列。 谐振器各自包括具有与结晶半导体材料的杨氏模量的杨氏模量与温度依赖性不同的温度依赖性的材料的一部分。 以这种方式，用于谐振器的悬架弹簧具有不同的性质，这影响谐振频率。 在校准温度和操作温度下测量第一和第二谐振器之间的谐振频率比。 然后可以导出在操作温度下的一个（或两个）谐振器的频率，其考虑到一个谐振器的温度依赖性。
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公开(公告)号：US08202768B2
公开(公告)日：2012-06-19
申请号：US12575082
申请日：2009-10-07
CPC分类号： H01L29/785 , H01L29/66795 , H01L29/7845
摘要： The present disclosure provides a semiconductor device and method of fabricating a semiconductor device. In an embodiment, the semiconductor device is a finFET device. In an embodiment, the semiconductor device is a silicon on insulator (SOI) device. A method of fabricating the semiconductor device includes providing a substrate, forming an oxide layer on the substrate, forming a fin on a portion of the oxide layer, forming a high k dielectric layer on a portion of the oxide layer and on a portion of the fin, forming a tuned, stressed metal gate on the dielectric layer, and forming a poly-cap on the metal gate. The method of fabrication provided may allow use of SOI substrate or bulk silicon substrates.
摘要翻译： 本发明提供一种制造半导体器件的半导体器件和方法。 在一个实施例中，半导体器件是finFET器件。 在一个实施例中，半导体器件是绝缘体上硅（SOI）器件。 制造半导体器件的方法包括提供衬底，在衬底上形成氧化物层，在氧化物层的一部分上形成翅片，在氧化物层的一部分上形成高k电介质层， 在电介质层上形成调谐应力金属栅极，并在金属栅极上形成多晶硅盖。 提供的制造方法可以允许使用SOI衬底或体硅衬底。
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