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    USB-controllable power supply
    2.
    发明授权
    USB-controllable power supply 有权
    USB可控电源

    公开(公告)号：US06904373B2

    公开(公告)日：2005-06-07

    申请号：US10261118

    申请日：2002-09-30

    申请人： Chanh Le ,  Say Cheong Gan

    发明人： Chanh Le ,  Say Cheong Gan

    IPC分类号： G06F1/26 ,  G06F19/00

    CPC分类号： G06F1/266

    摘要： A USB (universal serial bus) controllable power supply and method for supplying power to a circuit board device under test (DUT) via a controllable power supply. The power supply employs a USB interface to communicate with external devices, such as a host computer. In response to power supply control commands from the host computer, the controllable power supply provides various power outputs at various external connectors, including main power, ATX12V power, and peripheral power to be used for peripheral devices corresponding to a DUT test apparatus. The controllable power supply also provides a built-in short circuit check function, and monitors the voltage levels of its power outputs to ensure they are within predefined limits. The power supply also supports emergency shutdown operations, and provides an EOS (emergency overstress) function. In one embodiment, the power supply includes an integrated USB hub.

    摘要翻译： USB（通用串行总线）可控电源和通过可控电源向待测电路板（DUT）供电的方法。 电源采用USB接口与诸如主机的外部设备进行通信。 响应于来自主计算机的电源控制命令，可控电源在各种外部连接器提供各种功率输出，包括主要功率，ATX12V功率和用于对应于DUT测试设备的外围设备的外围设备。 可控电源还提供内置的短路检查功能，并监视其电源输出的电压电平，以确保其在预定义的限制内。 电源还支持紧急关机操作，并提供EOS（紧急超程）功能。 在一个实施例中，电源包括集成的USB集线器。

    Universal automated circuit board tester
    3.
    发明授权
    Universal automated circuit board tester 失效
    通用自动化电路板测试仪

    公开(公告)号：US07154257B2

    公开(公告)日：2006-12-26

    申请号：US10261055

    申请日：2002-09-30

    申请人： Chanh Le ,  Say Cheong Gan ,  Thomas A. Repko ,  Frank W. Joyce ,  Teik Sean Toh ,  Douglas P. Kreager ,  Yoong Li Liew

    发明人： Chanh Le ,  Say Cheong Gan ,  Thomas A. Repko ,  Frank W. Joyce ,  Teik Sean Toh ,  Douglas P. Kreager ,  Yoong Li Liew

    IPC分类号： G01R31/28

    CPC分类号： G01R31/2808

    摘要： An apparatus and method for automatically testing circuit boards, such as computer system boards and the like. The circuit board device under test (DUT) is loaded into an automated test apparatus (tester), which includes a mechanism for automatically connecting test electronics to various DUT circuitry and I/O ports via corresponding connectors on the DUT. A type of DUT is identified, and a corresponding set of tests are performed to verify the operation of the DUT. Appropriate power signals and sequencing are also applied to the DUT, as defined by it type. Data logging is performed to log the results of the testing. The apparatus includes replaceable probe/connector plates that are DUT-type specific and corresponding universal electronics and cabling to enable a variety of different board types to be tested with the same apparatus.

    摘要翻译： 用于自动测试诸如计算机系统板等的电路板的装置和方法。 被测电路板设备（DUT）被装载到自动测试设备（测试仪）中，该测试设备包括一个用于通过DUT上的相应连接器将测试电路自动连接到各种DUT电路和I / O端口的机构。 识别一种类型的DUT，并执行相应的一组测试以验证DUT的操作。 适当的功率信号和顺序也适用于DUT，如其类型所定义的。 执行数据记录以记录测试结果。 该装置包括可替换的探针/连接器板，其是DUT型特定的和相应的通用电子器件和布线，以使得可以使用相同的装置来测试各种不同的板类型。

    SYSTEM AND METHOD FOR PROVIDING POWER SAVINGS IN A PROCESSOR ENVIRONMENT
    4.
    发明申请
    SYSTEM AND METHOD FOR PROVIDING POWER SAVINGS IN A PROCESSOR ENVIRONMENT 有权
    在处理器环境中提供节电的系统和方法

    公开(公告)号：US20140195835A1

    公开(公告)日：2014-07-10

    申请号：US13734577

    申请日：2013-01-04

    申请人： Sun Zheng E. ,  Ting Lok Song ,  Poh Thiam Teoh ,  Jennifer Chin ,  Say Cheong Gan ,  Sujea Lim ,  Su Wei Lim

    发明人： Sun Zheng E. ,  Ting Lok Song ,  Poh Thiam Teoh ,  Jennifer Chin ,  Say Cheong Gan ,  Sujea Lim ,  Su Wei Lim

    IPC分类号： G06F1/32

    CPC分类号： G06F1/3253 ,  Y02D10/151 ,  Y02D50/20

    摘要： Particular embodiments described herein can offer a method that includes powering down a root port; initiating a first downstream cycle by a central processing unit (CPU) to the root port; identifying a power up activity for the CPU; and triggering an exit flow for a power state in conjunction with sending a second downstream cycle to the root port. In more particular embodiments, the triggering of the exit flow for the power state and the sending of the second downstream cycle to the root port occurs in a substantially parallel fashion. In addition, a prewake indicator can be sent to the root port to trigger the exit flow before the CPU is powered up and the second downstream cycle is sent.

    摘要翻译： 本文描述的特定实施例可以提供一种方法，其包括断电根端口; 通过中央处理单元（CPU）向根端口发起第一下游循环; 识别CPU的加电活动; 并且触发用于电力状态的退出流，同时向根端口发送第二下游循环。 在更具体的实施例中，用于功率状态的出口流的触发和将第二下游循环发送到根端口以基本上平行的方式发生。 另外，在CPU上电并发送第二个下游周期之前，可以将根据端口发送预取指示符以触发退出流。