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    SYSTEM AND METHOD FOR PROVIDING POWER SAVINGS IN A PROCESSOR ENVIRONMENT
    2.
    发明申请
    SYSTEM AND METHOD FOR PROVIDING POWER SAVINGS IN A PROCESSOR ENVIRONMENT 有权
    在处理器环境中提供节电的系统和方法

    公开(公告)号：US20140195835A1

    公开(公告)日：2014-07-10

    申请号：US13734577

    申请日：2013-01-04

    申请人： Sun Zheng E. ,  Ting Lok Song ,  Poh Thiam Teoh ,  Jennifer Chin ,  Say Cheong Gan ,  Sujea Lim ,  Su Wei Lim

    发明人： Sun Zheng E. ,  Ting Lok Song ,  Poh Thiam Teoh ,  Jennifer Chin ,  Say Cheong Gan ,  Sujea Lim ,  Su Wei Lim

    IPC分类号： G06F1/32

    CPC分类号： G06F1/3253 ,  Y02D10/151 ,  Y02D50/20

    摘要： Particular embodiments described herein can offer a method that includes powering down a root port; initiating a first downstream cycle by a central processing unit (CPU) to the root port; identifying a power up activity for the CPU; and triggering an exit flow for a power state in conjunction with sending a second downstream cycle to the root port. In more particular embodiments, the triggering of the exit flow for the power state and the sending of the second downstream cycle to the root port occurs in a substantially parallel fashion. In addition, a prewake indicator can be sent to the root port to trigger the exit flow before the CPU is powered up and the second downstream cycle is sent.

    摘要翻译： 本文描述的特定实施例可以提供一种方法，其包括断电根端口; 通过中央处理单元（CPU）向根端口发起第一下游循环; 识别CPU的加电活动; 并且触发用于电力状态的退出流，同时向根端口发送第二下游循环。 在更具体的实施例中，用于功率状态的出口流的触发和将第二下游循环发送到根端口以基本上平行的方式发生。 另外，在CPU上电并发送第二个下游周期之前，可以将根据端口发送预取指示符以触发退出流。

    BAND DYNAMIC SWITCHING BETWEEN TWO BUS STANDARDS
    3.
    发明申请
    BAND DYNAMIC SWITCHING BETWEEN TWO BUS STANDARDS 审中-公开
    两个总线标准之间的带动态切换

    公开(公告)号：US20140181356A1

    公开(公告)日：2014-06-26

    申请号：US14194893

    申请日：2014-03-03

    申请人： Ting Lok Song ,  Su Wei Lim ,  Mikal Hunsaker ,  Hooi Kar Loo

    发明人： Ting Lok Song ,  Su Wei Lim ,  Mikal Hunsaker ,  Hooi Kar Loo

    IPC分类号： G06F13/40

    CPC分类号： G06F13/4022 ,  G06F13/385 ,  G06F13/387 ,  G06F13/4027 ,  G06F13/4282

    摘要： In some embodiments, an electronic system includes a processor, a memory in communication with the processor, a bus in communication with the processor, an Express Card controller coupled to the bus, the Express Card controller providing an interface to an external device, a USB3 controller coupled to the bus and in communication with the Express Card controller, and a PCIE controller coupled to the bus and in communication with the Express Card controller. The Express Card controller may be configured to determine whether the external device is a USB3 device or a PCIE device and to switch between the USB3 controller and the PCIE controller based on the state of a USB3 select pin strap. Other embodiments are disclosed and claimed.

    摘要翻译： 在一些实施例中，电子系统包括处理器，与处理器通信的存储器，与处理器通信的总线，耦合到总线的Express卡控制器，提供与外部设备的接口的Express卡控制器，USB3 控制器耦合到总线并与Express卡控制器通信，以及耦合到总线并与Express卡控制器通信的PCIE控制器。 Express卡控制器可以被配置为基于USB3选择引脚带的状态来确定外部设备是USB3设备还是PCIE设备，并且在USB3控制器和PCIE控制器之间切换。 公开和要求保护其他实施例。

    In band dynamic switching between two bus standards
    4.
    发明申请
    In band dynamic switching between two bus standards 有权
    两段总线标准之间的带内动态切换

    公开(公告)号：US20120166691A1

    公开(公告)日：2012-06-28

    申请号：US12928906

    申请日：2010-12-22

    申请人： Ting Lok Song ,  Su Wei Lim ,  Mikal Hunsaker ,  Hooi Kar Loo

    发明人： Ting Lok Song ,  Su Wei Lim ,  Mikal Hunsaker ,  Hooi Kar Loo

    IPC分类号： G06F13/42 ,  G06F13/36

    CPC分类号： G06F13/4022 ,  G06F13/385 ,  G06F13/387 ,  G06F13/4027 ,  G06F13/4282

    摘要： In some embodiments, an electronic system includes a processor, a memory in communication with the processor, a bus in communication with the processor, an Express Card controller coupled to the bus, the Express Card controller providing an interface to an external device, a USB3 controller coupled to the bus and in communication with the Express Card controller, and a PCIE controller coupled to the bus and in communication with the Express Card controller. The Express Card controller may be configured to determine whether the external device is a USB3 device or a PCIE device and to switch between the USB3 controller and the PCIE controller based on the state of a USB3 select pin strap. Other embodiments are disclosed and claimed.

    摘要翻译： 在一些实施例中，电子系统包括处理器，与处理器通信的存储器，与处理器通信的总线，耦合到总线的Express卡控制器，提供与外部设备的接口的Express卡控制器，USB3 控制器耦合到总线并与Express卡控制器通信，以及耦合到总线并与Express卡控制器通信的PCIE控制器。 Express卡控制器可以被配置为基于USB3选择引脚带的状态来确定外部设备是USB3设备还是PCIE设备，并且在USB3控制器和PCIE控制器之间切换。 公开和要求保护其他实施例。

    Dual bus standard switching bus controller
    5.
    发明授权
    Dual bus standard switching bus controller 有权
    双总线标准交换总线控制器

    公开(公告)号：US08706944B2

    公开(公告)日：2014-04-22

    申请号：US12928906

    申请日：2010-12-22

    申请人： Ting Lok Song ,  Su Wei Lim ,  Mikal Hunsaker ,  Hooi Kar Loo

    发明人： Ting Lok Song ,  Su Wei Lim ,  Mikal Hunsaker ,  Hooi Kar Loo

    IPC分类号： G06F13/20 ,  G06F13/38

    CPC分类号： G06F13/4022 ,  G06F13/385 ,  G06F13/387 ,  G06F13/4027 ,  G06F13/4282

    摘要： In some embodiments, an electronic system includes a processor, a memory in communication with the processor, a bus in communication with the processor, an Express Card controller coupled to the bus, the Express Card controller providing an interface to an external device, a USB3 controller coupled to the bus and in communication with the Express Card controller, and a PCIE controller coupled to the bus and in communication with the Express Card controller. The Express Card controller may be configured to determine whether the external device is a USB3 device or a PCIE device and to switch between the USB3 controller and the PCIE controller based on the state of a USB3 select pin strap. Other embodiments are disclosed and claimed.

    摘要翻译： 在一些实施例中，电子系统包括处理器，与处理器通信的存储器，与处理器通信的总线，耦合到总线的Express卡控制器，提供与外部设备的接口的Express卡控制器，USB3 控制器耦合到总线并与Express卡控制器通信，以及耦合到总线并与Express卡控制器通信的PCIE控制器。 Express卡控制器可以被配置为基于USB3选择引脚带的状态来确定外部设备是USB3设备还是PCIE设备，并且在USB3控制器和PCIE控制器之间切换。 公开和要求保护其他实施例。