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    INTEGRATED CIRCUIT AND PROCESS FOR FABRICATING THEREOF
    2.
    发明申请
    INTEGRATED CIRCUIT AND PROCESS FOR FABRICATING THEREOF 有权
    集成电路及其制造方法

    公开(公告)号：US20090108455A1

    公开(公告)日：2009-04-30

    申请号：US11923194

    申请日：2007-10-24

    申请人： Charan Gurumurthy ,  Islam Salama ,  Houssam Jomaa ,  Ravi Tanikella

    发明人： Charan Gurumurthy ,  Islam Salama ,  Houssam Jomaa ,  Ravi Tanikella

    IPC分类号： H01L23/52 ,  H01L21/44

    CPC分类号： H01L21/76879 ,  H01L21/288 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76846 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A process for fabricating an Integrated Circuit (IC) and the IC formed thereby is disclosed. The process comprises providing a substrate. The process further comprises forming a plurality of longitudinal trenches in the substrate and depositing a layer of a first conductive material on at least one longitudinal trench of the plurality of longitudinal trenches. A first layer of a second conductive material is deposited on the layer of the first conductive material. Thereafter, the process includes depositing a second layer of the second conductive material on the first layer of the second conductive material. The second layer of the second conductive material at least partially fills the at least one longitudinal trench. The first conductive material is selected such that a reduction potential of the first conductive material is less than a reduction potential of the second conductive material.

    摘要翻译： 公开了一种用于制造集成电路（IC）的工艺和由此形成的IC。 该方法包括提供基底。 该方法还包括在衬底中形成多个纵向沟槽，并在多个纵向沟槽的至少一个纵向沟槽上沉积第一导电材料层。 第一导电材料层的第一层沉积在第一导电材料的层上。 此后，该方法包括在第二导电材料的第一层上沉积第二导电材料层。 第二导电材料的第二层至少部分地填充至少一个纵向沟槽。 选择第一导电材料使得第一导电材料的还原电位小于第二导电材料的还原电位。

    INTEGRATED CIRCUIT AND PROCESS FOR FABRICATING THEREOF
    3.
    发明申请
    INTEGRATED CIRCUIT AND PROCESS FOR FABRICATING THEREOF 审中-公开
    集成电路及其制造方法

    公开(公告)号：US20110298135A1

    公开(公告)日：2011-12-08

    申请号：US13211062

    申请日：2011-08-16

    申请人： Charan Gurumurthy ,  Islam Salama ,  Houssam Jomaa ,  Ravi Tanikella

    发明人： Charan Gurumurthy ,  Islam Salama ,  Houssam Jomaa ,  Ravi Tanikella

    IPC分类号： H01L23/48

    CPC分类号： H01L21/76879 ,  H01L21/288 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76846 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A process for fabricating an Integrated Circuit (IC) and the IC formed thereby is disclosed. The process comprises providing a substrate. The process further comprises forming a plurality of longitudinal trenches in the substrate and depositing a layer of a first conductive material on at least one longitudinal trench of the plurality of longitudinal trenches. A first layer of a second conductive material is deposited on the layer of the first conductive material. Thereafter, the process includes depositing a second layer of the second conductive material on the first layer of the second conductive material. The second layer of the second conductive material at least partially fills the at least one longitudinal trench. The first conductive material is selected such that a reduction potential of the first conductive material is less than a reduction potential of the second conductive material.

    摘要翻译： 公开了一种用于制造集成电路（IC）的工艺和由此形成的IC。 该方法包括提供基底。 该方法还包括在衬底中形成多个纵向沟槽，并在多个纵向沟槽的至少一个纵向沟槽上沉积第一导电材料层。 第一导电材料层的第一层沉积在第一导电材料的层上。 此后，该方法包括在第二导电材料的第一层上沉积第二导电材料层。 第二导电材料的第二层至少部分地填充至少一个纵向沟槽。 选择第一导电材料使得第一导电材料的还原电位小于第二导电材料的还原电位。

    Integrated circuit and process for fabricating thereof
    4.
    发明授权
    Integrated circuit and process for fabricating thereof 有权
    集成电路及其制造方法

    公开(公告)号：US07998857B2

    公开(公告)日：2011-08-16

    申请号：US11923194

    申请日：2007-10-24

    申请人： Charan Gurumurthy ,  Islam Salama ,  Houssam Jomaa ,  Ravi Tanikella

    发明人： Charan Gurumurthy ,  Islam Salama ,  Houssam Jomaa ,  Ravi Tanikella

    IPC分类号： H01L23/58

    CPC分类号： H01L21/76879 ,  H01L21/288 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76846 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A process for fabricating an Integrated Circuit (IC) and the IC formed thereby is disclosed. The process comprises providing a substrate. The process further comprises forming a plurality of longitudinal trenches in the substrate and depositing a layer of a first conductive material on at least one longitudinal trench of the plurality of longitudinal trenches. A first layer of a second conductive material is deposited on the layer of the first conductive material. Thereafter, the process includes depositing a second layer of the second conductive material on the first layer of the second conductive material. The second layer of the second conductive material at least partially fills the at least one longitudinal trench. The first conductive material is selected such that a reduction potential of the first conductive material is less than a reduction potential of the second conductive material.

    摘要翻译： 公开了一种用于制造集成电路（IC）的工艺和由此形成的IC。 该方法包括提供基底。 该方法还包括在衬底中形成多个纵向沟槽，并在多个纵向沟槽的至少一个纵向沟槽上沉积第一导电材料层。 第一导电材料层的第一层沉积在第一导电材料的层上。 此后，该方法包括在第二导电材料的第一层上沉积第二导电材料层。 第二导电材料的第二层至少部分地填充至少一个纵向沟槽。 选择第一导电材料使得第一导电材料的还原电位小于第二导电材料的还原电位。

    OPTICAL DIE STRUCTURES AND ASSOCIATED PACKAGE SUBSTRATES
    5.
    发明申请
    OPTICAL DIE STRUCTURES AND ASSOCIATED PACKAGE SUBSTRATES 有权
    光学结构和相关封装基板

    公开(公告)号：US20090238233A1

    公开(公告)日：2009-09-24

    申请号：US12052650

    申请日：2008-03-20

    申请人： Omar Bchir ,  Islam Salama ,  Charan Gurumurthy ,  Houssam Jomaa ,  Ravi Nalla

    发明人： Omar Bchir ,  Islam Salama ,  Charan Gurumurthy ,  Houssam Jomaa ,  Ravi Nalla

    IPC分类号： H01S5/026 ,  H01L33/00 ,  H01L31/12 ,  H01L31/18

    CPC分类号： G02B6/02042 ,  H01L31/0203 ,  H01S5/02248 ,  H01S5/02284 ,  H01S5/423

    摘要： Optical die structures and associated package substrates are generally described. In one example, an electronic device includes a package substrate having a package substrate core, a dielectric layer coupled with the package substrate core, and one or more input/output (I/O) optical fibers coupled with the package substrate core or coupled with the build-up dielectric layer, or combinations thereof, the one or more I/O optical fibers to guide I/O optical signals to and from the package substrate wherein the one or more I/O optical fibers allow both input and output optical signals to travel through the one or more I/O optical fibers.

    摘要翻译： 通常描述光学晶粒结构和相关的封装衬底。 在一个示例中，电子设备包括封装衬底，其具有封装衬底芯，与封装衬底芯耦合的电介质层，以及与封装衬底芯耦合的一个或多个输入/输出（I / O）光纤或与 所述积聚介质层或其组合，所述一个或多个I / O光纤以将I / O光信号引导到所述封装基板，其中所述一个或多个I / O光纤允许输入和输出光信号 穿过一个或多个I / O光纤。

    Optical die structures and associated package substrates
    6.
    发明授权
    Optical die structures and associated package substrates 有权
    光学模具结构和相关的封装衬底

    公开(公告)号：US07831115B2

    公开(公告)日：2010-11-09

    申请号：US12052650

    申请日：2008-03-20

    申请人： Omar Bchir ,  Islam Salama ,  Charan Gurumurthy ,  Houssam Jomaa ,  Ravi Nalla

    发明人： Omar Bchir ,  Islam Salama ,  Charan Gurumurthy ,  Houssam Jomaa ,  Ravi Nalla

    IPC分类号： G02B6/12 ,  G02B6/036

    CPC分类号： G02B6/02042 ,  H01L31/0203 ,  H01S5/02248 ,  H01S5/02284 ,  H01S5/423

    摘要： Optical die structures and associated package substrates are generally described. In one example, an electronic device includes a package substrate having a package substrate core, a dielectric layer coupled with the package substrate core, and one or more input/output (I/O) optical fibers coupled with the package substrate core or coupled with the build-up dielectric layer, or combinations thereof, the one or more I/O optical fibers to guide I/O optical signals to and from the package substrate wherein the one or more I/O optical fibers allow both input and output optical signals to travel through the one or more I/O optical fibers.

    摘要翻译： 通常描述光学晶粒结构和相关的封装衬底。 在一个示例中，电子设备包括封装衬底，其具有封装衬底芯，与封装衬底芯耦合的电介质层以及与封装衬底芯耦合的一个或多个输入/输出（I / O）光纤或与 所述积聚介质层或其组合，所述一个或多个I / O光纤以将I / O光信号引导到所述封装基板，其中所述一个或多个I / O光纤允许输入和输出光信号 穿过一个或多个I / O光纤。

    SUBSTRATES FOR OPTICAL DIE STRUCTURES
    7.
    发明申请
    SUBSTRATES FOR OPTICAL DIE STRUCTURES 有权
    光学结构基板

    公开(公告)号：US20090238516A1

    公开(公告)日：2009-09-24

    申请号：US12052637

    申请日：2008-03-20

    申请人： Omar J. Bchir ,  Islam Salama ,  Charan Gurumurthy ,  Houssam Jomaa ,  Ravi Nalla ,  Yonggang Li

    发明人： Omar J. Bchir ,  Islam Salama ,  Charan Gurumurthy ,  Houssam Jomaa ,  Ravi Nalla ,  Yonggang Li

    IPC分类号： G02B6/40 ,  B29D11/00 ,  B05D5/06

    CPC分类号： G02B6/4201 ,  G02B6/4214 ,  G02B6/4228 ,  G02B6/4249 ,  G02B6/43

    摘要： Package substrates for optical die structures are generally described. In one example, an apparatus includes a package substrate having one or more plated through hole (PTH) structures, an optical waveguide coupled with the package substrate, the optical waveguide having one or more input/output (I/O) optical signal pathways to route I/O signals to and from the package substrate, and one or more optical fibers coupled with the optical waveguide, the one or more optical fibers being disposed in the PTH structures to route I/O signals to and from a motherboard.

    摘要翻译： 通常描述用于光学模具结构的封装衬底。 在一个示例中，设备包括具有一个或多个电镀通孔（PTH）结构的封装衬底，与封装衬底耦合的光波导，光波导具有一个或多个输入/输出（I / O）光信号通路 将I / O信号传送到封装衬底和从封装衬底传输I / O信号，以及与光波导耦合的一个或多个光纤，一个或多个光纤被布置在PTH结构中以将I / O信号传送到母板或从母板传送I / O信号。

    Substrates for optical die structures
    8.
    发明授权
    Substrates for optical die structures 有权
    光学模具结构用基板

    公开(公告)号：US07583871B1

    公开(公告)日：2009-09-01

    申请号：US12052637

    申请日：2008-03-20

    申请人： Omar J. Bchir ,  Islam Salama ,  Charan Gurumurthy ,  Houssam Jomaa ,  Ravi Nalla ,  Yonggang Li

    发明人： Omar J. Bchir ,  Islam Salama ,  Charan Gurumurthy ,  Houssam Jomaa ,  Ravi Nalla ,  Yonggang Li

    IPC分类号： G02B6/12 ,  H01L21/00

    CPC分类号： G02B6/4201 ,  G02B6/4214 ,  G02B6/4228 ,  G02B6/4249 ,  G02B6/43

    摘要： Package substrates for optical die structures are generally described. In one example, an apparatus includes a package substrate having one or more plated through hole (PTH) structures, an optical waveguide coupled with the package substrate, the optical waveguide having one or more input/output (I/O) optical signal pathways to route I/O signals to and from the package substrate, and one or more optical fibers coupled with the optical waveguide, the one or more optical fibers being disposed in the PTH structures to route I/O signals to and from a motherboard.

    摘要翻译： 通常描述用于光学模具结构的封装衬底。 在一个示例中，设备包括具有一个或多个电镀通孔（PTH）结构的封装衬底，与封装衬底耦合的光波导，光波导具有一个或多个输入/输出（I / O）光信号通路 将I / O信号传送到封装衬底和从封装衬底传输I / O信号，以及与光波导耦合的一个或多个光纤，一个或多个光纤被布置在PTH结构中以将I / O信号传送到母板或从母板传送I / O信号。

    Selective electroless plating for electronic substrates
    9.
    发明授权
    Selective electroless plating for electronic substrates 有权
    电子基板的选择性化学镀

    公开(公告)号：US08017022B2

    公开(公告)日：2011-09-13

    申请号：US11966396

    申请日：2007-12-28

    申请人： Houssam Jomaa ,  Omar J. Bchir ,  Islam Salama

    发明人： Houssam Jomaa ,  Omar J. Bchir ,  Islam Salama

    IPC分类号： H01B13/00

    CPC分类号： H05K3/107 ,  H05K3/0032 ,  H05K3/184 ,  H05K2203/0565 ,  H05K2203/1383 ,  Y10S438/94

    摘要： In some embodiments, selective electroless plating for electronic substrates is presented. In this regard, a method is introduced including forming a film on a surface of a substrate, the film designed to prevent the seeding of an electroless plating catalyst, laser ablating the surface of the substrate through the film to form trenches, and seeding the surface of the substrate with an electroless plating catalyst. Other embodiments are also disclosed and claimed.

    摘要翻译： 在一些实施例中，提出了用于电子基板的选择性无电镀。 在这方面，引入了一种方法，包括在基板的表面上形成膜，设计用于防止化学镀催化剂的接种的膜，通过膜激光烧蚀基板的表面以形成沟槽，并且将表面 的无电镀催化剂。 还公开并要求保护其他实施例。

    SELECTIVE ELECTROLESS PLATING FOR ELECTRONIC SUBSTRATES
    10.
    发明申请
    SELECTIVE ELECTROLESS PLATING FOR ELECTRONIC SUBSTRATES 有权
    电子基板的选择性电镀镀层

    公开(公告)号：US20090166320A1

    公开(公告)日：2009-07-02

    申请号：US11966396

    申请日：2007-12-28

    申请人： Houssam Jomaa ,  Omar J. Behir ,  Islam Salama

    发明人： Houssam Jomaa ,  Omar J. Behir ,  Islam Salama

    IPC分类号： B05D3/06

    CPC分类号： H05K3/107 ,  H05K3/0032 ,  H05K3/184 ,  H05K2203/0565 ,  H05K2203/1383 ,  Y10S438/94

    摘要： In some embodiments, selective electroless plating for electronic substrates is presented. In this regard, a method is introduced including forming a film on a surface of a substrate, the film designed to prevent the seeding of an electroless plating catalyst, laser ablating the surface of the substrate through the film to form trenches, and seeding the surface of the substrate with an electroless plating catalyst. Other embodiments are also disclosed and claimed.

    摘要翻译： 在一些实施例中，提出了用于电子基板的选择性无电镀。 在这方面，引入了一种方法，包括在基板的表面上形成膜，设计用于防止化学镀催化剂的接种的膜，通过膜激光烧蚀基板的表面以形成沟槽，并且将表面 的无电镀催化剂。 还公开并要求保护其他实施例。