High-k gate dielectric and method of manufacture
    1.
    发明授权
    High-k gate dielectric and method of manufacture 有权
    高k栅介质及其制造方法

    公开(公告)号:US08294201B2

    公开(公告)日:2012-10-23

    申请号:US13209493

    申请日:2011-08-15

    IPC分类号: H01L29/792

    摘要: A device and method of formation are provided for a high-k gate dielectric and gate electrode. The high-k dielectric material is formed, and a silicon-rich film is formed over the high-k dielectric material. The silicon-rich film is then treated through either oxidation or nitridation to reduce the Fermi-level pinning that results from both the bonding of the high-k material to the subsequent gate conductor and also from a lack of oxygen along the interface of the high-k dielectric material and the gate conductor. A conductive material is then formed over the film through a controlled process to create the gate conductor.

    摘要翻译: 为高k栅极电介质和栅电极提供了一种器件和形成方法。 形成高k电介质材料,并且在高k电介质材料上形成富硅膜。 然后通过氧化或氮化处理富硅膜,以减少由高k材料与随后的栅极导体的结合以及由高k材料与后续栅极导体之间​​的缺乏导致的费米能级钉扎 -k介质材料和栅极导体。 然后通过受控的工艺在膜上形成导电材料以产生栅极导体。

    METHOD FOR TREATING LAYERS OF A GATE STACK
    2.
    发明申请
    METHOD FOR TREATING LAYERS OF A GATE STACK 有权
    用于处理门盖层的方法

    公开(公告)号:US20100184281A1

    公开(公告)日:2010-07-22

    申请号:US12355401

    申请日:2009-01-16

    IPC分类号: H01L21/268 H01L21/336

    摘要: A method for fabricating a semiconductor device with improved performance is disclosed. The method comprises providing a semiconductor substrate; forming one or more gate stacks having an interfacial layer, a high-k dielectric layer, and a gate layer over the substrate; and performing at least one treatment on the interfacial layer, wherein the treatment comprises a microwave radiation treatment, an ultraviolet radiation treatment, or a combination thereof.

    摘要翻译: 公开了一种制造具有改进性能的半导体器件的方法。 该方法包括提供半导体衬底; 在所述衬底上形成具有界面层,高k电介质层和栅极层的一个或多个栅极堆叠; 以及对所述界面层进行至少一种处理,其中所述处理包括微波辐射处理,紫外线辐射处理或其组合。

    Methods for forming MOS devices with metal-inserted polysilicon gate stack
    3.
    发明申请
    Methods for forming MOS devices with metal-inserted polysilicon gate stack 有权
    用金属插入多晶硅栅极叠层形成MOS器件的方法

    公开(公告)号:US20080299754A1

    公开(公告)日:2008-12-04

    申请号:US11809337

    申请日:2007-05-31

    IPC分类号: H01L21/3205

    摘要: A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric layer on the semiconductor substrate; forming a metal-containing layer on the gate dielectric; and forming a composite layer over the metal-containing layer. The step of forming the composite layer includes forming an un-doped silicon layer substantially free from p-type and n-type impurities; and forming a silicon layer adjoining the un-doped silicon layer. The step of forming the silicon layer comprises in-situ doping a first impurity. (or need to be change to: forming a silicon layer first & then forming un-doped silicon layer) The method further includes performing an annealing to diffuse the first impurity in the silicon layer into the un-doped silicon layer.

    摘要翻译: 一种形成半导体结构的方法包括提供半导体衬底; 在所述半导体衬底上形成栅介电层; 在所述栅极电介质上形成含金属层; 并在该含金属层上形成复合层。 形成复合层的步骤包括形成基本上不含p型和n型杂质的未掺杂硅层; 以及形成邻近所述未掺杂硅层的硅层。 形成硅层的步骤包括原位掺杂第一杂质。 (或者需要改变为:首先形成硅层,然后形成未掺杂的硅层)。该方法还包括执行退火以将硅层中的第一杂质扩散到未掺杂的硅层中。

    Polysilicon gate formation by in-situ doping
    5.
    发明申请
    Polysilicon gate formation by in-situ doping 审中-公开
    通过原位掺杂形成多晶硅栅

    公开(公告)号:US20080194072A1

    公开(公告)日:2008-08-14

    申请号:US11705655

    申请日:2007-02-12

    IPC分类号: H01L21/336

    摘要: A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric layer on the semiconductor substrate; forming a first silicon-containing layer on the gate dielectric layer, wherein the first silicon-containing layer is substantially free from p-type and n-type impurities; forming a second silicon-containing layer over the first silicon-containing layer, wherein the second silicon-containing layer comprises an impurity; and performing an annealing to diffuse the impurity in the second silicon-containing layer into the first silicon-containing layer.

    摘要翻译: 一种形成半导体结构的方法包括提供半导体衬底; 在所述半导体衬底上形成栅介电层; 在所述栅极电介质层上形成第一含硅层,其中所述第一含硅层基本上不含p型和n型杂质; 在所述第一含硅层上形成第二含硅层,其中所述第二含硅层包含杂质; 并进行退火以将第二含硅层中的杂质扩散到第一含硅层中。

    High-K Gate Dielectric and Method of Manufacture
    7.
    发明申请
    High-K Gate Dielectric and Method of Manufacture 有权
    高K栅介质及其制造方法

    公开(公告)号:US20090042381A1

    公开(公告)日:2009-02-12

    申请号:US11835263

    申请日:2007-08-07

    IPC分类号: H01L21/4763

    摘要: A device and method of formation are provided for a high-k gate dielectric and gate electrode. The high-k dielectric material is formed, and a silicon-rich film is formed over the high-k dielectric material. The silicon-rich film is then treated through either oxidation or nitridation to reduce the Fermi-level pinning that results from both the bonding of the high-k material to the subsequent gate conductor and also from a lack of oxygen along the interface of the high-k dielectric material and the gate conductor. A conductive material is then formed over the film through a controlled process to create the gate conductor.

    摘要翻译: 为高k栅极电介质和栅电极提供了一种器件和形成方法。 形成高k电介质材料,并且在高k电介质材料上形成富硅膜。 然后通过氧化或氮化处理富硅膜,以减少由高k材料与随后的栅极导体的结合以及由高k材料与后续栅极导体之间​​的缺乏导致的费米能级钉扎 -k介质材料和栅极导体。 然后通过受控的工艺在膜上形成导电材料以产生栅极导体。

    HIGH-K GATE DIELECTRIC AND METHOD OF MANUFACTURE
    8.
    发明申请
    HIGH-K GATE DIELECTRIC AND METHOD OF MANUFACTURE 有权
    高K栅介质及其制造方法

    公开(公告)号:US20110291205A1

    公开(公告)日:2011-12-01

    申请号:US13209493

    申请日:2011-08-15

    IPC分类号: H01L29/78

    摘要: A device and method of formation are provided for a high-k gate dielectric and gate electrode. The high-k dielectric material is formed, and a silicon-rich film is formed over the high-k dielectric material. The silicon-rich film is then treated through either oxidation or nitridation to reduce the Fermi-level pinning that results from both the bonding of the high-k material to the subsequent gate conductor and also from a lack of oxygen along the interface of the high-k dielectric material and the gate conductor. A conductive material is then formed over the film through a controlled process to create the gate conductor.

    摘要翻译: 为高k栅极电介质和栅电极提供了一种器件和形成方法。 形成高k电介质材料,并且在高k电介质材料上形成富硅膜。 然后通过氧化或氮化处理富硅膜,以减少由高k材料与随后的栅极导体的结合以及由高k材料与后续栅极导体之间​​的缺乏导致的费米能级钉扎 -k介质材料和栅极导体。 然后通过受控的工艺在膜上形成导电材料以产生栅极导体。

    Atomic layer deposition
    9.
    发明授权
    Atomic layer deposition 有权
    原子层沉积

    公开(公告)号:US08003548B2

    公开(公告)日:2011-08-23

    申请号:US12793346

    申请日:2010-06-03

    IPC分类号: H01L21/469 H01L21/31

    摘要: A method for forming an atomic deposition layer is provided, which includes: (a) performing a first water pulse on a substrate; (b) performing a precursor pulse on the hydroxylated substrate, wherein the precursor reacts with the hydroxyl groups and forms a layer; (c) purging the substrate with an inert carrier gas; (d) exposing the layer to a second water pulse for at least about 3 seconds so that the layer has a minimum of 70 percent of surface hydroxyl groups thereon; (e) purging the layer with the inert carrier gas; and (f) repeating steps (b) to (e) to form a resultant atomic deposition layer.

    摘要翻译: 提供了一种用于形成原子沉积层的方法,其包括:(a)在衬底上执行第一水脉冲; (b)在羟基化底物上进行前体脉冲,其中前体与羟基反应并形成一层; (c)用惰性载气吹扫衬底; (d)将该层暴露于第二水脉冲至少约3秒,使得该层在其上具有最少70%的表面羟基; (e)用惰性载气吹扫该层; 和(f)重复步骤(b)至(e)以形成所得到的原子沉积层。

    Methods for forming MOS devices with metal-inserted polysilicon gate stack
    10.
    发明授权
    Methods for forming MOS devices with metal-inserted polysilicon gate stack 有权
    用金属插入多晶硅栅极叠层形成MOS器件的方法

    公开(公告)号:US07892961B2

    公开(公告)日:2011-02-22

    申请号:US11809337

    申请日:2007-05-31

    摘要: A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric layer on the semiconductor substrate; forming a metal-containing layer on the gate dielectric; and forming a composite layer over the metal-containing layer. The step of forming the composite layer includes forming an un-doped silicon layer substantially free from p-type and n-type impurities; and forming a silicon layer adjoining the un-doped silicon layer. The step of forming the silicon layer comprises in-situ doping a first impurity. (or need to be change to: forming a silicon layer first & then forming un-doped silicon layer) The method further includes performing an annealing to diffuse the first impurity in the silicon layer into the un-doped silicon layer.

    摘要翻译: 一种形成半导体结构的方法包括提供半导体衬底; 在所述半导体衬底上形成栅介电层; 在所述栅极电介质上形成含金属层; 并在该含金属层上形成复合层。 形成复合层的步骤包括形成基本上不含p型和n型杂质的未掺杂硅层; 以及形成邻近所述未掺杂硅层的硅层。 形成硅层的步骤包括原位掺杂第一杂质。 (或者需要改变为:首先形成硅层,然后形成未掺杂的硅层)。该方法还包括执行退火以将硅层中的第一杂质扩散到未掺杂的硅层中。