摘要:
A new method is provided for the creation of a high-reliability metal capacitor as part of back-end processing. A first layer of metal interconnect is created, ac contact point is provided in the surface of the first layer of interconnect aligned with which a capacitor is to be created. A copper interconnect is formed overlying the contact point using TaN for the bottom plate, a high dielectric-constant dielectric material capacitor and using TaN for the top plate. The deposited layers are patterned and etched, a spacer layer is formed over sidewalls of the capacitor to prevent capacitor sidewall leakage. Top interconnect metal is then formed by first depositing a layer of etch stop material for further interconnection of the capacitor and the semiconductor devices provided in the underlying substrate.
摘要:
A new method is provided for the creation of a high-reliability metal capacitor as part of back-end processing. A first layer of metal interconnect is created, a contact point is provided in the surface of the first layer of interconnect aligned with which a capacitor is to be created. A copper interconnect is formed overlying the contact point using TaN for the bottom plate, a high dielectric-constant dielectric material capacitor and using TaN for the top plate. The deposited layers are patterned and etched, a spacer layer is formed over sidewalls of the capacitor to prevent capacitor sidewall leakage. Top interconnect metal is then formed by first depositing a layer of etch stop material for further interconnection of the capacitor and the semiconductor devices provided in the underlying substrate.
摘要:
A new method is provided for the creation of a high-reliability metal capacitor as part of back-end processing. A first layer of metal interconnect is created, ac contact point is provided in the surface of the first layer of interconnect aligned with which a capacitor is to be created. A copper interconnect is formed overlying the contact point using TaN for the bottom plate, a high dielectric-constant dielectric material capacitor and using TaN for the top plate. The deposited layers are patterned and etched, a spacer layer is formed over sidewalls of the capacitor to prevent capacitor sidewall leakage. Top interconnect metal is then formed by first depositing a layer of etch stop material for further interconnection of the capacitor and the semiconductor devices provided in the underlying substrate.
摘要:
Within a method for fabricating a microelectronic fabrication, and the microelectronic fabrication fabricated employing the method, there is formed within the microelectronic fabrication a capacitor structure which comprises a first capacitor plate layer having formed thereupon a capacitor dielectric layer in turn having formed thereupon a second capacitor plate layer, wherein each of the foregoing layers having an exposed sidewall to thus form a series of exposed sidewalls. The capacitor structure also comprises a silicon oxide dielectric layer formed passivating the series of exposed sidewalls of the first capacitor plate layer, the capacitor dielectric layer and the second capacitor plate layer a silicon oxide dielectric layer.
摘要:
A first metal plug is formed in the first layer of dielectric. A freestanding second metal plug is created that aligns with and makes contact with the first metal plug, extending the first metal plug. The second metal plug is surrounded by an opening that has been created in layers of etch stop and dielectric. A layer of capacitor dielectric is deposited over the exposed surfaces of the first and second metal plugs and the inside surfaces of the opening that surrounds the second plug. A layer of metal is created over the capacitor dielectric inside the opening in the layers of etch stop and dielectric.
摘要:
A first metal plug is formed in the first layer of dielectric. A freestanding second metal plug is created that aligns with and makes contact with the first metal plug, extending the first metal plug. The second metal plug is surrounded by an opening that has been created in layers of etch stop and dielectric. A layer of capacitor dielectric is deposited over the exposed surfaces of the first and second metal plugs and the inside surfaces of the opening that surrounds the second plug. A layer of metal is created over the capacitor dielectric inside the opening in the layers of etch stop and dielectric.
摘要:
Within a method for fabricating a microelectronic fabrication, and the microelectronic fabrication fabricated employing the method, there is formed within the microelectronic fabrication a capacitor structure upon a conductor stud layer formed into a first via defined by a patterned dielectric layer to reach a one of a pair of patterned conductor layers within the microelectronic fabrication prior to forming through the patterned dielectric layer a second via to reach the other of the pair of patterned conductor layers within the microelectronic fabrication. The method provides the resulting microelectronic fabrication with enhanced reliability and performance.
摘要:
A page-width array printing device includes a page-width array printing mechanism including at least one page-width array printing module. The page-width array printing module includes a printing platform, a first page-width array printing unit and a second page-width array printing unit. The first page-width array printing unit includes a plurality of first inkjet cartridges. The second page-width array printing unit includes a plurality of second inkjet cartridges. The first page-width array printing unit and the second page-width array printing unit are in parallel with each other. The first inkjet cartridges and the second inkjet cartridges are staggered and independently and detachably disposed on the printing platform. Each of the first inkjet cartridges and the second inkjet cartridges includes an inkjet chip. The inkjet chip includes four ink supply channels and a plurality of nozzles so as to perform a monochromatic or polychromatic page-width array printing operation.
摘要:
A method of determining the reliability of a high-voltage PMOS (HVPMOS) device includes determining a bulk resistance of the HVPMOS device, and evaluating the reliability of the HVPMOS device based on the bulk resistance.
摘要:
A stapler has a supporting base, a magazine assembly, a trigger assembly and a leg-flatting device. The trigger assembly has a trigger lever and a pushing element. The pushing element is mounted pivotally on the trigger lever with a pivot and has two pushing arms extending toward the supporting base. The leg-flatting device is mounted on the supporting base and has a sliding base, a moving base and an anvil element. The sliding base is slidably mounted on the supporting base and has a pushed segment corresponding to and selectively pushed by the pushing arms. The moving base is selectively blocked by the sliding base to keep the moving base from moving downwardly before the sliding base sliding relative to the supporting base and has an elongated hole. The anvil element is mounted in the elongated hole in the moving base.