System for Detecting a Liquid Sample
    1.
    发明申请
    System for Detecting a Liquid Sample 有权
    检测液体样品的系统

    公开(公告)号:US20120266662A1

    公开(公告)日:2012-10-25

    申请号:US13091435

    申请日:2011-04-21

    IPC分类号: G01N1/10

    摘要: A system is provided for detecting a liquid sample, and includes: a flow cell assembly formed with a sample receiving space therein, and inlet and outlet channels extending to the sample receiving space for guiding the liquid sample into and away from the sample receiving space; a sensor device including a sample detecting unit that is disposed in the sample receiving space, and that is operable to detect the liquid sample and to generate a detection signal accordingly, and a signal conducting unit that is connected electrically to the sensor device for conducting the detection signal therefrom; and a liquid introducing unit and a liquid discharging unit coupled to the inlet and outlet channels and cooperating therewith to form an introducing path and a discharging path for introducing the liquid sample into and for discharging the liquid sample from the sample receiving space, respectively.

    摘要翻译: 提供了一种用于检测液体样品的系统,包括:形成有样品容纳空间的流通池组件,以及延伸到样品容纳空间的入口和出口通道,用于将液体样品引入和离开样品接收空间; 传感器装置,包括:样本检测单元,其设置在样本容纳空间中,并且可操作地检测液体样本并相应地产生检测信号;以及信号导通单元,其与传感器装置电连接,用于导电 检测信号; 以及液体引入单元和液体排出单元,其联接到入口和出口通道并与之配合以形成引入路径和用于将液体样品分别从样品接收空间引入和排出液体样品的排出路径。

    FLOW CELL DEVICE
    2.
    发明申请
    FLOW CELL DEVICE 失效
    流槽装置

    公开(公告)号:US20120199479A1

    公开(公告)日:2012-08-09

    申请号:US13020177

    申请日:2011-02-03

    IPC分类号: G01N27/28

    CPC分类号: G01N27/08

    摘要: A flow cell device is formed with: a plurality of cell recess portions adapted to cooperate with a plurality of sensor devices to confine a plurality of sample receiving space for receiving a liquid sample, respectively; a plurality of pairs of first and second guiding channels, each pair being in fluid communication with a respective one of the cell recess portions; a number of connecting recess portions each fluidly communicating the first and second guiding channels that respectively extend to a corresponding pair of the cell recess portions such that the liquid sample is able to flow through the sample receiving spaces sequentially; and inlet and outlet channels in fluid communication with the first and second guiding channels that respectively extend to a first one and a last one of the cell recess portions for introducing and discharging the liquid sample into and from the flow cell device, respectively.

    摘要翻译: 流动池装置形成有:多个单元凹部,其适于与多个传感器装置配合,以分别限制用于接收液体样品的多个样品接收空间; 多对第一和第二引导通道,每对引导通道与相应的单元凹槽部分流体连通; 多个连接凹部,其各自流体地连通所述第一和第二引导通道,所述第一和第二引导通道分别延伸到相应的一对所述单元凹槽部分,使得所述液体样品能够依次流过所述样品接收空间; 以及分别与第一和第二引导通道流体连通的入口和出口通道,其分别延伸到第一个和第二个单元凹槽部分,用于将液体样本分别引入和从流动池装置排出。

    System for detecting a liquid sample
    3.
    发明授权
    System for detecting a liquid sample 有权
    液体样品检测系统

    公开(公告)号:US08522602B2

    公开(公告)日:2013-09-03

    申请号:US13091435

    申请日:2011-04-21

    IPC分类号: G01N11/00 G01N1/00

    摘要: A system is provided for detecting a liquid sample, and includes: a flow cell assembly formed with a sample receiving space therein, and inlet and outlet channels extending to the sample receiving space for guiding the liquid sample into and away from the sample receiving space; a sensor device including a sample detecting unit that is disposed in the sample receiving space, and that is operable to detect the liquid sample and to generate a detection signal accordingly, and a signal conducting unit that is connected electrically to the sensor device for conducting the detection signal therefrom; and a liquid introducing unit and a liquid discharging unit coupled to the inlet and outlet channels and cooperating therewith to form an introducing path and a discharging path for introducing the liquid sample into and for discharging the liquid sample from the sample receiving space, respectively.

    摘要翻译: 提供了一种用于检测液体样品的系统,包括:形成有样品容纳空间的流通池组件,以及延伸到样品容纳空间的入口和出口通道,用于将液体样品引入和离开样品接收空间; 传感器装置,包括:样本检测单元,其设置在样本容纳空间中,并且可操作地检测液体样本并相应地产生检测信号;以及信号导通单元,其与传感器装置电连接,用于导电 检测信号; 以及液体引入单元和液体排出单元,其联接到入口和出口通道并与之配合以形成引入路径和用于将液体样品分别从样品接收空间引入和排出液体样品的排出路径。

    Flow cell device
    4.
    发明授权
    Flow cell device 失效
    流通池装置

    公开(公告)号:US08241570B1

    公开(公告)日:2012-08-14

    申请号:US13020177

    申请日:2011-02-03

    IPC分类号: G01N15/06

    CPC分类号: G01N27/08

    摘要: A flow cell device is formed with: a plurality of cell recess portions adapted to cooperate with a plurality of sensor devices to confine a plurality of sample receiving space for receiving a liquid sample, respectively; a plurality of pairs of first and second guiding channels, each pair being in fluid communication with a respective one of the cell recess portions; a number of connecting recess portions each fluidly communicating the first and second guiding channels that respectively extend to a corresponding pair of the cell recess portions such that the liquid sample is able to flow through the sample receiving spaces sequentially; and inlet and outlet channels in fluid communication with the first and second guiding channels that respectively extend to a first one and a last one of the cell recess portions for introducing and discharging the liquid sample into and from the flow cell device, respectively.

    摘要翻译: 流动池装置形成有:多个单元凹部,其适于与多个传感器装置配合,以分别限制用于接收液体样品的多个样品接收空间; 多对第一和第二引导通道,每对引导通道与相应的单元凹槽部分流体连通; 多个连接凹部,其各自流体地连通所述第一和第二引导通道,所述第一和第二引导通道分别延伸到相应的一对所述单元凹槽部分,使得所述液体样品能够依次流过所述样品接收空间; 以及分别与第一和第二引导通道流体连通的入口和出口通道,其分别延伸到第一个和第二个单元凹槽部分,用于将液体样本分别引入和从流动池装置排出。

    AIRGAP STRUCTURE AND METHOD OF MANUFACTURING THEREOF
    5.
    发明申请
    AIRGAP STRUCTURE AND METHOD OF MANUFACTURING THEREOF 有权
    航空结构及其制造方法

    公开(公告)号:US20140077304A1

    公开(公告)日:2014-03-20

    申请号:US13617643

    申请日:2012-09-14

    IPC分类号: H01L27/088 H01L21/283

    摘要: A process for fabricating a gate structure, the gate structure having a plurality of gates defined by a network of spaces. The word line (WL) spaces within a dense WL region having airgaps and those spaces outside of the dense WL being substantially free of airgaps. A gate structure having a silicide layer dispose across the plurality of gates is also provided.

    摘要翻译: 一种用于制造栅极结构的工艺,所述栅极结构具有由空间网络限定的多个栅极。 具有气隙的密集WL区域内的字线(WL)空间,密集WL外部的那些空间基本上没有空气隙。 还提供了具有跨越多个栅极的硅化物层的栅极结构。

    METHOD FOR FILLING A PHYSICAL ISOLATION TRENCH AND INTEGRATING A VERTICAL CHANNEL ARRAY WITH A PERIPHERY CIRCUIT
    6.
    发明申请
    METHOD FOR FILLING A PHYSICAL ISOLATION TRENCH AND INTEGRATING A VERTICAL CHANNEL ARRAY WITH A PERIPHERY CIRCUIT 有权
    用于填充物理隔离层的方法和用外围电路整合垂直通道阵列

    公开(公告)号:US20120161222A1

    公开(公告)日:2012-06-28

    申请号:US12977910

    申请日:2010-12-23

    摘要: A method of processing a semiconductor structure may include preparing a vertical channel memory structure for filling of a physical isolation trench formed therein. The physical isolation trench may be formed between active structures adjacent to each other and extending in a first direction. The active structures may have channels adjacent to sides of the active structures that are opposite to sides of the active structures that are adjacent to the physical isolation trench. The method may further include filling the physical isolation trench in connection with application of a multi-dielectric layer (ex. an oxide-nitride-oxide (ONO) layer), a polysilicon liner and/or an oxide film. A corresponding apparatus and method for integrating such a structure with a planar periphery are also provided.

    摘要翻译: 处理半导体结构的方法可以包括制备用于填充其中形成的物理隔离沟槽的垂直沟道存储器结构。 物理隔离沟槽可以形成在彼此相邻并在第一方向上延伸的有源结构之间。 活性结构可以具有与活性结构的与物理隔离沟槽相邻的与活性结构的侧面相对的相邻的通道。 该方法可以进一步包括与施加多电介质层(例如氧化物 - 氮化物 - 氧化物(ONO)层),多晶硅衬垫和/或氧化物膜相结合地填充物理隔离沟槽。 还提供了一种用于将这种结构与平面周边集成的相应装置和方法。

    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    7.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
    半导体集成电路装置及制造半导体集成电路装置的方法

    公开(公告)号:US20120119282A1

    公开(公告)日:2012-05-17

    申请号:US12945659

    申请日:2010-11-12

    IPC分类号: H01L27/11 H01L21/336

    摘要: A system, method, and layout for a semiconductor integrated circuit device allows for improved scaling down of various back-end structures, which can include contacts and other metal interconnection structures. The resulting structures can include a semiconductor substrate, a buried diffusion region formed on the semiconductor substrate, and at least one of a silicide film, for example tungsten silicide (WSix), and a self-aligned silicide (salicide) film, for example cobalt silicide (CoSi) and/or nickel silicide (NiSi), above the buried diffusion (BD) layer. The semiconductor integrated circuit can also include a memory gate structure formed over at least a portion of the contact layer.

    摘要翻译: 用于半导体集成电路器件的系统,方法和布局允许改进可以包括触点和其它金属互连结构的各种后端结构的缩小。 所得到的结构可以包括半导体衬底,形成在半导体衬底上的掩埋扩散区,以及硅化物膜,例如硅化钨(WSix)和自对准硅化物(自对准硅)膜中的至少一种,例如钴 硅化物(CoSi)和/或硅化镍(NiSi),在掩埋扩散(BD)层之上。 半导体集成电路还可以包括形成在接触层的至少一部分上的存储器栅极结构。

    Memory structure with planar upper surface
    8.
    发明授权
    Memory structure with planar upper surface 有权
    具有平面上表面的记忆结构

    公开(公告)号:US08916920B2

    公开(公告)日:2014-12-23

    申请号:US13186095

    申请日:2011-07-19

    IPC分类号: H01L29/76 H01L27/115

    CPC分类号: H01L27/11531 H01L27/11548

    摘要: A memory structure having a memory cell region and a non-memory cell region is provided. The memory structure includes a plurality of memory cells and a conductive material. The plurality of memory cells are disposed in the memory cell region, wherein a plurality of first concave portions are present in the plurality of memory cells. The conductive material extends across the memory cell region and the non-memory cell region, covers the plurality of memory cells, and extends into the plurality of first concave portions.

    摘要翻译: 提供了具有存储单元区域和非存储单元区域的存储器结构。 存储器结构包括多个存储单元和导电材料。 多个存储单元设置在存储单元区域中,其中多个第一凹部存在于多个存储单元中。 导电材料延伸穿过存储单元区域和非存储单元区域,覆盖多个存储单元,并延伸到多个第一凹入部分中。

    Semiconductor integrated circuit device and method of manufacturing a semiconductor integrated circuit device
    9.
    发明授权
    Semiconductor integrated circuit device and method of manufacturing a semiconductor integrated circuit device 有权
    半导体集成电路器件及半导体集成电路器件的制造方法

    公开(公告)号:US08466064B2

    公开(公告)日:2013-06-18

    申请号:US12945659

    申请日:2010-11-12

    IPC分类号: H01L21/44

    摘要: A system, method, and layout for a semiconductor integrated circuit device allows for improved scaling down of various back-end structures, which can include contacts and other metal interconnection structures. The resulting structures can include a semiconductor substrate, a buried diffusion region formed on the semiconductor substrate, and at least one of a silicide film, for example tungsten silicide (WSix), and a self-aligned silicide (salicide) film, for example cobalt silicide (CoSi) and/or nickel silicide (NiSi), above the buried diffusion (BD) layer. The semiconductor integrated circuit can also include a memory gate structure formed over at least a portion of the contact layer.

    摘要翻译: 用于半导体集成电路器件的系统,方法和布局允许改进可以包括触点和其它金属互连结构的各种后端结构的缩小。 所得到的结构可以包括半导体衬底,形成在半导体衬底上的掩埋扩散区,以及硅化物膜,例如硅化钨(WSix)和自对准硅化物(自对准硅)膜中的至少一种,例如钴 硅化物(CoSi)和/或硅化镍(NiSi),在掩埋扩散(BD)层之上。 半导体集成电路还可以包括形成在接触层的至少一部分上的存储器栅极结构。

    Method for filling a physical isolation trench and integrating a vertical channel array with a periphery circuit
    10.
    发明授权
    Method for filling a physical isolation trench and integrating a vertical channel array with a periphery circuit 有权
    用于填充物理隔离沟槽并将垂直沟道阵列与外围电路集成的方法

    公开(公告)号:US08623726B2

    公开(公告)日:2014-01-07

    申请号:US12977910

    申请日:2010-12-23

    IPC分类号: H01L21/336

    摘要: A method of processing a semiconductor structure may include preparing a vertical channel memory structure for filling of a physical isolation trench formed therein. The physical isolation trench may be formed between active structures adjacent to each other and extending in a first direction. The active structures may have channels adjacent to sides of the active structures that are opposite to sides of the active structures that are adjacent to the physical isolation trench. The method may further include filling the physical isolation trench in connection with application of a multi-dielectric layer (ex. an oxide-nitride-oxide (ONO) layer), a polysilicon liner and/or an oxide film. A corresponding apparatus and method for integrating such a structure with a planar periphery are also provided.

    摘要翻译: 处理半导体结构的方法可以包括制备用于填充其中形成的物理隔离沟槽的垂直沟道存储器结构。 物理隔离沟槽可以形成在彼此相邻并在第一方向上延伸的有源结构之间。 活性结构可以具有与活性结构的与物理隔离沟槽相邻的与活性结构的侧面相对的相邻的通道。 该方法可以进一步包括与应用多电介质层(例如氧化物 - 氮化物 - 氧化物(ONO)层),多晶硅衬垫和/或氧化物膜相结合地填充物理隔离沟槽。 还提供了一种用于将这种结构与平面周边集成的相应装置和方法。