公开(公告)号：US20050153519A1

公开(公告)日：2005-07-14

申请号：US10753816

申请日：2004-01-08

申请人： Chih-Cheng Lu ,  Chuan-Ping Hou ,  Chu-Yun Fu ,  Chang Wen ,  Jang Ming

发明人： Chih-Cheng Lu ,  Chuan-Ping Hou ,  Chu-Yun Fu ,  Chang Wen ,  Jang Ming

IPC分类号： H01L21/3105 ,  H01L21/311 ,  H01L21/316 ,  H01L21/762 ,  H01L21/76

CPC分类号： H01L21/02164 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/31116 ,  H01L21/31612 ,  H01L21/76229

摘要： A method of reducing oxide thickness variations in a STI pattern that includes both a dense trench array and a wide trench is described. A first HDP CVD step with a deposition/sputter (D/S) ratio of 9.5 is used to deposit a dielectric layer with a thickness that is 120 to 130% of the shallow trench depth. An etch back is performed in the same CVD chamber with NF3, SiF4 or NF3 and SiF4 to remove about 40 to 50% of the initial dielectric layer. A second HDP CVD step with a D/S ratio of 16 deposits an additional thickness of dielectric layer to a level that is slightly higher than after the first deposition. The etch back and second deposition form a smoother dielectric layer surface which enables a subsequent planarization step to provide filled STI features with a minimal amount of dishing in wide trenches.

摘要翻译： 描述了一种降低包括密集沟槽阵列和宽沟槽的STI图案中的氧化物厚度变化的方法。 使用沉积/溅射（D / S）比为9.5的第一HDP CVD步骤沉积厚度为浅沟槽深度的120至130％的电介质层。 在具有NF 3，SiF 4或NF 3 Si和SiF 4的相同CVD室中进行回蚀刻， 以去除初始介电层的约40至50％。 D / S比为16的第二HDP CVD步骤将附加的电介质层的厚度沉积到稍高于第一次沉积后的水平。 回蚀刻和第二沉积形成较平滑的介电层表面，其使得随后的平坦化步骤能够在宽的沟槽中提供最少量的凹陷的填充的STI特征。

公开(公告)号：US07098116B2

公开(公告)日：2006-08-29

申请号：US10753816

申请日：2004-01-08

申请人： Chih-Cheng Lu ,  Chuan-Ping Hou ,  Chu-Yun Fu ,  Chang Wen ,  Jang Syun Ming

发明人： Chih-Cheng Lu ,  Chuan-Ping Hou ,  Chu-Yun Fu ,  Chang Wen ,  Jang Syun Ming

IPC分类号： H01L21/76

CPC分类号： H01L21/02164 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/31116 ,  H01L21/31612 ,  H01L21/76229

摘要： A method of reducing oxide thickness variations in a STI pattern that includes both a dense trench array and a wide trench is described. A first HDP CVD step with a deposition/sputter (D/S) ratio of 9.5 is used to deposit a dielectric layer with a thickness that is 120 to 130% of the shallow trench depth. An etch back is performed in the same CVD chamber with NF3, SiF4 or NF3 and SiF4 to remove about 40 to 50% of the initial dielectric layer. A second HDP CVD step with a D/S ratio of 16 deposits an additional thickness of dielectric layer to a level that is slightly higher than after the first deposition. The etch back and second deposition form a smoother dielectric layer surface which enables a subsequent planarization step to provide filled STI features with a minimal amount of dishing in wide trenches.

摘要翻译： 描述了一种降低包括密集沟槽阵列和宽沟槽的STI图案中的氧化物厚度变化的方法。 使用沉积/溅射（D / S）比为9.5的第一HDP CVD步骤沉积厚度为浅沟槽深度的120至130％的电介质层。 在具有NF 3，SiF 4或NF 3 Si和SiF 4的相同CVD室中进行回蚀刻， 以去除初始介电层的约40至50％。 D / S比为16的第二HDP CVD步骤将附加的电介质层的厚度沉积到稍高于第一次沉积后的水平。 回蚀刻和第二沉积形成较平滑的介电层表面，其使得随后的平坦化步骤能够在宽的沟槽中提供最少量的凹陷的填充的STI特征。