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    Non-volatile memory and method with improved data scrambling
    5.
    发明授权
    Non-volatile memory and method with improved data scrambling 有权
    非易失性存储器和具有改进的数据加扰的方法

    公开(公告)号：US08843693B2

    公开(公告)日：2014-09-23

    申请号：US13109972

    申请日：2011-05-17

    申请人： Jonathan Hsu ,  Chris Nga Yee Avila ,  Alexander Kwok-Tung Mak ,  Sergey Anatolievich Gorobets ,  Tien-chien Kuo ,  Yee Lih Koh ,  Jun Wan

    发明人： Jonathan Hsu ,  Chris Nga Yee Avila ,  Alexander Kwok-Tung Mak ,  Sergey Anatolievich Gorobets ,  Tien-chien Kuo ,  Yee Lih Koh ,  Jun Wan

    IPC分类号： G06F12/00 ,  G11C7/10 ,  G11C16/34 ,  G06F12/14

    CPC分类号： G11C16/3427 ,  G06F12/1408 ,  G11C7/1006 ,  G11C7/1012

    摘要： A memory device cooperating with a memory controller scrambles each unit of data using a selected scrambling key before storing it in an array of nonvolatile memory cells. This helps to reduce program disturbs, user read disturbs, and floating gate to floating gate coupling that result from repeated and long term storage of specific data patterns. For a given page of data having a logical address and for storing at a physical address, the key is selected from a finite sequence thereof as a function of both the logical address and the physical address. In a block management scheme the memory array is organized into erase blocks, the physical address is the relative page number in each block. When logical address are grouped into logical groups and manipulated as a group and each group is storable into a sub-block, the physical address is the relative page number in the sub-block.

    摘要翻译： 与存储器控制器协作的存储器件在将其存储在非易失性存储器单元阵列之前，使用所选择的加密密钥对每个数据单元进行加扰。 这有助于减少由特定数据模式的重复和长期存储引起的编程干扰，用户读取干扰和浮动栅极到浮动栅极耦合。 对于具有逻辑地址并用于存储在物理地址的给定页面的数据，从作为逻辑地址和物理地址的函数的有限序列中选择密钥。 在块管理方案中，存储器阵列被组织成擦除块，物理地址是每个块中的相对页号。 当逻辑地址分组为逻辑组并作为组操作并且每个组可存储到子块中时，物理地址是子块中的相对页号。

    Non-Volatile Memory And Method With Improved Data Scrambling
    6.
    发明申请
    Non-Volatile Memory And Method With Improved Data Scrambling 有权
    非易失性存储器和改进的数据加扰方法

    公开(公告)号：US20120297111A1

    公开(公告)日：2012-11-22

    申请号：US13109972

    申请日：2011-05-17

    申请人： Jonathan Hsu ,  Chris Nga Yee Avila ,  Alexander Kwok-Tung Mak ,  Sergey Anatolievich Gorobets ,  Tien-Chien Kuo ,  Yee Lih Koh ,  Jun Wan

    发明人： Jonathan Hsu ,  Chris Nga Yee Avila ,  Alexander Kwok-Tung Mak ,  Sergey Anatolievich Gorobets ,  Tien-Chien Kuo ,  Yee Lih Koh ,  Jun Wan

    IPC分类号： G06F12/02

    CPC分类号： G11C16/3427 ,  G06F12/1408 ,  G11C7/1006 ,  G11C7/1012

    摘要： A memory device cooperating with a memory controller scrambles each unit of data using a selected scrambling key before storing it in an array of nonvolatile memory cells. This helps to reduce program disturbs, user read disturbs, and floating gate to floating gate coupling that result from repeated and long term storage of specific data patterns. For a given page of data having a logical address and for storing at a physical address, the key is selected from a finite sequence thereof as a function of both the logical address and the physical address. In a block management scheme the memory array is organized into erase blocks, the physical address is the relative page number in each block. When logical address are grouped into logical groups and manipulated as a group and each group is storable into a sub-block, the physical address is the relative page number in the sub-block.

    摘要翻译： 与存储器控制器协作的存储器件在将其存储在非易失性存储器单元阵列之前，使用所选择的加密密钥对每个数据单元进行加扰。 这有助于减少由特定数据模式的重复和长期存储引起的程序干扰，用户读取干扰和浮动栅极到浮动栅极耦合。 对于具有逻辑地址并用于存储在物理地址的给定页面的数据，从作为逻辑地址和物理地址的函数的有限序列中选择密钥。 在块管理方案中，存储器阵列被组织成擦除块，物理地址是每个块中的相对页号。 当逻辑地址分组为逻辑组并作为组操作并且每个组可存储到子块中时，物理地址是子块中的相对页号。

    Experience count dependent program algorithm for flash memory
    7.
    发明授权
    Experience count dependent program algorithm for flash memory 有权
    体验闪存的计数依赖程序算法

    公开(公告)号：US08750045B2

    公开(公告)日：2014-06-10

    申请号：US13560896

    申请日：2012-07-27

    申请人： Jianmin Huang ,  Kulachet Tanpairoj ,  Chris Nga Yee Avila ,  Gautam Ashok Dusija

    发明人： Jianmin Huang ,  Kulachet Tanpairoj ,  Chris Nga Yee Avila ,  Gautam Ashok Dusija

    IPC分类号： G11C16/06 ,  G11C16/10

    CPC分类号： G11C16/10 ,  G11C16/0483 ,  G11C16/3481 ,  G11C16/3495

    摘要： In a non-volatile memory device, the parameters used in write and erase operation are varied based upon device age. For example, in a programming operation using a staircase waveform, the amplitude of the initial pulse can be adjusted based upon the number of erase-program cycles (hot count) of the block containing the selected physical page for the write. This arrangement can preserve performance for relatively fresh devices, while extending life as a devices ages by using gentler waveforms as the device ages.

    摘要翻译： 在非易失性存储器件中，用于写入和擦除操作的参数根据器件寿命而变化。 例如，在使用阶梯波形的编程操作中，可以根据包含所选择的用于写入的物理页的块的擦除程序周期（热计数）的次数来调整初始脉冲的幅度。 这种布置可以保持相对新鲜的设备的性能，同时通过在设备老化时通过使用温和波形来延长设备的使用寿命。

    Non-Volatile Memory and Method Having Efficient On-Chip Block-Copying with Controlled Error Rate
    10.
    发明申请
    Non-Volatile Memory and Method Having Efficient On-Chip Block-Copying with Controlled Error Rate 有权
    非易失性存储器和具有有效的片上块复制与受控错误率的方法

    公开(公告)号：US20120284574A1

    公开(公告)日：2012-11-08

    申请号：US13457247

    申请日：2012-04-26

    申请人： Chris Nga Yee Avila ,  Jianmin Huang ,  Lee M. Gavens ,  Idan Alrod

    发明人： Chris Nga Yee Avila ,  Jianmin Huang ,  Lee M. Gavens ,  Idan Alrod

    IPC分类号： G06F11/00 ,  H03M13/05

    CPC分类号： G11C16/28 ,  G11C29/50004 ,  G11C2211/5634 ,  G11C2211/5641

    摘要： A non-volatile memory chip having SLC blocks acting as a write cache for MLC blocks for high density storage requires constant copying or folding of SLC blocks into MLC blocks. To avoid the time-consuming toggling out and in of the pages of the entire SLC block for ECC checking by a controller chip, only a small sample is checked. An optimal read point for reading the memory cells in the sample of the SLC block is dynamically determined by trying different read points so that the data is read within an error budget. Once the optimal read point is determined, it is used to read the entire SLC block without further error checking. Then the SLC block can be copied (blind folded) to the MLC block with the confidence of being within the error budget.

    摘要翻译： 具有作为用于高密度存储的MLC块的写高速缓存的SLC块的非易失性存储器芯片需要将SLC块复制或折叠到MLC块中。 为了避免在控制器芯片进行ECC检查的整个SLC块的页面中耗费时间的切换，仅检查小样本。 通过尝试不同的读取点动态地确定用于读取SLC块样本中的存储单元的最佳读取点，以便在错误预算内读取数据。 一旦确定了最佳读取点，它将用于读取整个SLC块而无需进一步的错误检查。 然后可以将SLC块复制（盲目折叠）到MLC块，其置信度在错误预算之内。