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公开(公告)号：US5512783A
公开(公告)日：1996-04-30
申请号：US958448
申请日：1992-10-07
CPC分类号： H01L23/50 , H01L25/105 , H01L2225/1029 , H01L2924/0002
摘要： A semiconductor chip package comprising at least one semiconductor chip disposed in a package and a plurality of first and second pins extending from the package, which first pins are electrically connected to the at least one semiconductor chip and are adapted to conduct signals between the at least one semiconductor chip and external circuitry, the first pins being divided into a plurality of groups, each group representing a respective signal type, and which second pins are not electrically connected to the at least one semiconductor chip, the first pins of at least one group and the second pins being asymmetrically disposed along edges of the package and the remaining groups of first pins being symmetrically disposed along edges of the package. The invention also provides a stacked module of the semiconductor chip packages.
摘要翻译： 一种半导体芯片封装，其包括设置在封装中的至少一个半导体芯片以及从所述封装延伸的多个第一和第二引脚，所述第一引脚电连接到所述至少一个半导体芯片，并且适于在所述至少一个半导体芯片之间传导信号 一个半导体芯片和外部电路，所述第一引脚被分成多个组，每个组表示相应的信号类型，并且所述第二引脚不与所述至少一个半导体芯片电连接，所述至少一个组的第一引脚 并且所述第二销沿着所述封装的边缘不对称地设置，并且所述剩余的第一销的组沿着所述封装的边缘对称地设置。 本发明还提供了半导体芯片封装的堆叠模块。
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公开(公告)号：US5892466A
公开(公告)日：1999-04-06
申请号：US616522
申请日：1996-03-19
CPC分类号： H04L25/4925 , H03M5/18
摘要： A method of encoding first and second symbols each having n binary bits into first and second code words each having n-1 ternary trits is disclosed. The method involves using a preselected bit from each of the first and second symbols to determine which one of at least two groups of code words comprising n-1 trits is used for encoding. An analogous method of decoding is also disclosed. Apparatus for performing the encoding and decoding is disclosed.
摘要翻译： 公开了一种将具有n个二进制位的第一和第二符号编码为每个具有n-1个三进制数的第一和第二代码字的方法。 该方法涉及使用来自第一和第二符号中的每一个的预选位来确定包括n-1个字符串的至少两组代码字中的哪一组被用于编码。 还公开了一种类似的解码方法。 公开了用于执行编码和解码的装置。
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公开(公告)号：US5327127A
公开(公告)日：1994-07-05
申请号：US870393
申请日：1992-04-17
IPC分类号： G06F15/173 , H04L12/56 , H03M7/20
CPC分类号： H04L49/25 , G06F15/17375 , H04L45/00 , H04L45/06 , H04L45/40 , H04L49/106 , H04L49/254 , H04L49/101 , H04L49/30 , H04L49/3018 , H04L49/3027
摘要： A method of encoding data for transmission between computer devices is disclosed in which data is encoded into a plurality of sequences, each sequence containing an equal number of ones and zeros and being of a predetermined bit length. There is a finite set of the permutations of equal numbers of ones and zeros in that predetermined bit length. One subset of the finite set is selected for use as data codes and a second subset is selected for use as control codes.
摘要翻译： 公开了一种对计算机设备之间传输的数据进行编码的方法，其中将数据编码为多个序列，每个序列包含相等数目的1和0并且具有预定的位长度。 在该预定位长度中存在相等数目的1和0的有限组的排列。 选择有限集合的一个子集用作数据代码，并且选择第二子集用作控制代码。
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4.发明授权Apparatus providing addressable storage locations as virtual links and storing predefined destination information for any messages transmitted on virtual links at these locations 失效提供可寻址存储位置作为虚拟链路的装置，并且存储用于在这些位置的虚拟链路上发送的任何消息的预定目的地信息
公开(公告)号：US5495619A
公开(公告)日：1996-02-27
申请号：US229055
申请日：1994-04-18
IPC分类号： G06F15/16 , G06F9/46 , G06F13/00 , G06F15/17 , G06F15/173 , G06F15/177 , H04L29/00
CPC分类号： G06F15/17343 , G06F15/17 , H04L29/00
摘要： A computer device comprises a processor for executing a plurality of concurrent processes each comprising a sequence of instructions, memory including RAM, at least one message link having input and output pins for connection to a device separate from said computer device and for transmitting message packets sequentially between the computer device and said separate device, and communication control circuitry coupled to said processor, to said memory, and to said message link. The memory provides a plurality of addressable virtual communication links. The communication control circuitry is operable:(i) in response to execution of a message instruction by said processor to address a selected one of said virtual communication links and load into the selected one information regarding the message to be effected via the virtual communication link; and(ii) to control sequential transmission through said one message link of message packets relating to a plurality of virtual communication links.A network of such computer devices and a method of operation is also described. The provision of virtual links enables several messages to be multiplexed down a single message link of the microcomputer.
摘要翻译： 计算机设备包括用于执行多个并行处理的处理器，每个处理器包括一系列指令，存储器包括RAM，至少一个消息链路，其具有用于连接到与所述计算机设备分离的设备的输入和输出引脚，并用于顺序发送消息分组 在计算机设备和所述单独设备之间，以及耦合到所述处理器的通信控制电路，所述存储器和所述消息链路。 存储器提供多个可寻址的虚拟通信链路。 通信控制电路可操作：（i）响应于所述处理器执行消息指令以对所选虚拟通信链路中的所选一个进行寻址，并且通过虚拟通信链路加载所选择的一个关于要进行消息的信息; 以及（ii）控制通过与多个虚拟通信链路相关的消息分组的所述一个消息链路的顺序传输。 还描述了这种计算机设备的网络和操作方法。 虚拟链路的提供使多个消息可以在微计算机的单个消息链路下复用。
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公开(公告)号：US5165067A
公开(公告)日：1992-11-17
申请号：US782863
申请日：1991-10-15
CPC分类号： H01L23/50 , H01L25/105 , H01L2225/1029 , H01L2924/0002
摘要： A semiconductor chip package comprising at least one semiconductor chip disposed in a package and a plurality of first and second pins extending from the package, which first pins are electrically connected to the at least one semiconductor chip and are adapted to conduct signals between the at least one semiconductor chip and external circuitry, the first pins being divided into a plurality of groups, each group representing a respective signal type, and which second pins are not electrically connected to the at least one semiconductor chip, the first pins of at least one group and the second pins being asymmetrically disposed along edges of the package and the remaining groups of first pins being symmetrically disposed along edges of the package. The invention also provides a stacked module of the semiconductor chip package.
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公开(公告)号：US5553067A
公开(公告)日：1996-09-03
申请号：US319951
申请日：1994-10-07
CPC分类号： H04L1/0083 , H03M13/093
摘要： A scheme for altering checking information in a message packet intended to be transmitted between computers is described. In this scheme, when an information portion of the packet is altered, checking bits contained in the packets are altered in dependence only on the set of checking bits in the message packet before modification of the information portion and on the modifications to the information portion. Thus, it is not necessary to generate new checking bits from a modified information portion.
摘要翻译： 描述了用于改变计算机之间要发送的消息包中的检查信息的方案。 在该方案中，当分组的信息部分被改变时，检查包中包含的比特是根据在修改信息部分之前的消息包中的一组检查比特和对该信息部分的修改而改变的。 因此，不需要从修改的信息部分生成新的检查位。
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公开(公告)号：US5130977A
公开(公告)日：1992-07-14
申请号：US546092
申请日：1990-06-29
IPC分类号： G06F15/173 , H04L12/56
CPC分类号： H04L49/25 , G06F15/17375 , H04L45/00 , H04L45/06 , H04L45/40 , H04L49/106 , H04L49/254 , H04L49/101 , H04L49/30 , H04L49/3018 , H04L49/3027
摘要： A routing switch includes an input for receiving serial packets from a source node in a computer network, a plurality of outputs, switch circuitry for selectively interconnecting said input to a selected one of said outputs and header reading circuitry for reading the header portion of a packet received at the input prior to receiving all of the packet. The switch also has a random header generator which produces header portions generated at random which are then read by the header reading circuitry. The header reading circuitry is coupled to the switch circuitry to connect to said input one of said outputs in dependence on said random header. The random header portion is then discarded at the routing switch identified thereby to reveal the original header.
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公开(公告)号：US5073816A
公开(公告)日：1991-12-17
申请号：US557940
申请日：1990-07-25
IPC分类号： H01L21/60 , H01L21/66 , H01L23/057 , H01L23/498 , H01L23/58 , H01L25/04 , H01L25/065 , H01L25/18 , H01L27/10
CPC分类号： H01L22/32 , H01L22/20 , H01L23/057 , H01L23/498 , H01L24/49 , H01L25/0655 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L24/48 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/30107 , H01L2924/3025
摘要： A semiconductor device comprising at least one semiconductor chip, the or each semiconductor chip having a plurality of chip bonding pads, a package which encloses the at least one semiconductor chip, a first level interconnect comprising a printed circuit which overlies the at least one semiconductor chip in the package and extends externaly of the package to provide a plurality of outer leads, and a second level interconnect comprising means for electrically connecting the chip bonding pads to selected contacts on the printed circuit, which contacts overlie the at least one semiconductor chip. The invention also relates to a method of manufacturing such a semiconductor device and to a method of assembling a semiconductor assembly.
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公开(公告)号：US5818362A
公开(公告)日：1998-10-06
申请号：US616521
申请日：1996-03-19
CPC分类号： H03M5/18 , H04L25/4925
摘要： A method of encoding a five bit symbol into a four trit code word is disclosed, comprising defining out of forty-eight combinations of four trit code words three groups, each group containing sixteen code words, each code word within a group having a Hamming distance of at least two from any other code word in the group, and each code word being associated with a particular combination of four bits selected from said five bit symbol. An analogous method of decoding is also disclosed. Apparatus for performing the encoding and decoding is disclosed.
摘要翻译： 公开了一种将五位符号编码成四字代码字的方法，包括定义四个代码字三组的四十八个组合，每组包含十六个代码字，组中的每个代码字具有汉明距离 至少两个来自组中的任何其他码字，并且每个码字与从所述五位符号中选择的四位的特定组合相关联。 还公开了一种类似的解码方法。 公开了用于执行编码和解码的装置。
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公开(公告)号：US5140583A
公开(公告)日：1992-08-18
申请号：US546402
申请日：1990-06-29
IPC分类号： G06F15/16 , G06F9/46 , G06F15/163 , G06F15/173 , G06F15/177 , H04L12/56 , H04Q11/04
CPC分类号： H04L49/30 , G06F15/17375 , H04L45/06 , H04L45/40 , H04L49/106 , H04L49/251 , H04Q11/0478 , H04L49/101 , H04L49/254 , H04L49/3009 , H04L49/3018 , H04L49/3027
摘要： A routing switch includes an input for receiving serial packets from a source node in a computer network, a plurality of outputs each designating a respective range of destination node identifications, switch circuitry for selectively interconnecting said input to a selected one of said outputs and header reading circuitry for reading the header portion of a packet received at the input prior to receiving all of the packet. The header reading circuitry is coupled to the switch circuitry to connect to said input one of said outputs having a node identification range including the node identification of said header portion.There is also provided a computer network, having a plurality of computer devices and at least one routing switch, and a method of routing messages through such a network.
摘要翻译： 路由交换机包括用于从计算机网络中的源节点接收串行分组的输入，多个输出，每个输出指定目的地节点标识的相应范围，用于选择性地将所述输入互连到所述输出中的所选输出和报头读取的开关电路 用于在接收到所有分组之前读取在输入端接收到的分组的报头部分的电路。 标题读取电路耦合到开关电路以连接到具有包括所述标题部分的节点标识的节点标识范围的所述输出中的所述输入端之一。 还提供了具有多个计算机设备和至少一个路由交换机的计算机网络以及通过这样的网络路由消息的方法。
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