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公开(公告)号:US11735563B2
公开(公告)日:2023-08-22
申请号:US17512123
申请日:2021-10-27
Applicant: Invensas LLC
Inventor: Ellis Chau , Reynaldo Co , Roseann Alatorre , Philip Damberg , Wei-Shun Wang , Se Young Yang
IPC: H01L23/00 , H01L23/31 , H01L23/498 , H01L21/56 , H01L25/10 , H01L25/00 , H01L23/495 , H01L21/48 , H01L23/367 , H01L23/433 , H01L25/065 , H05K3/34
CPC classification number: H01L24/85 , H01L21/4853 , H01L21/56 , H01L23/3128 , H01L23/3677 , H01L23/4334 , H01L23/49517 , H01L23/49811 , H01L23/49816 , H01L24/06 , H01L24/43 , H01L24/78 , H01L25/105 , H01L25/50 , H01L21/565 , H01L23/3114 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0655 , H01L25/0657 , H01L2224/0401 , H01L2224/05599 , H01L2224/131 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/45015 , H01L2224/4554 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/4824 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/48245 , H01L2224/48247 , H01L2224/48997 , H01L2224/49171 , H01L2224/73204 , H01L2224/73207 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/78301 , H01L2224/851 , H01L2224/8518 , H01L2224/85399 , H01L2224/85951 , H01L2224/85986 , H01L2225/0651 , H01L2225/06506 , H01L2225/06513 , H01L2225/06517 , H01L2225/06558 , H01L2225/06562 , H01L2225/06565 , H01L2225/06568 , H01L2225/1023 , H01L2225/1029 , H01L2225/1052 , H01L2225/1058 , H01L2225/1088 , H01L2225/1094 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01013 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/01049 , H01L2924/12042 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311 , H01L2924/15331 , H01L2924/1715 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H01L2924/3511 , H05K3/3436 , H05K2201/1053 , H05K2201/10515 , Y10T29/49149 , Y10T29/49151 , H01L2224/45565 , H01L2224/45147 , H01L2224/45664 , H01L2224/45565 , H01L2224/45144 , H01L2224/45664 , H01L2924/19107 , H01L2224/45144 , H01L2224/45565 , H01L2224/45664 , H01L2924/19107 , H01L2224/45147 , H01L2224/45565 , H01L2224/45664 , H01L2224/78301 , H01L2924/00014 , H01L2224/85986 , H01L2224/8518 , H01L2224/85951 , H01L2224/49171 , H01L2224/48227 , H01L2924/00 , H01L2224/49171 , H01L2224/48247 , H01L2924/00 , H01L2224/4824 , H01L2224/49171 , H01L2924/00 , H01L2224/73265 , H01L2224/32145 , H01L2224/48227 , H01L2924/00012 , H01L2224/73265 , H01L2224/32225 , H01L2224/48227 , H01L2924/00012 , H01L2224/73265 , H01L2224/32145 , H01L2224/48145 , H01L2924/00012 , H01L2224/73265 , H01L2224/32245 , H01L2224/48247 , H01L2924/00012 , H01L2224/45144 , H01L2924/00 , H01L2224/45124 , H01L2924/00 , H01L2224/45147 , H01L2924/00 , H01L2224/73265 , H01L2224/32145 , H01L2224/48247 , H01L2924/00 , H01L2224/73204 , H01L2224/16225 , H01L2224/32225 , H01L2924/00 , H01L2224/73265 , H01L2224/32245 , H01L2224/48227 , H01L2924/00 , H01L2224/73265 , H01L2224/32225 , H01L2224/48247 , H01L2924/00 , H01L2224/73204 , H01L2224/16145 , H01L2224/32145 , H01L2924/00 , H01L2224/131 , H01L2924/014 , H01L2924/15311 , H01L2224/73265 , H01L2224/32225 , H01L2224/48227 , H01L2924/00 , H01L2924/15311 , H01L2224/73204 , H01L2224/16225 , H01L2224/32225 , H01L2924/00 , H01L2924/01047 , H01L2924/00 , H01L2224/48091 , H01L2924/00014 , H01L2224/45015 , H01L2924/00 , H01L2224/45144 , H01L2924/00014 , H01L2224/45147 , H01L2924/00014 , H01L2924/181 , H01L2924/00 , H01L2924/12042 , H01L2924/00 , H01L2924/181 , H01L2924/00012 , H01L2224/45015 , H01L2924/20751 , H01L2224/45015 , H01L2924/20752 , H01L2224/45015 , H01L2924/20753 , H01L2224/45015 , H01L2924/20754 , H01L2224/45015 , H01L2924/20755 , H01L2224/45015 , H01L2924/20756 , H01L2224/45015 , H01L2924/20757 , H01L2224/45015 , H01L2924/20758 , H01L2224/45015 , H01L2924/20759 , H01L2224/45015 , H01L2924/2076 , H01L2224/85399 , H01L2924/00014 , H01L2224/05599 , H01L2924/00014 , H01L2924/00011 , H01L2924/01049
Abstract: A microelectronic package includes a substrate having a first surface. A microelectronic element overlies the first surface. Electrically conductive elements are exposed at the first surface of the substrate, at least some of which are electrically connected to the microelectronic element. The package includes wire bonds having bases bonded to respective ones of the conductive elements and ends remote from the substrate and remote from the bases. The ends of the wire bonds are defined on tips of the wire bonds, and the wire bonds define respective first diameters between the bases and the tips thereof. The tips have at least one dimension that is smaller than the respective first diameters of the wire bonds. A dielectric encapsulation layer covers portions of the wire bonds, and unencapsulated portions of the wire bonds are defined by portions of the wire bonds, including the ends, are uncovered by the encapsulation layer.
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公开(公告)号:US20180323179A1
公开(公告)日:2018-11-08
申请号:US16038621
申请日:2018-07-18
Applicant: Micron Technology, Inc.
Inventor: Meow Koon Eng , Yong Poo Chia , Suan Jeung Boon
IPC: H01L25/10 , H01L25/00 , H01L23/00 , H01L23/31 , H01L23/495 , H01L23/498 , H01L21/50 , H01L21/56
CPC classification number: H01L25/105 , H01L21/50 , H01L21/568 , H01L23/3121 , H01L23/3128 , H01L23/49555 , H01L23/49811 , H01L23/49861 , H01L24/11 , H01L24/17 , H01L24/18 , H01L24/19 , H01L24/20 , H01L24/27 , H01L24/32 , H01L24/33 , H01L24/83 , H01L24/96 , H01L24/97 , H01L25/50 , H01L2224/04105 , H01L2224/05548 , H01L2224/05568 , H01L2224/05573 , H01L2224/12105 , H01L2224/16 , H01L2224/16258 , H01L2224/17106 , H01L2225/1023 , H01L2225/1029 , H01L2225/1035 , H01L2225/1058 , H01L2225/1064 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/1434 , H01L2924/181 , H01L2924/00 , H01L2924/00014
Abstract: Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked packages includes a first die package having a bottom side, a first dielectric casing, and first metal leads; a second die package having a top side attached to the bottom side of the first package, a dielectric casing with a lateral side, and second metal leads aligned with and projecting towards the first metal leads and including an exterior surface and an interior surface region that generally faces the lateral side; and metal solder connectors coupling individual first leads to individual second leads. In a further embodiment, the individual second leads have an “L” shape and physically contact corresponding individual first leads. In another embodiment, the individual second leads have a “C” shape and include a tiered portion that projects towards the lateral side of the second casing.
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公开(公告)号:US20180254213A1
公开(公告)日:2018-09-06
申请号:US15971466
申请日:2018-05-04
Applicant: Tessera, Inc.
Inventor: Vage Oganesian , Belgacem Haba , Craig Mitchell , Ilyas Mohammed , Piyush Savalia
IPC: H01L21/768 , H01L25/10 , H01L25/11 , H01L25/16 , H01L25/00 , H01L23/00 , H01L23/538 , H01L23/498 , H01L23/31 , H01L23/13
CPC classification number: H01L21/76819 , H01L21/76877 , H01L23/13 , H01L23/3128 , H01L23/49827 , H01L23/4985 , H01L23/5389 , H01L24/18 , H01L24/19 , H01L24/24 , H01L24/25 , H01L24/82 , H01L24/97 , H01L25/105 , H01L25/117 , H01L25/16 , H01L25/50 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/16235 , H01L2224/24227 , H01L2224/24247 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/82 , H01L2224/92244 , H01L2224/97 , H01L2225/1023 , H01L2225/1029 , H01L2225/1035 , H01L2225/1041 , H01L2225/1052 , H01L2225/1058 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01061 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/07811 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15156 , H01L2924/15165 , H01L2924/15192 , H01L2924/15311 , H01L2924/15313 , H01L2924/15331 , H01L2924/157 , H01L2924/15788 , H01L2924/18161 , Y10T29/49002 , H01L2224/81 , H01L2924/00 , H01L2224/83
Abstract: A microelectronic unit can include a carrier structure having a front surface, a rear surface remote from the front surface, and a recess having an opening at the front surface and an inner surface located below the front surface of the carrier structure. The microelectronic unit can also include a microelectronic element having a top surface adjacent the inner surface, a bottom surface remote from the top surface, and a plurality of contacts at the top surface. The microelectronic unit can also include terminals electrically connected with the contacts of the microelectronic element. The terminals can be electrically insulated from the carrier structure. The microelectronic unit can also include a dielectric region contacting at least the bottom surface of the microelectronic element. The dielectric region can define a planar surface located coplanar with or above the front surface of the carrier structure.
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公开(公告)号:US20180233440A1
公开(公告)日:2018-08-16
申请号:US15911500
申请日:2018-03-05
Inventor: Edward Law , Sam Ziqun Zhao , Kunzhong Hu , Rezaur Rahman Khan
CPC classification number: H01L23/49811 , H01L21/4853 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/78 , H01L23/3121 , H01L23/3128 , H01L23/49833 , H01L23/5389 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L24/97 , H01L2224/0401 , H01L2224/04042 , H01L2224/05124 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05672 , H01L2224/06135 , H01L2224/13082 , H01L2224/131 , H01L2224/13111 , H01L2224/13139 , H01L2224/13147 , H01L2224/16225 , H01L2224/16245 , H01L2224/29012 , H01L2224/29014 , H01L2224/29015 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/45664 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81191 , H01L2224/81815 , H01L2224/83 , H01L2224/83191 , H01L2224/83192 , H01L2224/83193 , H01L2224/83855 , H01L2224/92125 , H01L2224/92225 , H01L2224/92247 , H01L2224/97 , H01L2225/1023 , H01L2225/1029 , H01L2225/1041 , H01L2924/00 , H01L2924/00011 , H01L2924/01005 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/15321 , H01L2924/15331 , H01L2924/15787 , H01L2924/1579 , H01L2924/181 , H01L2924/00012 , H01L2224/81 , H01L2224/85 , H01L2924/00014
Abstract: A reconstituted semiconductor package and a method of making a reconstituted semiconductor package are described. An array of die-attach substrates is formed onto a carrier. A semiconductor device is mounted onto a first surface of each of the die-attach substrates. An interposer substrate is mounted over each of the semiconductor devices. The interposer substrates are electrically connected to the first surface of the respective die-attach substrates. A molding compound is filled in open spaces within and between the interposer substrates mounted to their respective die-attach substrates to form an array of reconstituted semiconductor packages. Electrical connections are mounted to a second surface of the die-attach substrates. The array of reconstituted semiconductor packages is singulated through the molding compound between each of the die-attach substrates and respective mounted interposer substrates.
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公开(公告)号:US09966303B2
公开(公告)日:2018-05-08
申请号:US15600228
申请日:2017-05-19
Applicant: Tessera, Inc.
Inventor: Vage Oganesian , Belgacem Haba , Craig Mitchell , Ilyas Mohammed , Piyush Savalia
IPC: H01L21/768 , H01L23/538 , H01L23/00 , H01L25/10 , H01L25/00 , H01L25/16 , H01L25/11 , H01L23/13 , H01L23/31 , H01L23/498
CPC classification number: H01L21/76819 , H01L21/76877 , H01L23/13 , H01L23/3128 , H01L23/49827 , H01L23/4985 , H01L23/5389 , H01L24/18 , H01L24/19 , H01L24/24 , H01L24/25 , H01L24/82 , H01L24/97 , H01L25/105 , H01L25/117 , H01L25/16 , H01L25/50 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/16235 , H01L2224/24227 , H01L2224/24247 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/82 , H01L2224/92244 , H01L2224/97 , H01L2225/1023 , H01L2225/1029 , H01L2225/1035 , H01L2225/1041 , H01L2225/1052 , H01L2225/1058 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01061 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/07811 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15156 , H01L2924/15165 , H01L2924/15192 , H01L2924/15311 , H01L2924/15313 , H01L2924/15331 , H01L2924/157 , H01L2924/15788 , H01L2924/18161 , Y10T29/49002 , H01L2224/81 , H01L2924/00 , H01L2224/83
Abstract: A microelectronic unit can include a carrier structure having a front surface, a rear surface remote from the front surface, and a recess having an opening at the front surface and an inner surface located below the front surface of the carrier structure. The microelectronic unit can also include a microelectronic element having a top surface adjacent the inner surface, a bottom surface remote from the top surface, and a plurality of contacts at the top surface. The microelectronic unit can also include terminals electrically connected with the contacts of the microelectronic element. The terminals can be electrically insulated from the carrier structure. The microelectronic unit can also include a dielectric region contacting at least the bottom surface of the microelectronic element. The dielectric region can define a planar surface located coplanar with or above the front surface of the carrier structure.
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6.
公开(公告)号:US20180076103A1
公开(公告)日:2018-03-15
申请号:US15629072
申请日:2017-06-21
Applicant: Hyung-jun JEON , Nae-in LEE , Byung-lyul PARK
Inventor: Hyung-jun JEON , Nae-in LEE , Byung-lyul PARK
IPC: H01L23/045 , H01L23/047 , H01L25/10
CPC classification number: H01L23/045 , H01L23/047 , H01L23/3128 , H01L23/5385 , H01L23/5389 , H01L24/19 , H01L25/105 , H01L2224/04105 , H01L2224/12105 , H01L2225/1029 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/1434 , H01L2924/1436 , H01L2924/1437 , H01L2924/15311 , H01L2924/3511
Abstract: A semiconductor package of a package on package type includes a lower package including a printed circuit board (PCB) substrate including a plurality of base layers and a cavity penetrating the plurality of base layers, a first semiconductor chip in the cavity. a redistribution structure on a first surface of the PCB substrate and on an active surface of the first semiconductor chip, a first cover layer covering the redistribution structure, and the second cover layer covering a second surface of the PCB substrate and an inactive surface of the first semiconductor chip, and an upper package on the second cover layer of the lower package and including a second semiconductor chip.
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公开(公告)号:US09913375B2
公开(公告)日:2018-03-06
申请号:US15276073
申请日:2016-09-26
Applicant: International Business Machines Corporation
Inventor: Ai Kiar Ang , Michael Lauri
IPC: H01L23/02 , H05K1/11 , H05K1/18 , H05K3/32 , H05K3/34 , H05K1/14 , H01L23/495 , H01L25/10 , H01L25/00 , H01L21/48 , H05K1/03
CPC classification number: H05K1/11 , H01L21/4839 , H01L23/49537 , H01L23/49555 , H01L23/49565 , H01L23/49575 , H01L25/105 , H01L25/50 , H01L2225/1029 , H01L2924/181 , H05K1/0313 , H05K1/144 , H05K1/18 , H05K1/181 , H05K3/328 , H05K3/341 , H05K3/3421 , H05K3/3426 , H05K2201/10015 , H05K2201/10227 , H05K2201/10515 , H05K2201/1053 , H05K2201/10962 , Y02P70/613 , H01L2924/00012
Abstract: A method includes forming a multi-stacked electronic device having two or more electronic components, each of the electronic components includes a leadframe, the leadframes of each electronic component are physically joined together using a non-solder metal joining process to form a joint, and the joint is located outside a solder connection region.
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公开(公告)号:US20180025967A1
公开(公告)日:2018-01-25
申请号:US15715725
申请日:2017-09-26
Applicant: Tessera, Inc.
Inventor: Belgacem Haba , Richard Dewitt Crisp , Wael Zohni
IPC: H01L23/50 , H01L25/10 , H01L25/065 , H01L23/00 , H01L23/498 , H01L23/31 , H01L25/16 , H01L23/13 , H01L25/18
CPC classification number: H01L23/50 , H01L23/13 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0652 , H01L25/0657 , H01L25/105 , H01L25/16 , H01L25/18 , H01L2224/0401 , H01L2224/04042 , H01L2224/05599 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/06135 , H01L2224/06136 , H01L2224/13099 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/16245 , H01L2224/29101 , H01L2224/29191 , H01L2224/32145 , H01L2224/32225 , H01L2224/32227 , H01L2224/32245 , H01L2224/45099 , H01L2224/48095 , H01L2224/48137 , H01L2224/48145 , H01L2224/48227 , H01L2224/4824 , H01L2224/48247 , H01L2224/4826 , H01L2224/48472 , H01L2224/4911 , H01L2224/49112 , H01L2224/49175 , H01L2224/73203 , H01L2224/73204 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06562 , H01L2225/06575 , H01L2225/06589 , H01L2225/1023 , H01L2225/1029 , H01L2225/1047 , H01L2225/1052 , H01L2225/1058 , H01L2225/107 , H01L2924/0001 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01049 , H01L2924/0105 , H01L2924/01076 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/10329 , H01L2924/12 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/1431 , H01L2924/1433 , H01L2924/1435 , H01L2924/1436 , H01L2924/1437 , H01L2924/1438 , H01L2924/1443 , H01L2924/14511 , H01L2924/15151 , H01L2924/15165 , H01L2924/1517 , H01L2924/15172 , H01L2924/15182 , H01L2924/15311 , H01L2924/15331 , H01L2924/157 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/181 , H01L2924/19107 , H01L2924/3011 , H01L2924/00 , H01L2924/00012
Abstract: A microelectronic assembly can include a substrate having first and second surfaces and an aperture extending therebetween, the substrate having terminals. The assembly can also include a first microelectronic element having a front surface facing the first surface of the substrate, a second microelectronic element having a front surface facing the first microelectronic element and projecting beyond an edge of the first microelectronic element, first and second leads electrically connecting contacts of the respective first and second microelectronic elements to the terminals, and third leads electrically interconnecting the contacts of the first and second microelectronic elements. The contacts of the first microelectronic element can be exposed at the front surface thereof adjacent the edge thereof. The contacts of the second microelectronic element can be disposed in a central region of the front surface thereof. The first, second, and third leads can have portions aligned with the aperture.
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9.
公开(公告)号:US20170200669A1
公开(公告)日:2017-07-13
申请号:US15470494
申请日:2017-03-27
Applicant: STMicroelectronics S.r.l.
Inventor: Fulvio Vittorio Fontana
IPC: H01L23/495 , H01L23/498 , H01L21/683 , H01L21/48 , H01L21/56
CPC classification number: H01L23/4951 , H01L21/4825 , H01L21/4842 , H01L21/561 , H01L21/563 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L23/3114 , H01L23/49503 , H01L23/4952 , H01L23/49541 , H01L23/49548 , H01L23/49558 , H01L23/49579 , H01L23/49805 , H01L2221/68381 , H01L2224/16227 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2224/81005 , H01L2224/83005 , H01L2224/85005 , H01L2224/92247 , H01L2224/97 , H01L2225/1029 , H01L2225/1058 , H01L2924/181 , H01L2224/81 , H01L2224/83 , H01L2224/85 , H01L2924/00012
Abstract: A process for manufacturing a surface-mount electronic device includes forming a plurality of preliminary contact regions of a sinterable material on a supporting structure, the supporting structure being of a soluble type. A chip including a semiconductor body is mechanically coupled to the supporting structure. The sinterable material is sintered such that each preliminary contact region forms a corresponding sintered preliminary contact, and the chip and the plurality of preliminary contact regions are coated with a dielectric coating region, and the supporting structure is removed using a jet of liquid.
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公开(公告)号:US09666513B2
公开(公告)日:2017-05-30
申请号:US15342744
申请日:2016-11-03
Applicant: Invensas Corporation
Inventor: Ashok S. Prabhu , Rajesh Katkar , Sean Moran
IPC: H01L23/552 , H01L23/495 , H01L23/29 , H01L23/31 , H01L21/56 , H01L25/10 , H01L25/00 , H01L23/00
CPC classification number: H01L23/49575 , H01L21/56 , H01L21/561 , H01L21/568 , H01L23/295 , H01L23/3107 , H01L23/49541 , H01L23/49568 , H01L23/552 , H01L24/24 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/82 , H01L24/85 , H01L24/96 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2224/04042 , H01L2224/04105 , H01L2224/12105 , H01L2224/24175 , H01L2224/32145 , H01L2224/32245 , H01L2224/48091 , H01L2224/48145 , H01L2224/48247 , H01L2224/48465 , H01L2224/48471 , H01L2224/49175 , H01L2224/73265 , H01L2224/85005 , H01L2224/97 , H01L2225/1029 , H01L2225/1035 , H01L2225/1064 , H01L2225/107 , H01L2225/1094 , H01L2924/00014 , H01L2924/181 , H01L2924/18162 , H01L2924/18165 , H01L2924/3025 , H01L2924/00012 , H01L2224/85 , H01L2224/83 , H01L2224/82 , H01L2924/00 , H01L2224/05599 , H01L2224/45099 , H01L2224/85399
Abstract: An assembly includes a plurality of stacked encapsulated microelectronic packages, each package including a microelectronic element having a front surface with a plurality of chip contacts at the front surface and edge surfaces extending away from the front surface. An encapsulation region of each package contacts at least one edge surface and extends away therefrom to a remote surface of the package. The package contacts of each package are disposed at a single one of the remote surfaces, the package contacts facing and coupled with corresponding contacts at a surface of a substrate nonparallel with the front surfaces of the microelectronic elements therein.
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