公开(公告)号：US08049650B2

公开(公告)日：2011-11-01

申请号：US12727522

申请日：2010-03-19

Applicant: Chun-Wei Lin ,  Cheng-En Ho

Inventor： Chun-Wei Lin ,  Cheng-En Ho

IPC: H03M1/10

CPC classification number: H03M1/109 ,  H03M1/66

Abstract: A method for testing a digital to analog converter, which operates in an undersampling environment, wherein signals of a tested DAC and a signal generator are modulated by a PWM device and then processed by a digital processing circuit to generate a digital signal, whereby is formed a low-speed equivalent ADC. The signal generator is provided by uniform-distribution random test patterns, and the signal generator generates an uniform-distribution random analog signal to the equivalent ADC. Thereby, the test error caused by the non-ideality of the signal generator is corrected, and the tested circuit can work in a full speed.

Abstract translation: 一种用于测试在欠采样环境中操作的数模转换器的方法，其中测试DAC和信号发生器的信号由PWM装置调制，然后由数字处理电路处理以产生数字信号，由此形成 低速等效ADC。 信号发生器由均匀分布随机测试模式提供，信号发生器产生均匀分布随机模拟信号到等效ADC。 因此，由信号发生器的非理想性引起的测试误差被校正，并且被测电路可以全速工作。

公开(公告)号：US20110227769A1

公开(公告)日：2011-09-22

申请号：US12727522

申请日：2010-03-19

Applicant: Chun-Wei Lin ,  Cheng-En Ho

Inventor： Chun-Wei Lin ,  Cheng-En Ho

IPC: H03M1/10

CPC classification number: H03M1/109 ,  H03M1/66

Abstract: A method for testing a digital to analog converter, which operates in an undersampling environment, wherein signals of a tested DAC and a signal generator are modulated by a PWM device and then processed by a digital processing circuit to generate a digital signal, whereby is formed a low-speed equivalent ADC. The signal generator is provided by uniform-distribution random test patterns, and the signal generator generates an uniform-distribution random analog signal to the equivalent ADC. Thereby, the test error caused by the non-ideality of the signal generator is corrected, and the tested circuit can work in a full speed.

Abstract translation: 一种用于测试在欠采样环境中操作的数模转换器的方法，其中测试DAC和信号发生器的信号由PWM装置调制，然后由数字处理电路处理以产生数字信号，由此形成 低速等效ADC。 信号发生器由均匀分布随机测试模式提供，信号发生器产生均匀分布随机模拟信号到等效ADC。 因此，由信号发生器的非理想性引起的测试误差被校正，并且被测电路可以全速工作。

公开(公告)号：US07497318B2

公开(公告)日：2009-03-03

申请号：US11714768

申请日：2007-03-07

Applicant: Chun-Wei Lin

Inventor： Chun-Wei Lin

IPC: B65G47/26

CPC classification number: B65G47/525 ,  B65G47/29 ,  B65G47/8815 ,  B65G2201/022 ,  B65H29/66 ,  B65H33/12 ,  B65H2406/31 ,  B65H2406/364 ,  B65H2701/1762

Abstract: The present invention discloses a conveying and stacking device for corrugated boards, which is used in a conveyor of a corrugated board production line to stack corrugated boards by a specified number and comprises an exhaust facing the downstream of the conveyor and a sucker arranged at the upstream of the exhaust and facing the procession of the corrugated boards. The sucker and the exhaust are arranged in an elevator for elevating the corrugated boards and respectively suck air and exhaust air simultaneously.

Abstract translation: 本发明公开了一种用于瓦楞纸板的输送和堆放装置，其用于波纹板生产线的输送机中，将波纹板堆叠成特定数量，并包括面向输送机下游的排气口和布置在上游的吸盘 的排气并面对瓦楞纸板的游行。 吸盘和排气装置布置在用于升高瓦楞纸板的电梯中，并分别同时吸入空气和废气。

公开(公告)号：US07326870B2

公开(公告)日：2008-02-05

申请号：US11196253

申请日：2005-08-04

Applicant: Chun-Wei Lin ,  Yu-Tsai Wang ,  Yu-Yen Lien

Inventor： Chun-Wei Lin ,  Yu-Tsai Wang ,  Yu-Yen Lien

IPC: H01H13/14 ,  H01H11/00

CPC classification number: H01H13/702 ,  H01H2209/0021 ,  H01H2219/018 ,  H01H2219/03 ,  H01H2221/05 ,  H01H2229/047 ,  H01H2229/048 ,  Y10T29/49105

Abstract: A key module and its manufacturing method are provided in the present invention. The steps of the method include: providing a mold; forming a key body having multiple opening portions on the mold; jostling a combination of a display body and an elastic body to the key body; and finally, tightly attaching the display body to the key body and stuffing the display body into the opening portions of the key body. Therein, the elastic body has a lower end formed with a contact block contacting a circuit board. By compressing, injecting or infusing a silicone rubber material or an elastic material into the opening portions, the gap located between the key body and the display body or between the key body and the elastic body is smaller than 0.01 mm. Thus, the appearance of the key module of the present invention is almost seamless.

Abstract translation: 在本发明中提供了关键模块及其制造方法。 该方法的步骤包括：提供模具; 在模具上形成具有多个开口部分的键体; 将显示体和弹性体的组合推入键体; 最后，将显示体紧紧地安装在键体上，并将显示体填充到键体的开口部。 其中，弹性体具有形成有与电路板接触的接触块的下端。 通过将硅橡胶材料或弹性材料压缩，注入或注入开口部分，位于键体和显示体之间或键体与弹性体之间的间隙小于0.01mm。 因此，本发明的关键模块的外观几乎是无缝的。

公开(公告)号：US20070029182A1

公开(公告)日：2007-02-08

申请号：US11196253

申请日：2005-08-04

Applicant: Chun-Wei Lin ,  Yu-Tsai Wang ,  Yu-Yen Lien

Inventor： Chun-Wei Lin ,  Yu-Tsai Wang ,  Yu-Yen Lien

IPC: H01H1/02

CPC classification number: H01H13/702 ,  H01H2209/0021 ,  H01H2219/018 ,  H01H2219/03 ,  H01H2221/05 ,  H01H2229/047 ,  H01H2229/048 ,  Y10T29/49105

Abstract: A key module and its manufacturing method are provided in the present invention. The steps of the method include: providing a mold; forming a key body having multiple opening portions on the mold; jostling a combination of a display body and an elastic body to the key body; and finally, tightly attaching the display body to the key body and stuffing the display body into the opening portions of the key body. Therein, the elastic body has a lower end formed with a contact block contacting a circuit board. By compressing, injecting or infusing a silicone rubber material or an elastic material into the opening portions, the gap located between the key body and the display body or between the key body and the elastic body is smaller than 0.01 mm. Thus, the appearance of the key module of the present invention is almost seamless.

Abstract translation: 在本发明中提供了关键模块及其制造方法。 该方法的步骤包括：提供模具; 在模具上形成具有多个开口部分的键体; 将显示体和弹性体的组合推入键体; 最后，将显示体紧紧地安装在键体上，并将显示体填充到键体的开口部。 其中，弹性体具有形成有与电路板接触的接触块的下端。 通过将硅橡胶材料或弹性材料压缩，注入或注入开口部分，位于键体和显示体之间或键体与弹性体之间的间隙小于0.01mm。 因此，本发明的关键模块的外观几乎是无缝的。

公开(公告)号：US06716777B2

公开(公告)日：2004-04-06

申请号：US09986336

申请日：2001-11-08

Applicant: Chun-Wei Lin

Inventor： Chun-Wei Lin

IPC: B32B502

CPC classification number: B32B5/02 ,  A45C3/001 ,  B32B5/24 ,  B32B7/12 ,  B32B25/04 ,  B32B27/12 ,  B32B27/16 ,  B32B27/302 ,  B32B2262/0261 ,  B32B2262/0276 ,  B32B2307/4026 ,  C09D175/04 ,  Y10T428/31562 ,  Y10T428/31565 ,  Y10T428/31569 ,  Y10T428/31587 ,  Y10T428/31591 ,  Y10T442/2025 ,  Y10T442/2041 ,  Y10T442/2057 ,  Y10T442/2082 ,  Y10T442/209 ,  Y10T442/2098 ,  Y10T442/2107 ,  Y10T442/2115 ,  Y10T442/2123 ,  Y10T442/2131 ,  Y10T442/2221 ,  Y10T442/2762 ,  Y10T442/277 ,  Y10T442/2861 ,  Y10T442/2893 ,  Y10T442/30 ,  Y10T442/3057 ,  Y10T442/3854

Abstract: A fabric structure is constructed having a fabric base sheet, a viscidity layer, a polymeric back layer, and a protective layer. The polymeric back layer is prepared from SBC (styrenic block copolymer) for the advantage of low specific gravity and preventing the drawback of PVC or the like that pollutes the environment when disposed off. The protective layer is prepared from PU series or modified SBC (styrenic block copolymer) series agent. When the fabric structure used to make a bag, the front surface of the fabric base sheet is disposed outside the bag and the surface of the protective layer is disposed inside the bag.

Abstract translation: 织物结构被构造成具有织物基片，粘性层，聚合物背层和保护层。 由于低比重的优点，聚合物背层由SBC（苯乙烯嵌段共聚物）制备，并且防止了当脱落时污染环境的PVC等的缺点。 保护层由PU系列或改性SBC（苯乙烯嵌段共聚物）系列剂制备。 当用于制造袋子的织物结构时，织物基片的前表面设置在袋的外侧，并且保护层的表面设置在袋内。

公开(公告)号：US20120216167A1

公开(公告)日：2012-08-23

申请号：US13504374

申请日：2010-10-27

Applicant: Chen-Feng Chang ,  Chin-Fang Shen ,  Hsien-Shih Chiu ,  I-Jye Lin ,  Tien-Chang Hsu ,  Yao-Wen Chang ,  Chun-Wei Lin ,  Po-Wei Lee

Inventor： Chen-Feng Chang ,  Chin-Fang Shen ,  Hsien-Shih Chiu ,  I-Jye Lin ,  Tien-Chang Hsu ,  Yao-Wen Chang ,  Chun-Wei Lin ,  Po-Wei Lee

IPC: G06F17/50

CPC classification number: G06F17/5077 ,  H01L23/525 ,  H01L24/02 ,  H01L24/14 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/14131 ,  H01L2224/14136 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311

Abstract: Disclosed herein are rouging methods and devices for a flip-chip package. The flip chip includes several outer pads and several inner pads. The routing method includes: setting an outer sequence based on the arrangement order of the outer pads; setting several inner sequences based on the connection relationships between inner pads and the outer pads; calculating the longest common subsequence of each inner sequence and the outer sequence, defining the connection relationships between the inner pads and the outer pads corresponding to the longest common subsequence as direct connections, and defining the connection relationships between the inner pads and the outer pads that do not correspond to the longest common subsequence as detour connections; establishing the routing scheme of the flip chip based on the connection relationships between the inner pads and the outer pads.

Abstract translation: 这里公开了用于倒装芯片封装的粗化方法和装置。 倒装芯片包括几个外部焊盘和几个内部焊盘。 路由方法包括：基于外部焊盘的布置顺序设置外部序列; 基于内垫和外垫之间的连接关系设置几个内序列; 计算每个内部序列和外部序列的最长公共子序列，将内部焊盘和对应于最长公共子序列的外部焊盘之间的连接关系定义为直接连接，并且限定内部焊盘和外部焊盘之间的连接关系， 不符合迂回连线最长的共同后果; 基于内部焊盘和外部焊盘之间的连接关系建立倒装芯片的布线方案。

公开(公告)号：US08135145B2

公开(公告)日：2012-03-13

申请号：US12507463

申请日：2009-07-22

Applicant: Chun-Wei Lin ,  Yu-Cheng Lin ,  Bing-Shiun Hsieh

Inventor： Chun-Wei Lin ,  Yu-Cheng Lin ,  Bing-Shiun Hsieh

IPC: H04B15/00 ,  H03F3/38 ,  H03F1/04 ,  H03F3/217

CPC classification number: H04R5/04

Abstract: The present invention discloses a multi-level output signal converter, which is connected to an audio amplifier. The audio amplifier comprises a comparing/measuring device, an encoder and an output unit. The multi-level output signal converter comprises a timing processing unit and a multi-level converter. The timing processing unit is connected to the comparing/measuring device and the encoder. The timing processing unit includes a plurality of flip-flops and a timing summing element. The flip-flop receives a first signal from the comparing/measuring device and outputs the first signal to the timing summing element. The encoder converts the first signal into a second signal. The multi-level converter is connected to the encoder and the output unit. The encoder transmits the second signal to the multi-level converter, and the multi-level converter thus outputs a third signal to the output unit.

Abstract translation: 本发明公开了一种连接到音频放大器的多电平输出信号转换器。 音频放大器包括比较/测量装置，编码器和输出单元。 多电平输出信号转换器包括定时处理单元和多电平转换器。 定时处理单元连接到比较/测量装置和编码器。 定时处理单元包括多个触发器和定时求和元件。 触发器从比较/测量装置接收第一信号，并将第一信号输出到定时求和元件。 编码器将第一信号转换成第二信号。 多电平转换器连接到编码器和输出单元。 编码器将第二信号发送到多电平转换器，并且多电平转换器因此向输出单元输出第三信号。

公开(公告)号：US07982642B1

公开(公告)日：2011-07-19

申请号：US12684364

申请日：2010-01-08

Applicant: Chun-Wei Lin ,  Sheng-Feng Lin

Inventor： Chun-Wei Lin ,  Sheng-Feng Lin

IPC: H03M1/10

CPC classification number: H03M1/109 ,  H03M1/66

Abstract: A novel method applies the down-conversion sampling technology to test a high-speed digital-to-analog conversion. In the method, a digital-to-analog conversion output signal of a high-speed digital-to-analog converter and a low-frequency sinusoidal carrier wave signal input to a comparator to obtain a low-speed pulse signal. Therefore, the variation of the pulse width of the low-speed pulse signal can be measured by a common logic analyzer to assess the nonlinearity error of the high-speed digital-to-analog converter.

Abstract translation: 一种新颖的方法应用下转换采样技术来测试高速数模转换。 在该方法中，高速数模转换器的数/模转换输出信号和低频正弦载波信号输入到比较器以获得低速脉冲信号。 因此，低速脉冲信号的脉冲宽度的变化可以由公共逻辑分析仪测量，以评估高速数模转换器的非线性误差。

公开(公告)号：US20110112995A1

公开(公告)日：2011-05-12

申请号：US12801777

申请日：2010-06-24

Applicant: Chu-Fei Chang ,  Tai-Ting Wu ,  Chun-Wei Lin ,  Chia-Hao Lo ,  Tao-Yang Fu

Inventor： Chu-Fei Chang ,  Tai-Ting Wu ,  Chun-Wei Lin ,  Chia-Hao Lo ,  Tao-Yang Fu

IPC: G06N5/02 ,  G06F15/18

CPC classification number: G06N20/00 ,  G06F16/353

Abstract: A method for capturing and organizing intelligence data using an organic data model includes: receiving one or more webpages containing social intelligence data; segmenting content of the one or more webpages containing social intelligence data; identifying named entities in the segmented content of the one or more webpages; identifying topics in the segmented content of the one or more webpages; identifying opinions in the segmented content of the one or more webpages; integrating the identified named entities, topics, and opinions to construct an organic object data model; and storing organic object data associated with the constructed organic object data model in an organic object database.

Abstract translation: 使用有机数据模型捕获和组织智能数据的方法包括：接收一个或多个包含社会智能数据的网页; 分割包含社交情报数据的一个或多个网页的内容; 识别一个或多个网页的分段内容中的命名实体; 识别一个或多个网页的分段内容中的主题; 识别一个或多个网页的分段内容中的意见; 整合识别的命名实体，主题和意见，构建有机对象数据模型; 以及将与所构建的有机对象数据模型相关联的有机对象数据存储在有机对象数据库中。