Methods, apparatus and computer program products for modeling integrated circuit devices having reduced linewidths
    1.
    发明授权
    Methods, apparatus and computer program products for modeling integrated circuit devices having reduced linewidths 失效
    用于对具有减小的线宽的集成电路器件进行建模的方法,装置和计算机程序产品

    公开(公告)号:US06898561B1

    公开(公告)日:2005-05-24

    申请号:US09465433

    申请日:1999-12-21

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5036

    摘要: Methods, apparatus and computer program products for modeling integrated circuits having dense devices therein that experience linewidth (e.g., gate electrodes) reductions during fabrication are provided. For dense devices having electrical paths therein and first and second gate electrodes that overlie the electrical path, operations include determining an electrical gate length of the first gate electrode by evaluating a change in current through the electrical path relative to a change in gate length of the second gate electrode. The operation to determine the electrical gate length of the first gate electrode includes evaluating a change in simulated drain-to-source current through the electrical path relative to a change in the electrical gate length of the second gate electrode.

    摘要翻译: 提供了用于对其中具有密集器件的集成电路进行建模的方法,装置和计算机程序产品,其中制造中经历线宽(例如,栅电极)的减少。 对于其中具有电路径的密集器件以及覆盖电路的第一和第二栅电极,操作包括通过评估通过电路径的电流相对于栅极长度的变化来确定第一栅电极的电栅极长度 第二栅电极。 确定第一栅电极的电栅极长度的操作包括评估通过电路径的模拟漏极 - 源极电流相对于第二栅电极的电栅极长度的变化的变化。

    On-chip interface trap characterization and monitoring
    2.
    发明授权
    On-chip interface trap characterization and monitoring 有权
    片上接口陷阱特征和监控

    公开(公告)号:US07472322B1

    公开(公告)日:2008-12-30

    申请号:US11141223

    申请日:2005-05-31

    申请人: Zhijian Ma Chunbo Liu

    发明人: Zhijian Ma Chunbo Liu

    IPC分类号: G01R31/317 G01R31/40

    摘要: A method and apparatus for testing semiconductor wafers is disclosed in which a test circuit is used that includes a waveform generator. The test circuit can test a single transistor or can test multiple transistors. A testing method is disclosed in which a supply voltage is applied to the waveform generator to produce pulses that are applied to the gate of a transistor to be tested. A bias voltage is applied to the source and drain of the transistor to be tested, and the charge pumping current that is generated at the substrate is then measured. The process can be repeated at different bias voltage levels to obtain additional current measurements, indicating the maximum charge pumping current for the transistor that is being tested. The determined maximum charge pumping current can then be used for determining whether there is excessive 1/f noise in the device under test.

    摘要翻译: 公开了一种用于测试半导体晶片的方法和装置,其中使用包括波形发生器的测试电路。 测试电路可以测试单个晶体管或者可以测试多个晶体管。 公开了一种测试方法,其中将电源电压施加到波形发生器以产生施加到待测试的晶体管的栅极的脉冲。 将偏置电压施加到要测试的晶体管的源极和漏极,然后测量在衬底处产生的电荷泵浦电流。 该过程可以在不同的偏置电压电平下重复,以获得额外的电流测量值,指示正在测试的晶体管的最大电荷泵浦电流。 然后可以使用确定的最大电荷泵浦电流来确定被测器件中是否存在过大的1 / f噪声。

    Ripple suppressor circuit and method therefor
    3.
    发明授权
    Ripple suppressor circuit and method therefor 有权
    纹波抑制电路及其方法

    公开(公告)号:US09213344B2

    公开(公告)日:2015-12-15

    申请号:US13937943

    申请日:2013-07-09

    摘要: In one embodiment, a method of forming a ripple suppressor circuit includes a configuring the ripple suppressor circuit to receive a first signal that is representative of a requested voltage and a second signal that is a filtered value of the first signal. The method also includes configuring the ripple suppressor circuit to determine a peak value of the second signal responsively to the first signal and to determine a minimum value of the second signal responsively to the first signal. The method may also include configuring the ripple suppressor circuit to form an average value of the peak value and the minimum value.

    摘要翻译: 在一个实施例中,形成纹波抑制电路的方法包括配置纹波抑制电路以接收代表请求电压的第一信号和作为第一信号的滤波值的第二信号。 该方法还包括配置纹波抑制电路以响应于第一信号确定第二信号的峰值,并响应于第一信号确定第二信号的最小值。 该方法还可以包括配置纹波抑制电路以形成峰值和最小值的平均值。

    VARIABLE LOOP BANDWIDTH PHASE LOCKED LOOP
    4.
    发明申请
    VARIABLE LOOP BANDWIDTH PHASE LOCKED LOOP 失效
    可变环路带宽锁相环

    公开(公告)号:US20090256602A1

    公开(公告)日:2009-10-15

    申请号:US12487873

    申请日:2009-06-19

    申请人: Chunbo Liu

    发明人: Chunbo Liu

    IPC分类号: H03L7/06

    摘要: An apparatus comprising a voltage controlled oscillator, a first charge pump, a second charge pump, a switch circuit and a comparator circuit. The voltage controlled oscillator may be configured to generate an output signal oscillating at a first frequency in response to a control signal. The charge pump circuit may be configured to generate a first component of the control signal in response to a first adjustment signal and a second adjustment signal. The second charge pump may be configured to generate a second component of the control signal in response to a first intermediate signal and a second intermediate signal. The switch circuit may be configured to generate the first intermediate signal and the second intermediate signal in response to the first adjustment signal and the second adjustment signal. The comparator circuit may be configured to generate the first and second adjustment signals in response to a comparison between (i) an input signal having a second frequency and (ii) the output signal.

    摘要翻译: 一种包括压控振荡器,第一电荷泵,第二电荷泵,开关电路和比较器电路的装置。 压控振荡器可以被配置为响应于控制信号而产生以第一频率振荡的输出信号。 电荷泵电路可以被配置为响应于第一调整信号和第二调整信号而产生控制信号的第一分量。 第二电荷泵可以被配置为响应于第一中间信号和第二中间信号而产生控制信号的第二分量。 开关电路可以被配置为响应于第一调整信号和第二调整信号而产生第一中间信号和第二中间信号。 比较器电路可以被配置为响应于(i)具有第二频率的输入信号和(ii)输出信号之间的比较来产生第一和第二调整信号。

    Variable loop bandwidth phase locked loop
    5.
    发明申请
    Variable loop bandwidth phase locked loop 失效
    可变环路带宽锁相环

    公开(公告)号:US20070099581A1

    公开(公告)日:2007-05-03

    申请号:US11260442

    申请日:2005-10-27

    申请人: Chunbo Liu

    发明人: Chunbo Liu

    IPC分类号: H04B1/40 H04B7/00

    摘要: An apparatus comprising a voltage controlled oscillator, a first charge pump, a second charge pump, a switch circuit and a comparator circuit. The voltage controlled oscillator may be configured to generate an output signal oscillating at a first frequency in response to a control signal. The charge pump circuit may be configured to generate a first component of the control signal in response to a first adjustment signal and a second adjustment signal. The second charge pump may be configured to generate a second component of the control signal in response to a first intermediate signal and a second intermediate signal. The switch circuit may be configured to generate the first intermediate signal and the second intermediate signal in response to the first adjustment signal and the second adjustment signal. The comparator circuit may be configured to generate the first and second adjustment signals in response to a comparison between (i) an input signal having a second frequency and (ii) the output signal.

    摘要翻译: 一种包括压控振荡器,第一电荷泵,第二电荷泵,开关电路和比较器电路的装置。 压控振荡器可以被配置为响应于控制信号而产生以第一频率振荡的输出信号。 电荷泵电路可以被配置为响应于第一调整信号和第二调整信号而产生控制信号的第一分量。 第二电荷泵可以被配置为响应于第一中间信号和第二中间信号而产生控制信号的第二分量。 开关电路可以被配置为响应于第一调整信号和第二调整信号而产生第一中间信号和第二中间信号。 比较器电路可以被配置为响应于(i)具有第二频率的输入信号和(ii)输出信号之间的比较来产生第一和第二调整信号。

    Squelch detection system for high speed data links
    6.
    发明授权
    Squelch detection system for high speed data links 有权
    用于高速数据链路的静噪检测系统

    公开(公告)号:US07471118B2

    公开(公告)日:2008-12-30

    申请号:US11747246

    申请日:2007-05-11

    申请人: Chunbo Liu

    发明人: Chunbo Liu

    IPC分类号: G01R19/00 H03K5/153

    CPC分类号: H03G3/34

    摘要: An apparatus comprising a first comparator circuit, a second comparator circuit, a third comparator circuit, and a difference circuit. The first comparator circuit may be configured to generate a first intermediate current in response to a first input voltage and a second input voltage. The second comparator circuit may be configured to generate a second intermediate current in response to the first input voltage and the second input voltage. The third comparator circuit may be configured to generate an intermediate reference current in response to a first reference voltage and a second reference voltage. The difference circuit may be configured to generate a first compare voltage and a second compare voltage in response to the first intermediate current, the second intermediate current, and the intermediate reference current. The apparatus may indicate a squelch condition when the first compare voltage is greater than the second compare voltage.

    摘要翻译: 一种装置,包括第一比较器电路,第二比较器电路,第三比较器电路和差分电路。 第一比较器电路可以被配置为响应于第一输入电压和第二输入电压而产生第一中间电流。 第二比较器电路可以被配置为响应于第一输入电压和第二输入电压而产生第二中间电流。 第三比较器电路可以被配置为响应于第一参考电压和第二参考电压而产生中间参考电流。 差分电路可以被配置为响应于第一中间电流,第二中间电流和中间参考电流而产生第一比较电压和第二比较电压。 当第一比较电压大于第二比较电压时,该装置可以指示静噪条件。

    Variable loop bandwidth phase locked loop
    7.
    发明授权
    Variable loop bandwidth phase locked loop 失效
    可变环路带宽锁相环

    公开(公告)号:US08120431B2

    公开(公告)日:2012-02-21

    申请号:US12487873

    申请日:2009-06-19

    申请人: Chunbo Liu

    发明人: Chunbo Liu

    IPC分类号: H03L7/00

    摘要: An apparatus comprising a voltage controlled oscillator, a first charge pump, a second charge pump, a switch circuit and a comparator circuit. The voltage controlled oscillator may be configured to generate an output signal oscillating at a first frequency in response to a control signal. The charge pump circuit may be configured to generate a first component of the control signal in response to a first adjustment signal and a second adjustment signal. The second charge pump may be configured to generate a second component of the control signal in response to a first intermediate signal and a second intermediate signal. The switch circuit may be configured to generate the first intermediate signal and the second intermediate signal in response to the first adjustment signal and the second adjustment signal. The comparator circuit may be configured to generate the first and second adjustment signals in response to a comparison between (i) an input signal having a second frequency and (ii) the output signal.

    摘要翻译: 一种包括压控振荡器,第一电荷泵,第二电荷泵,开关电路和比较器电路的装置。 压控振荡器可以被配置为响应于控制信号而产生以第一频率振荡的输出信号。 电荷泵电路可以被配置为响应于第一调整信号和第二调整信号而产生控制信号的第一分量。 第二电荷泵可以被配置为响应于第一中间信号和第二中间信号而产生控制信号的第二分量。 开关电路可以被配置为响应于第一调整信号和第二调整信号而产生第一中间信号和第二中间信号。 比较器电路可以被配置为响应于(i)具有第二频率的输入信号和(ii)输出信号之间的比较来产生第一和第二调整信号。

    SQUELCH DETECTION SYSTEM FOR HIGH SPEED DATA LINKS
    8.
    发明申请
    SQUELCH DETECTION SYSTEM FOR HIGH SPEED DATA LINKS 有权
    用于高速数据链路的侦测系统

    公开(公告)号:US20080278227A1

    公开(公告)日:2008-11-13

    申请号:US11747246

    申请日:2007-05-11

    申请人: Chunbo Liu

    发明人: Chunbo Liu

    IPC分类号: H04B1/10

    CPC分类号: H03G3/34

    摘要: An apparatus comprising a first comparator circuit, a second comparator circuit, a third comparator circuit, and a difference circuit. The first comparator circuit may be configured to generate a first intermediate current in response to a first input voltage and a second input voltage. The second comparator circuit may be configured to generate a second intermediate current in response to the first input voltage and the second input voltage. The third comparator circuit may be configured to generate an intermediate reference current in response to a first reference voltage and a second reference voltage. The difference circuit may be configured to generate a first compare voltage and a second compare voltage in response to the first intermediate current, the second intermediate current, and the intermediate reference current. The apparatus may indicate a squelch condition when the first compare voltage is greater than the second compare voltage.

    摘要翻译: 一种装置,包括第一比较器电路,第二比较器电路,第三比较器电路和差分电路。 第一比较器电路可以被配置为响应于第一输入电压和第二输入电压而产生第一中间电流。 第二比较器电路可以被配置为响应于第一输入电压和第二输入电压而产生第二中间电流。 第三比较器电路可以被配置为响应于第一参考电压和第二参考电压而产生中间参考电流。 差分电路可以被配置为响应于第一中间电流,第二中间电流和中间参考电流而产生第一比较电压和第二比较电压。 当第一比较电压大于第二比较电压时,该装置可以指示静噪条件。

    RIPPLE SUPPRESSOR CIRCUIT AND METHOD THEREFOR
    9.
    发明申请
    RIPPLE SUPPRESSOR CIRCUIT AND METHOD THEREFOR 有权
    纹波抑制器电路及其方法

    公开(公告)号:US20140049232A1

    公开(公告)日:2014-02-20

    申请号:US13937943

    申请日:2013-07-09

    IPC分类号: G05F1/10

    摘要: In one embodiment, a method of forming a ripple suppressor circuit includes a configuring the ripple suppressor circuit to receive a first signal that is representative of a requested voltage and a second signal that is a filtered value of the first signal. The method also includes configuring the ripple suppressor circuit to determine a peak value of the second signal responsively to the first signal and to determine a minimum value of the second signal responsively to the first signal. The method may also include configuring the ripple suppressor circuit to form an average value of the peak value and the minimum value.

    摘要翻译: 在一个实施例中,形成纹波抑制电路的方法包括配置纹波抑制电路以接收代表请求电压的第一信号和作为第一信号的滤波值的第二信号。 该方法还包括配置纹波抑制电路以响应于第一信号确定第二信号的峰值,并响应于第一信号确定第二信号的最小值。 该方法还可以包括配置纹波抑制电路以形成峰值和最小值的平均值。

    Variable loop bandwidth phase locked loop
    10.
    发明授权
    Variable loop bandwidth phase locked loop 失效
    可变环路带宽锁相环

    公开(公告)号:US07589594B2

    公开(公告)日:2009-09-15

    申请号:US11260442

    申请日:2005-10-27

    申请人: Chunbo Liu

    发明人: Chunbo Liu

    IPC分类号: H03L7/00

    摘要: An apparatus comprising a voltage controlled oscillator, a first charge pump, a second charge pump, a switch circuit and a comparator circuit. The voltage controlled oscillator may be configured to generate an output signal oscillating at a first frequency in response to a control signal. The charge pump circuit may be configured to generate a first component of the control signal in response to a first adjustment signal and a second adjustment signal. The second charge pump may be configured to generate a second component of the control signal in response to a first intermediate signal and a second intermediate signal. The switch circuit may be configured to generate the first intermediate signal and the second intermediate signal in response to the first adjustment signal and the second adjustment signal. The comparator circuit may be configured to generate the first and second adjustment signals in response to a comparison between (i) an input signal having a second frequency and (ii) the output signal.

    摘要翻译: 一种包括压控振荡器,第一电荷泵,第二电荷泵,开关电路和比较器电路的装置。 压控振荡器可以被配置为响应于控制信号而产生以第一频率振荡的输出信号。 电荷泵电路可以被配置为响应于第一调整信号和第二调整信号而产生控制信号的第一分量。 第二电荷泵可以被配置为响应于第一中间信号和第二中间信号而产生控制信号的第二分量。 开关电路可以被配置为响应于第一调整信号和第二调整信号而产生第一中间信号和第二中间信号。 比较器电路可以被配置为响应于(i)具有第二频率的输入信号和(ii)输出信号之间的比较来产生第一和第二调整信号。