Electrostatic chuck robotic system
    2.
    发明授权
    Electrostatic chuck robotic system 有权
    静电吸盘机器人系统

    公开(公告)号:US08953298B2

    公开(公告)日:2015-02-10

    申请号:US13307089

    申请日:2011-11-30

    IPC分类号: H01L21/683 H01T23/00

    CPC分类号: H01L21/6831 H01L21/67742

    摘要: A workpiece transfer system has a plurality of joints having a bearing and a primary and secondary transformer coil, wherein power provided to the primary transformer coil and secondary transformer coil of each joint produces mutual inductance between the primary and secondary transformer coil of the respective joint. A first pair of arms are rotatably coupled to a blade by a first pair of the joints, wherein the primary transformer coil of each of the first pair of joints is operably coupled to the first pair of arms, and the secondary transformer coil of each of the first pair of joints is operably coupled to the blade and an electrode beneath a dielectric workpiece retaining surface of the blade. The electrode is contactlessly energized through the transformer coils of the joint and the blade can chuck and de-chuck a workpiece by reversing current directions and by voltage adjustment.

    摘要翻译: 工件传送系统具有多个具有轴承和初级和次级变压器线圈的接头,其中提供给每个接头的初级变压器线圈和次级变压器线圈的功率在相应接头的主变压器线圈和次级变压器线圈之间产生互感。 第一对臂通过第一对接头可旋转地联接到叶片,其中第一对接头中的每一个的主变压器线圈可操作地耦合到第一对臂,并且每个臂的次级变压器线圈 第一对接头可操作地联接到叶片和位于叶片的介电工件保持表面下方的电极。 电极通过接头的变压器线圈非接触地通电,并且刀片可以通过反向电流方向和电压调节来夹紧和去夹紧工件。

    Electrostatic Chuck Robotic System
    3.
    发明申请
    Electrostatic Chuck Robotic System 有权
    静电卡盘机器人系统

    公开(公告)号:US20130135784A1

    公开(公告)日:2013-05-30

    申请号:US13307089

    申请日:2011-11-30

    CPC分类号: H01L21/6831 H01L21/67742

    摘要: A workpiece transfer system has a plurality of joints having a bearing and a primary and secondary transformer coil, wherein power provided to the primary transformer coil and secondary transformer coil of each joint produces mutual inductance between the primary and secondary transformer coil of the respective joint. A first pair of arms are rotatably coupled to a blade by a first pair of the joints, wherein the primary transformer coil of each of the first pair of joints is operably coupled to the first pair of arms, and the secondary transformer coil of each of the first pair of joints is operably coupled to the blade and an electrode beneath a dielectric workpiece retaining surface of the blade. The electrode is contactlessly energized through the transformer coils of the joint and the blade can chuck and de-chuck a workpiece by reversing current directions and by voltage adjustment.

    摘要翻译: 工件传送系统具有多个具有轴承和初级和次级变压器线圈的接头,其中提供给每个接头的初级变压器线圈和次级变压器线圈的功率在相应接头的主变压器线圈和次级变压器线圈之间产生互感。 第一对臂通过第一对接头可旋转地联接到叶片,其中第一对接头中的每一个的主变压器线圈可操作地耦合到第一对臂,并且每个臂的次级变压器线圈 第一对接头可操作地联接到叶片和位于叶片的介电工件保持表面下方的电极。 电极通过接头的变压器线圈非接触地通电,并且刀片可以通过反向电流方向和电压调节来夹紧和去夹紧工件。

    Integrated technology for partial air gap low K deposition
    4.
    发明授权
    Integrated technology for partial air gap low K deposition 有权
    局部气隙低K沉积的综合技术

    公开(公告)号:US08624394B2

    公开(公告)日:2014-01-07

    申请号:US13313542

    申请日:2011-12-07

    IPC分类号: H01L23/48

    摘要: A semiconductor device includes a semiconductor body and a low K dielectric layer overlying the semiconductor body. A first portion of the low K dielectric layer comprises a dielectric material, and a second portion of the low K dielectric layer comprise an air gap, wherein the first portion and the second portion are laterally disposed with respect to one another. A method for forming a low K dielectric layer is also disclosed and includes forming a dielectric layer over a semiconductor body, forming a plurality of air gaps laterally disposed from one another in the dielectric layer, and forming a capping layer over the dielectric layer and air gaps.

    摘要翻译: 半导体器件包括半导体本体和覆盖半导体本体的低K电介质层。 低K电介质层的第一部分包括电介质材料,低K电介质层的第二部分包括气隙,其中第一部分和第二部分相对于彼此横向设置。 还公开了一种用于形成低K电介质层的方法,包括在半导体本体上形成电介质层,在电介质层中形成彼此横向设置的多个气隙,并在电介质层和空气上形成覆盖层 差距

    Chemical vapor deposition film profile uniformity control
    5.
    发明授权
    Chemical vapor deposition film profile uniformity control 有权
    化学气相沉积膜轮廓均匀性控制

    公开(公告)号:US08916480B2

    公开(公告)日:2014-12-23

    申请号:US13313106

    申请日:2011-12-07

    IPC分类号: H01L21/31

    CPC分类号: C23C16/44 C23C16/45565

    摘要: The present disclosure provides for methods and systems for controlling profile uniformity of a chemical vapor deposition (CVD) film. A method includes depositing a first layer on a substrate by CVD with a first shower head, the first layer having a first profile, and depositing a second layer over the first layer by CVD with a second shower head, the second layer having a second profile. The combined first layer and second layer have a third profile, and the first profile, the second profile, and the third profile are different from one another.

    摘要翻译: 本公开提供了用于控制化学气相沉积(CVD)膜的轮廓均匀性的方法和系统。 一种方法包括通过CVD用第一喷淋头沉积第一层在CVD衬底上,第一层具有第一轮廓,并且通过CVD与第二喷淋头在第一层上沉积第二层,第二层具有第二轮廓 。 组合的第一层和第二层具有第三轮廓,并且第一轮廓,第二轮廓和第三轮廓彼此不同。

    Integrated Technology for Partial Air Gap Low K Deposition
    6.
    发明申请
    Integrated Technology for Partial Air Gap Low K Deposition 有权
    部分气隙低K沉积的综合技术

    公开(公告)号:US20130147046A1

    公开(公告)日:2013-06-13

    申请号:US13313542

    申请日:2011-12-07

    IPC分类号: H01L23/48 H01L23/538

    摘要: A semiconductor device includes a semiconductor body and a low K dielectric layer overlying the semiconductor body. A first portion of the low K dielectric layer comprises a dielectric material, and a second portion of the low K dielectric layer comprise an air gap, wherein the first portion and the second portion are laterally disposed with respect to one another. A method for forming a low K dielectric layer is also disclosed and includes forming a dielectric layer over a semiconductor body, forming a plurality of air gaps laterally disposed from one another in the dielectric layer, and forming a capping layer over the dielectric layer and air gaps.

    摘要翻译: 半导体器件包括半导体本体和覆盖半导体本体的低K电介质层。 低K电介质层的第一部分包括电介质材料,低K电介质层的第二部分包括气隙,其中第一部分和第二部分相对于彼此横向设置。 还公开了一种用于形成低K电介质层的方法,包括在半导体本体上形成电介质层,在电介质层中形成彼此横向设置的多个气隙,并在电介质层和空气上形成覆盖层 差距

    CHEMICAL VAPOR DEPOSITION FILM PROFILE UNIFORMITY CONTROL
    7.
    发明申请
    CHEMICAL VAPOR DEPOSITION FILM PROFILE UNIFORMITY CONTROL 有权
    化学蒸气沉积膜型材均匀性控制

    公开(公告)号:US20130149871A1

    公开(公告)日:2013-06-13

    申请号:US13313106

    申请日:2011-12-07

    IPC分类号: H01L21/02 C23C16/455

    CPC分类号: C23C16/44 C23C16/45565

    摘要: The present disclosure provides for methods and systems for controlling profile uniformity of a chemical vapor deposition (CVD) film. A method includes depositing a first layer on a substrate by CVD with a first shower head, the first layer having a first profile, and depositing a second layer over the first layer by CVD with a second shower head, the second layer having a second profile. The combined first layer and second layer have a third profile, and the first profile, the second profile, and the third profile are different from one another.

    摘要翻译: 本公开提供了用于控制化学气相沉积(CVD)膜的轮廓均匀性的方法和系统。 一种方法包括通过CVD用第一喷淋头沉积第一层在CVD衬底上,第一层具有第一轮廓,并且通过CVD与第二喷淋头在第一层上沉积第二层,第二层具有第二轮廓 。 组合的第一层和第二层具有第三轮廓,并且第一轮廓,第二轮廓和第三轮廓彼此不同。

    INTERLAYER DIELECTRIC STRUCTURE AND METHOD MAKING THE SAME
    9.
    发明申请
    INTERLAYER DIELECTRIC STRUCTURE AND METHOD MAKING THE SAME 有权
    中间层介电结构及其制备方法

    公开(公告)号:US20130043539A1

    公开(公告)日:2013-02-21

    申请号:US13212904

    申请日:2011-08-18

    摘要: The present disclosure provides a method of making an integrated circuit. The method includes forming a gate stack on a semiconductor substrate; forming a stressed contact etch stop layer (CESL) on the gate stack and on the semiconductor substrate; forming a first dielectric material layer on the stressed CESL using a high aspect ratio process (HARP) at a deposition temperature greater than about 440 C to drive out hydroxide (OH) group; forming a second dielectric material layer on the first dielectric material layer; etching to form contact holes in the first and second dielectric material layers; filling the contact holes with a conductive material; and performing a chemical mechanical polishing (CMP) process.

    摘要翻译: 本公开提供了制造集成电路的方法。 该方法包括在半导体衬底上形成栅叠层; 在栅极堆叠和半导体衬底上形成应力接触蚀刻停止层(CESL); 在大于约440℃的沉积温度下使用高纵横比法(HARP)在应力CESL上形成第一介电材料层以驱出氢氧化物(OH)基团; 在所述第一介电材料层上形成第二介电材料层; 蚀刻以在第一和第二介电材料层中形成接触孔; 用导电材料填充接触孔; 并进行化学机械抛光(CMP)工艺。